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Searched defs:TPR (Results 1 – 15 of 15) sorted by relevance

/external/clang/lib/Parse/
DParseTentative.cpp108 TPResult TPR = isCXXDeclarationSpecifier(TPResult::False, in isCXXSimpleDeclaration() local
240 TPResult TPR = isCXXDeclarationSpecifier(); in TryParseSimpleDeclaration() local
248 TPResult TPR = TryParseInitDeclaratorList(); in TryParseSimpleDeclaration() local
288 TPResult TPR = TryParseDeclarator(false/*mayBeAbstract*/); in TryParseInitDeclaratorList() local
493 TPResult TPR = isCXXDeclarationSpecifier(); in isCXXTypeId() local
792 TPResult TPR = isCXXDeclarationSpecifier(); in TryParseOperatorId() local
896 TPResult TPR = TryParseFunctionDeclarator(); in TryParseDeclarator() local
907 TPResult TPR = TryParseDeclarator(mayBeAbstract, mayHaveIdentifier); in TryParseDeclarator() local
919 TPResult TPR(TPResult::Ambiguous); in TryParseDeclarator() local
1396 TPResult TPR = TPResult::False; in isCXXDeclarationSpecifier() local
[all …]
DParseDecl.cpp2375 TPResult TPR = TryParseDeclarator(/*mayBeAbstract*/false); in ParseImplicitInt() local
3935 TPResult TPR = isExpressionOrTypeSpecifierSimple(NextToken().getKind()); in ParseEnumSpecifier() local
/external/crosvm/devices/tests/irqchip/
Duserspace.rs72 const TPR: u64 = 0x80; constant
/external/crosvm/devices/src/irqchip/
Dapic.rs863 const TPR: usize = 0x80; constant
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp637 SDValue TPR = DAG.getCopyToReg(FR0.getValue(1), dl, PredR, in LowerCallResult() local
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/
Dcore_sc300.h728 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
Dcore_cm3.h746 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
Dcore_cm4.h807 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
Dcore_cm7.h1009 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/
Dcore_cm3.h746 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
Dcore_sc300.h728 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
Dcore_cm4.h807 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
Dcore_cm7.h1009 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp348 SDValue TPR = DAG.getCopyToReg(FR0.getValue(1), dl, PredR, in LowerCallResult() local
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp379 SDValue TPR = DAG.getCopyToReg(FR0.getValue(1), dl, PredR, in LowerCallResult() local