1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 /* 4 * EC communication interface for Embedded Controller. 5 */ 6 7 #ifndef _EC_STARLABS_EC_H 8 #define _EC_STARLABS_EC_H 9 10 /* 11 * Define the expected value of the PNP base address that is fixed through 12 * the BADRSEL register controlled within the EC domain by the EC Firmware. 13 */ 14 #define ITE_FIXED_ADDR 0x4e 15 #define NUVOTON_FIXED_ADDR 0x4e 16 17 /* Logical device number (LDN) assignments for ITE. */ 18 #define ITE_SP1 0x01 /* Serial Port 1 (UART) */ 19 #define ITE_SP2 0x02 /* Serial Port 2 (UART) */ 20 #define ITE_SWUC 0x04 /* System Wake-Up Control (SWUC) */ 21 #define ITE_KBCM 0x05 /* KBC / Mouse Interface */ 22 #define ITE_KBCK 0x06 /* KBC / Keyboard Interface */ 23 #define ITE_IR 0x0a /* Consumer IR (CIR) */ 24 #define ITE_SMFI 0x0f /* Shared Memory / Flash Interface (SMFI) */ 25 #define ITE_RTCT 0x10 /* RTC-like Timer (RCTC) */ 26 #define ITE_PMC1 0x11 /* Power Management I/F Channel 1 (PMC1) */ 27 #define ITE_PMC2 0x12 /* Power Management I/F Channel 2 (PMC2) */ 28 #define ITE_SSPI 0x13 /* Serial Peripheral Interface (SSPI) */ 29 #define ITE_PECI 0x14 /* Platform Environment Control Interface (PECI) */ 30 #define ITE_PMC3 0x17 /* Power Management I/F Channel 3 (PMC3) */ 31 #define ITE_PMC4 0x18 /* Power Management I/F Channel 4 (PMC4) */ 32 #define ITE_PMC5 0x19 /* Power Management I/F Channel 5 (PMC5) */ 33 34 /* Logical device number (LDN) assignments for Nuvoton. */ 35 #define NUVOTON_MSWC 0x04 /* Mobile System Wake-Up Control (MSWC) */ 36 #define NUVOTON_KBCM 0x05 /* KBC / Mouse Interface */ 37 #define NUVOTON_KBCK 0x06 /* KBC / Keyboard Interface */ 38 #define NUVOTON_SHM 0x0f /* Shared Memory (SHM) */ 39 #define NUVOTON_PM1 0x11 /* Power Management I/F Channel 1 (PM1) */ 40 #define NUVOTON_PM2 0x12 /* Power Management I/F Channel 2 (PM2) */ 41 #define NUVOTON_PM3 0x17 /* Power Management I/F Channel 3 (PM3) */ 42 #define NUVOTON_ESHM 0x1d /* Extended Shared Memory (ESHM) */ 43 #define NUVOTON_PM4 0x1e /* Power Management I/F Channel 3 (PM4) */ 44 45 /* Host domain registers. */ 46 #define ITE_CHIPID1 0x20 /* Device ID register 1 */ 47 #define ITE_CHIPID2 0x21 /* Device ID register 2 */ 48 #define NUVOTON_CHIPID 0x27 /* Device ID register */ 49 50 /* EC RAM common offsets */ 51 #define ECRAM_MAJOR_VERSION 0x00 52 #define ECRAM_MINOR_VERSION 0x01 53 54 /* 55 * CMOS Settings 56 */ 57 58 /* Keyboard Backlight Timeout */ 59 #define SEC_30 0x00 60 #define MIN_1 0x01 61 #define MIN_3 0x02 62 #define MIN_5 0x03 63 #define NEVER 0x04 64 65 /* Fn Ctrl Swap */ 66 #define FN_CTRL 0x00 67 #define CTRL_FN 0x01 68 69 /* Max Charge Setting */ 70 #define CHARGE_100 0x00 71 #define CHARGE_80 0xbb 72 #define CHARGE_60 0xaa 73 74 /* Fast Charge Setting */ 75 #define CHARGE_RATE_NORMAL 0x00 76 #define CHARGE_RATE_FAST 0x01 77 78 /* Fan Mode Setting */ 79 #define FAN_NORMAL 0x00 80 #define FAN_AGGRESSIVE 0xbb 81 #define FAN_QUIET 0xaa 82 83 /* Fn Lock State */ 84 #define UNLOCKED 0x00 85 #define LOCKED 0x01 86 87 /* Trackpad State */ 88 #define TRACKPAD_ENABLED 0x00 89 #define TRACKPAD_DISABLED 0x22 90 91 /* Keyboard Brightness Levels */ 92 #define KBL_ON 0xdd 93 #define KBL_OFF 0xcc 94 #define KBL_LOW 0xbb 95 #define KBL_HIGH 0xaa 96 97 /* Keyboard Backlight State */ 98 #define KBL_DISABLED 0x00 99 #define KBL_ENABLED 0xdd 100 101 /* Mirror Flag */ 102 #define MIRROR_DISABLED 0x00 103 #define MIRROR_ENABLED 0xaa 104 105 uint16_t ec_get_version(void); 106 void ec_mirror_flag(void); 107 108 #endif 109