| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 188 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
196 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
203 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
210 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
218 unsigned SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
225 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
232 unsigned SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
269 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateSGPRSpillToVGPR() local
347 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateVGPRSpillToAGPR() local
418 const TargetRegisterInfo &TRI) { in regToString()
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| D | SIFrameLowering.cpp | 191 const SIRegisterInfo* TRI = &TII->getRegisterInfo(); in emitFlatScratchInit() local
272 const SIRegisterInfo *TRI, in getReservedPrivateSegmentBufferReg()
320 const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, in getReservedPrivateSegmentWaveByteOffsetReg()
406 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue() local
539 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionScratchSetup() local
688 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitPrologue() local
875 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitEpilogue() local
951 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in processFunctionBeforeFrameFinalized() local
989 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in determineCalleeSaves() local
1063 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in determineCalleeSavesSGPR() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 149 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
156 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
163 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
170 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
177 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
192 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getSpilledReg() local
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| D | SIFixSGPRCopies.cpp | 115 static bool hasVGPROperands(const MachineInstr &MI, const SIRegisterInfo *TRI) { in hasVGPROperands()
130 const SIRegisterInfo &TRI, in getCopyRegClasses()
153 const SIRegisterInfo &TRI) { in isVGPRToSGPRCopy()
159 const SIRegisterInfo &TRI) { in isSGPRToVGPRCopy()
177 const SIRegisterInfo *TRI, in foldVGPRCopyIntoRegSequence()
242 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in runOnMachineFunction() local
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| D | SIShrinkInstructions.cpp | 69 static bool isVGPR(const MachineOperand *MO, const SIRegisterInfo &TRI, in isVGPR()
81 const SIRegisterInfo &TRI, in canShrink()
137 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in foldImmediates() local
204 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 221 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
229 Register SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
236 Register SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
243 Register SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
251 Register SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
258 Register SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
265 Register SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
316 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateVGPRForSGPRSpills() local
345 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateVGPRForPrologEpilogSGPRSpills() local
438 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateVGPRSpillToAGPR() local
[all …]
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| D | SIFrameLowering.cpp | 74 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getVGPRSpillLaneOrTempRegister() local
124 static void buildPrologSpill(const GCNSubtarget &ST, const SIRegisterInfo &TRI, in buildPrologSpill()
148 const SIRegisterInfo &TRI, in buildEpilogRestore()
172 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in buildGitPtr() local
192 static void initLiveRegs(LivePhysRegs &LiveRegs, const SIRegisterInfo &TRI, in initLiveRegs()
222 const SIRegisterInfo &TRI; member in llvm::PrologEpilogSGPRSpillBuilder
331 const SIRegisterInfo &TRI, in PrologEpilogSGPRSpillBuilder()
375 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionFlatScratchInit() local
531 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in getEntryFunctionReservedScratchRsrcReg() local
600 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | LiveRegUnits.h | 31 const TargetRegisterInfo *TRI = nullptr; variable
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
74 void init(const TargetRegisterInfo &TRI) { in init()
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| D | LivePhysRegs.h | 49 const TargetRegisterInfo *TRI = nullptr; variable
58 LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) { in LivePhysRegs()
66 void init(const TargetRegisterInfo &TRI) { in init()
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| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/ |
| D | LiveRegUnits.h | 31 const TargetRegisterInfo *TRI = nullptr; variable
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
73 void init(const TargetRegisterInfo &TRI) { in init()
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| D | LivePhysRegs.h | 51 const TargetRegisterInfo *TRI = nullptr; variable
60 LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) { in LivePhysRegs()
68 void init(const TargetRegisterInfo &TRI) { in init()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreMachineFunctionInfo.cpp | 39 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot() local
57 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot() local
70 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/GISel/ |
| D | PPCRegisterBankInfo.cpp | 29 PPCRegisterBankInfo::PPCRegisterBankInfo(const TargetRegisterInfo &TRI) {} in PPCRegisterBankInfo()
75 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrMapping() local
240 const TargetRegisterInfo &TRI, in hasFPConstraints()
280 const TargetRegisterInfo &TRI, in onlyUsesFP()
299 const TargetRegisterInfo &TRI, in onlyDefinesFP()
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| /external/llvm/include/llvm/CodeGen/ |
| D | LivePhysRegs.h | 44 const TargetRegisterInfo *TRI; variable
54 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) { in LivePhysRegs()
60 void init(const TargetRegisterInfo *TRI) { in init()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| D | MipsFrameLowering.cpp | 95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFrameLowering.cpp | 95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
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| D | MipsMachineFunction.cpp | 151 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEhDataRegsFI() local
169 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createISRRegFI() local
193 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getMoveF64ViaSpillFI() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/XCore/ |
| D | XCoreMachineFunctionInfo.cpp | 46 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot() local
64 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot() local
77 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFrameLowering.cpp | 96 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
105 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
112 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineCopyPropagation.cpp | 100 const TargetRegisterInfo &TRI) { in markRegsUnavailable()
112 void invalidateRegister(unsigned Reg, const TargetRegisterInfo &TRI) { in invalidateRegister()
134 void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) { in clobberRegister()
152 void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) { in trackCopy()
176 MachineInstr *findCopyForUnit(unsigned RegUnit, const TargetRegisterInfo &TRI, in findCopyForUnit()
187 const TargetRegisterInfo &TRI) { in findCopyDefViaUnit()
198 const TargetRegisterInfo &TRI) { in findAvailBackwardCopy()
219 const TargetRegisterInfo &TRI) { in findAvailCopy()
249 const TargetRegisterInfo *TRI; member in __anon00a329420111::MachineCopyPropagation
334 unsigned Def, const TargetRegisterInfo *TRI) { in isNopCopy()
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| D | TargetRegisterInfo.cpp | 89 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg()
120 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
143 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
154 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
241 const TargetRegisterInfo *TRI) { in firstCommonClass()
342 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
520 const TargetRegisterInfo *TRI) { in dumpReg()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| D | MachineLateInstrsCleanup.cpp | 42 const TargetRegisterInfo *TRI; member in __anon9f606e5a0111::MachineLateInstrsCleanup
108 const TargetRegisterInfo *TRI) { in clearKillsForDef()
136 const TargetRegisterInfo *TRI) { in removeRedundantDef()
196 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in processBlock() local
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| D | MachineCopyPropagation.cpp | 117 const TargetRegisterInfo &TRI) { in markRegsUnavailable()
129 void invalidateRegister(MCRegister Reg, const TargetRegisterInfo &TRI, in invalidateRegister()
158 void clobberRegister(MCRegister Reg, const TargetRegisterInfo &TRI, in clobberRegister()
181 void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI, in trackCopy()
209 const TargetRegisterInfo &TRI, in findCopyForUnit()
220 const TargetRegisterInfo &TRI) { in findCopyDefViaUnit()
231 const TargetRegisterInfo &TRI, in findAvailBackwardCopy()
259 const TargetRegisterInfo &TRI, in findAvailCopy()
295 const TargetRegisterInfo *TRI; member in __anon554853c80111::MachineCopyPropagation
384 MCRegister Def, const TargetRegisterInfo *TRI, in isNopCopy()
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| /external/llvm/lib/CodeGen/ |
| D | MIRPrinter.cpp | 150 const TargetRegisterInfo *TRI) { in printReg()
163 const TargetRegisterInfo *TRI) { in printReg()
205 const TargetRegisterInfo *TRI) { in convert()
286 const TargetRegisterInfo *TRI) { in convertStackObjects()
427 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in initRegisterMaskIds() local
485 const auto *TRI = MBB.getParent()->getSubtarget().getRegisterInfo(); in print() local
544 const auto *TRI = SubTarget.getRegisterInfo(); in print() local
750 void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI, in print()
946 const TargetRegisterInfo *TRI) { in printCFIRegister()
956 const TargetRegisterInfo *TRI) { in print()
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| D | TargetRegisterInfo.cpp | 45 Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI, in PrintReg()
67 Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintRegUnit()
90 Printable PrintVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintVRegOrUnit()
180 const TargetRegisterInfo *TRI, in firstCommonClass()
289 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
396 const TargetRegisterInfo *TRI) { in dumpReg()
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