| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterBankInfo.cpp | 215 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping() local
244 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86RegisterBankInfo.cpp | 216 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping() local
245 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping() local
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| D | X86InstCombineIntrinsic.cpp | 1963 auto *Ty0 = II.getArgOperand(0)->getType(); in simplifyDemandedVectorEltsIntrinsic() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LegalizerInfo.cpp | 188 const LLT &Ty0 = Query.Types[0]; in AArch64LegalizerInfo() local
206 const LLT &Ty0 = Query.Types[0]; in AArch64LegalizerInfo() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURewriteOutArguments.cpp | 210 bool AMDGPURewriteOutArguments::isVec3ToVec4Shuffle(Type *Ty0, Type* Ty1) const { in isVec3ToVec4Shuffle()
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| D | AMDGPULegalizerInfo.cpp | 824 const LLT Ty0 = Query.Types[0]; in AMDGPULegalizerInfo() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Vectorize/ |
| D | LoopVectorizationLegality.cpp | 381 static Type *getWiderType(const DataLayout &DL, Type *Ty0, Type *Ty1) { in getWiderType()
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| D | SLPVectorizer.cpp | 421 Type *Ty0 = cast<Instruction>(VL[BaseIndex])->getOperand(0)->getType(); in getSameOpcode() local
2878 Type *Ty0 = VL0->getOperand(0)->getType(); in buildTree_rec() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/Vectorize/ |
| D | LoopVectorizationLegality.cpp | 401 static Type *getWiderType(const DataLayout &DL, Type *Ty0, Type *Ty1) { in getWiderType()
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| D | SLPVectorizer.cpp | 677 Type *Ty0 = Op0->getType(); in getSameOpcode() local
694 Type *Ty0 = BaseInst->getOperand(0)->getType(); in getSameOpcode() local
5631 Type *Ty0 = cast<GEPOperator>(VL0)->getSourceElementType(); in buildTree_rec() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetTransformInfo.cpp | 551 static unsigned getElSizeLog2Diff(Type *Ty0, Type *Ty1) { in getElSizeLog2Diff()
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetTransformInfo.cpp | 638 static unsigned getElSizeLog2Diff(Type *Ty0, Type *Ty1) { in getElSizeLog2Diff()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 1680 auto *Ty0 = II->getArgOperand(0)->getType(); in SimplifyDemandedVectorElts() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 896 bool MachineVerifier::verifyVectorElementMatch(LLT Ty0, LLT Ty1, in verifyVectorElementMatch()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 2327 HexagonTargetLowering::typeExtendToWider(MVT Ty0, MVT Ty1) const { in typeExtendToWider()
2364 HexagonTargetLowering::typeWidenToWider(MVT Ty0, MVT Ty1) const { in typeWidenToWider()
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| D | HexagonLoopIdiomRecognition.cpp | 1112 Type *Ty0 = P->getIncomingValue(0)->getType(); in promoteTypes() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 933 bool MachineVerifier::verifyVectorElementMatch(LLT Ty0, LLT Ty1, in verifyVectorElementMatch()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonLoopIdiomRecognition.cpp | 1096 Type *Ty0 = P->getIncomingValue(0)->getType(); in promoteTypes() local
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| /external/llvm/lib/Transforms/Vectorize/ |
| D | SLPVectorizer.cpp | 1301 Type *Ty0 = cast<Instruction>(VL0)->getOperand(0)->getType(); in buildTree_rec() local
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| D | LoopVectorize.cpp | 4508 static Type *getWiderType(const DataLayout &DL, Type *Ty0, Type *Ty1) { in getWiderType()
|