| /external/clang/include/clang/Analysis/Analyses/ |
| D | ThreadSafetyTIL.h | 364 Variable(const Variable &Vd, SExpr *D) // rewrite constructor in Variable()
659 Function(Variable *Vd, SExpr *Bd) in Function()
663 Function(const Function &F, Variable *Vd, SExpr *Bd) // rewrite constructor in Function()
710 SFunction(Variable *Vd, SExpr *B) in SFunction()
716 SFunction(const SFunction &F, Variable *Vd, SExpr *B) // rewrite constructor in SFunction()
1866 Let(Variable *Vd, SExpr *Bd) : SExpr(COP_Let), VarDecl(Vd), Body(Bd) { in Let()
1869 Let(const Let &L, Variable *Vd, SExpr *Bd) : SExpr(L), VarDecl(Vd), Body(Bd) { in Let()
|
| /external/clang/lib/Analysis/ |
| D | ThreadSafety.cpp | 967 BeforeSet::BeforeInfo* BeforeSet::insertAttrExprs(const ValueDecl* Vd, in insertAttrExprs()
1022 BeforeSet::getBeforeInfoForDecl(const ValueDecl *Vd, in getBeforeInfoForDecl()
1043 std::function<bool (const ValueDecl*)> traverse = [&](const ValueDecl* Vd) { in checkBeforeAfter()
|
| /external/capstone/arch/ARM/ |
| D | ARMDisassembler.c | 1297 unsigned Vd = fieldFromInstruction_4(Val, 8, 5); in DecodeSPRRegListOperand() local
1322 unsigned Vd = fieldFromInstruction_4(Val, 8, 5); in DecodeDPRRegListOperand() local
5090 unsigned Vd = (fieldFromInstruction_4(Insn, 12, 4) << 0); in DecodeVCVTD() local
5121 unsigned Vd = (fieldFromInstruction_4(Insn, 12, 4) << 0); in DecodeVCVTQ() local
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1249 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeSPRRegListOperand() local
1273 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeDPRRegListOperand() local
5129 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeVCVTD() local
5188 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeVCVTQ() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1786 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeSPRRegListOperand() local
1811 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeDPRRegListOperand() local
6015 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeVCVTD() local
6074 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeVCVTQ() local
6131 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeNEONComplexLane64Instruction() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1572 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeSPRRegListOperand() local
1596 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeDPRRegListOperand() local
5667 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeVCVTD() local
5726 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeVCVTQ() local
5783 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); in DecodeNEONComplexLane64Instruction() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAGHVX.cpp | 858 MaskT Vd(Len); in vpack() local
873 MaskT Vd(Len); in vshuff() local
892 MaskT Vd(Len); in vdealb4w() local
|
| D | HexagonInstrInfo.cpp | 1276 Register Vd = MI.getOperand(0).getReg(); in expandPostRAPseudo() local
|
| /external/mesa3d/src/broadcom/compiler/ |
| D | vir.c | 2397 const uint32_t Vd = vs->vpm_output_size; in compute_vpm_config_gs() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 1167 Register Vd = MI.getOperand(0).getReg(); in expandPostRAPseudo() local
|
| /external/llvm/tools/llvm-objdump/ |
| D | MachODump.cpp | 8945 MachO::version_min_command Vd = Obj->getVersionMinLoadCommand(Command); in PrintLoadCommands() local
|