1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 /**
24 * @file crocus_screen.c
25 *
26 * Screen related driver hooks and capability lists.
27 *
28 * A program may use multiple rendering contexts (crocus_context), but
29 * they all share a common screen (crocus_screen). Global driver state
30 * can be stored in the screen; it may be accessed by multiple threads.
31 */
32
33 #include <stdio.h>
34 #include <errno.h>
35 #include <sys/ioctl.h>
36 #include "pipe/p_defines.h"
37 #include "pipe/p_state.h"
38 #include "pipe/p_context.h"
39 #include "pipe/p_screen.h"
40 #include "util/u_debug.h"
41 #include "util/u_inlines.h"
42 #include "util/format/u_format.h"
43 #include "util/u_transfer_helper.h"
44 #include "util/u_upload_mgr.h"
45 #include "util/ralloc.h"
46 #include "util/xmlconfig.h"
47 #include "drm-uapi/i915_drm.h"
48 #include "crocus_context.h"
49 #include "crocus_defines.h"
50 #include "crocus_fence.h"
51 #include "crocus_perf.h"
52 #include "crocus_pipe.h"
53 #include "crocus_resource.h"
54 #include "crocus_screen.h"
55 #include "intel/compiler/elk/elk_compiler.h"
56 #include "intel/common/intel_debug_identifier.h"
57 #include "intel/common/intel_gem.h"
58 #include "intel/common/intel_l3_config.h"
59 #include "intel/common/intel_uuid.h"
60 #include "crocus_monitor.h"
61
62 #define genX_call(devinfo, func, ...) \
63 switch ((devinfo)->verx10) { \
64 case 80: \
65 gfx8_##func(__VA_ARGS__); \
66 break; \
67 case 75: \
68 gfx75_##func(__VA_ARGS__); \
69 break; \
70 case 70: \
71 gfx7_##func(__VA_ARGS__); \
72 break; \
73 case 60: \
74 gfx6_##func(__VA_ARGS__); \
75 break; \
76 case 50: \
77 gfx5_##func(__VA_ARGS__); \
78 break; \
79 case 45: \
80 gfx45_##func(__VA_ARGS__); \
81 break; \
82 case 40: \
83 gfx4_##func(__VA_ARGS__); \
84 break; \
85 default: \
86 unreachable("Unknown hardware generation"); \
87 }
88
89 static const char *
crocus_get_vendor(struct pipe_screen * pscreen)90 crocus_get_vendor(struct pipe_screen *pscreen)
91 {
92 return "Intel";
93 }
94
95 static const char *
crocus_get_device_vendor(struct pipe_screen * pscreen)96 crocus_get_device_vendor(struct pipe_screen *pscreen)
97 {
98 return "Intel";
99 }
100
101 static void
crocus_get_device_uuid(struct pipe_screen * pscreen,char * uuid)102 crocus_get_device_uuid(struct pipe_screen *pscreen, char *uuid)
103 {
104 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
105
106 intel_uuid_compute_device_id((uint8_t *)uuid, &screen->devinfo, PIPE_UUID_SIZE);
107 }
108
109 static void
crocus_get_driver_uuid(struct pipe_screen * pscreen,char * uuid)110 crocus_get_driver_uuid(struct pipe_screen *pscreen, char *uuid)
111 {
112 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
113 const struct intel_device_info *devinfo = &screen->devinfo;
114
115 intel_uuid_compute_driver_id((uint8_t *)uuid, devinfo, PIPE_UUID_SIZE);
116 }
117
118 static const char *
crocus_get_name(struct pipe_screen * pscreen)119 crocus_get_name(struct pipe_screen *pscreen)
120 {
121 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
122 const struct intel_device_info *devinfo = &screen->devinfo;
123 static char buf[128];
124
125 snprintf(buf, sizeof(buf), "Mesa %s", devinfo->name);
126 return buf;
127 }
128
129 static uint64_t
get_aperture_size(int fd)130 get_aperture_size(int fd)
131 {
132 struct drm_i915_gem_get_aperture aperture = {};
133 intel_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
134 return aperture.aper_size;
135 }
136
137 static int
crocus_get_shader_param(struct pipe_screen * pscreen,enum pipe_shader_type p_stage,enum pipe_shader_cap param)138 crocus_get_shader_param(struct pipe_screen *pscreen,
139 enum pipe_shader_type p_stage,
140 enum pipe_shader_cap param)
141 {
142 gl_shader_stage stage = stage_from_pipe(p_stage);
143 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
144 const struct intel_device_info *devinfo = &screen->devinfo;
145
146 if (p_stage == PIPE_SHADER_MESH ||
147 p_stage == PIPE_SHADER_TASK)
148 return 0;
149
150 if (devinfo->ver < 6 &&
151 p_stage != PIPE_SHADER_VERTEX &&
152 p_stage != PIPE_SHADER_FRAGMENT)
153 return 0;
154
155 if (devinfo->ver == 6 &&
156 p_stage != PIPE_SHADER_VERTEX &&
157 p_stage != PIPE_SHADER_FRAGMENT &&
158 p_stage != PIPE_SHADER_GEOMETRY)
159 return 0;
160
161 /* this is probably not totally correct.. but it's a start: */
162 switch (param) {
163 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
164 return stage == MESA_SHADER_FRAGMENT ? 1024 : 16384;
165 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
166 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
167 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
168 return stage == MESA_SHADER_FRAGMENT ? 1024 : 0;
169
170 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
171 return UINT_MAX;
172
173 case PIPE_SHADER_CAP_MAX_INPUTS:
174 if (stage == MESA_SHADER_VERTEX ||
175 stage == MESA_SHADER_GEOMETRY)
176 return 16; /* Gen7 vec4 geom backend */
177 return 32;
178 case PIPE_SHADER_CAP_MAX_OUTPUTS:
179 return 32;
180 case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
181 return 16 * 1024 * sizeof(float);
182 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
183 return devinfo->ver >= 6 ? 16 : 1;
184 case PIPE_SHADER_CAP_MAX_TEMPS:
185 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
186 case PIPE_SHADER_CAP_CONT_SUPPORTED:
187 return 0;
188 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
189 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
190 /* Lie about these to avoid st/mesa's GLSL IR lowering of indirects,
191 * which we don't want. Our compiler backend will check elk_compiler's
192 * options and call nir_lower_indirect_derefs appropriately anyway.
193 */
194 return true;
195 case PIPE_SHADER_CAP_SUBROUTINES:
196 return 0;
197 case PIPE_SHADER_CAP_INTEGERS:
198 return 1;
199 case PIPE_SHADER_CAP_INT64_ATOMICS:
200 case PIPE_SHADER_CAP_FP16:
201 return 0;
202 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
203 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
204 return (devinfo->verx10 >= 75) ? CROCUS_MAX_TEXTURE_SAMPLERS : 16;
205 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
206 if (devinfo->ver >= 7 &&
207 (p_stage == PIPE_SHADER_FRAGMENT ||
208 p_stage == PIPE_SHADER_COMPUTE))
209 return CROCUS_MAX_TEXTURE_SAMPLERS;
210 return 0;
211 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
212 return devinfo->ver >= 7 ? (CROCUS_MAX_ABOS + CROCUS_MAX_SSBOS) : 0;
213 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
214 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
215 return 0;
216 case PIPE_SHADER_CAP_SUPPORTED_IRS:
217 return 1 << PIPE_SHADER_IR_NIR;
218 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
219 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
220 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
221 case PIPE_SHADER_CAP_INT16:
222 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
223 case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
224 return 0;
225 default:
226 unreachable("unknown shader param");
227 }
228 }
229
230 static int
crocus_get_compute_param(struct pipe_screen * pscreen,enum pipe_shader_ir ir_type,enum pipe_compute_cap param,void * ret)231 crocus_get_compute_param(struct pipe_screen *pscreen,
232 enum pipe_shader_ir ir_type,
233 enum pipe_compute_cap param,
234 void *ret)
235 {
236 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
237 const struct intel_device_info *devinfo = &screen->devinfo;
238
239 const uint32_t max_invocations = 32 * devinfo->max_cs_workgroup_threads;
240
241 if (devinfo->ver < 7)
242 return 0;
243 #define RET(x) do { \
244 if (ret) \
245 memcpy(ret, x, sizeof(x)); \
246 return sizeof(x); \
247 } while (0)
248
249 switch (param) {
250 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
251 RET((uint32_t []){ 32 });
252
253 case PIPE_COMPUTE_CAP_IR_TARGET:
254 if (ret)
255 strcpy(ret, "gen");
256 return 4;
257
258 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
259 RET((uint64_t []) { 3 });
260
261 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
262 RET(((uint64_t []) { 65535, 65535, 65535 }));
263
264 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
265 /* MaxComputeWorkGroupSize[0..2] */
266 RET(((uint64_t []) {max_invocations, max_invocations, max_invocations}));
267
268 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
269 /* MaxComputeWorkGroupInvocations */
270 RET((uint64_t []) { max_invocations });
271
272 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
273 /* MaxComputeSharedMemorySize */
274 RET((uint64_t []) { 64 * 1024 });
275
276 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
277 RET((uint32_t []) { 1 });
278
279 case PIPE_COMPUTE_CAP_SUBGROUP_SIZES:
280 RET((uint32_t []) { ELK_SUBGROUP_SIZE });
281
282 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
283 RET((uint64_t []) { max_invocations });
284
285 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
286 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
287 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
288 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
289 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
290 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
291 case PIPE_COMPUTE_CAP_MAX_SUBGROUPS:
292
293 // XXX: I think these are for Clover...
294 return 0;
295
296 default:
297 unreachable("unknown compute param");
298 }
299 }
300
301 static void
crocus_init_screen_caps(struct crocus_screen * screen)302 crocus_init_screen_caps(struct crocus_screen *screen)
303 {
304 const struct intel_device_info *devinfo = &screen->devinfo;
305 struct pipe_caps *caps = (struct pipe_caps *)&screen->base.caps;
306
307 u_init_pipe_screen_caps(&screen->base, 1);
308
309 caps->npot_textures = true;
310 caps->anisotropic_filter = true;
311 caps->occlusion_query = true;
312 caps->texture_swizzle = true;
313 caps->texture_mirror_clamp_to_edge = true;
314 caps->blend_equation_separate = true;
315 caps->fragment_shader_texture_lod = true;
316 caps->fragment_shader_derivatives = true;
317 caps->primitive_restart = true;
318 caps->primitive_restart_fixed_index = true;
319 caps->indep_blend_enable = true;
320 caps->fs_coord_origin_upper_left = true;
321 caps->fs_coord_pixel_center_integer = true;
322 caps->depth_clip_disable = true;
323 caps->vs_instanceid = true;
324 caps->vertex_element_instance_divisor = true;
325 caps->seamless_cube_map = true;
326 caps->seamless_cube_map_per_texture = true;
327 caps->conditional_render = true;
328 caps->texture_barrier = true;
329 caps->vertex_color_unclamped = true;
330 caps->start_instance = true;
331 caps->force_persample_interp = true;
332 caps->mixed_framebuffer_sizes = true;
333 caps->vs_layer_viewport = true;
334 caps->tes_layer_viewport = true;
335 caps->uma = true;
336 caps->clip_halfz = true;
337 caps->tgsi_texcoord = true;
338 caps->device_reset_status_query = true;
339 caps->copy_between_compressed_and_plain_formats = true;
340 caps->signed_vertex_buffer_offset = true;
341 caps->texture_float_linear = true;
342 caps->texture_half_float_linear = true;
343 caps->polygon_offset_clamp = true;
344 caps->tgsi_tex_txf_lz = true;
345 caps->multisample_z_resolve = true;
346 caps->shader_group_vote = true;
347 caps->vs_window_space_position = true;
348 caps->texture_gather_sm5 = true;
349 caps->shader_array_components = true;
350 caps->glsl_tess_levels_as_inputs = true;
351 caps->fs_position_is_sysval = true;
352 caps->fs_face_is_integer_sysval = true;
353 caps->invalidate_buffer = true;
354 caps->surface_reinterpret_blocks = true;
355 caps->fence_signal = true;
356 caps->demote_to_helper_invocation = true;
357 caps->gl_clamp = true;
358 caps->legacy_math_rules = true;
359 caps->native_fence_fd = true;
360
361 caps->int64 =
362 caps->shader_ballot =
363 caps->packed_uniforms = devinfo->ver == 8;
364
365 caps->quads_follow_provoking_vertex_convention = devinfo->ver <= 5;
366
367 caps->texture_query_lod =
368 caps->query_time_elapsed = devinfo->ver >= 5;
369
370 caps->draw_indirect =
371 caps->multi_draw_indirect =
372 caps->multi_draw_indirect_params =
373 caps->framebuffer_no_attachment =
374 caps->fs_fine_derivative =
375 caps->stream_output_interleave_buffers =
376 caps->shader_clock =
377 caps->texture_query_samples =
378 caps->compute =
379 caps->sampler_view_target =
380 caps->shader_samples_identical =
381 caps->shader_pack_half_float =
382 caps->gl_spirv =
383 caps->gl_spirv_variable_pointers =
384 caps->compute_shader_derivatives =
385 caps->doubles =
386 caps->memobj =
387 caps->image_store_formatted =
388 caps->alpha_to_coverage_dither_control = devinfo->ver >= 7;
389
390 caps->query_buffer_object =
391 caps->robust_buffer_access_behavior = devinfo->verx10 >= 75;
392
393 caps->cull_distance =
394 caps->query_pipeline_statistics_single =
395 caps->stream_output_pause_resume =
396 caps->sample_shading =
397 caps->cube_map_array =
398 caps->query_so_overflow =
399 caps->texture_multisample =
400 caps->conditional_render_inverted =
401 caps->query_timestamp =
402 caps->texture_buffer_objects =
403 caps->indep_blend_func =
404 caps->texture_shadow_lod =
405 caps->load_constbuf =
406 caps->draw_parameters =
407 caps->clear_scissored = devinfo->ver >= 6;
408
409 caps->fbfetch = devinfo->verx10 >= 45 ? ELK_MAX_DRAW_BUFFERS : 0;
410 /* in theory CL (965gm) can do this */
411 caps->max_dual_source_render_targets = devinfo->verx10 >= 45 ? 1 : 0;
412 caps->max_render_targets = ELK_MAX_DRAW_BUFFERS;
413 caps->max_texture_2d_size = devinfo->ver >= 7 ? 16384 : 8192;
414 caps->max_texture_cube_levels = devinfo->ver >= 7 ?
415 CROCUS_MAX_MIPLEVELS /* 16384x16384 */ : CROCUS_MAX_MIPLEVELS - 1; /* 8192x8192 */
416 caps->max_texture_3d_levels = 12; /* 2048x2048 */
417 caps->max_stream_output_buffers = (devinfo->ver >= 6) ? 4 : 0;
418 caps->max_texture_array_layers = devinfo->ver >= 7 ? 2048 : 512;
419 caps->max_stream_output_separate_components =
420 ELK_MAX_SOL_BINDINGS / CROCUS_MAX_SOL_BUFFERS;
421 caps->max_stream_output_interleaved_components = ELK_MAX_SOL_BINDINGS;
422 caps->glsl_feature_level_compatibility =
423 caps->glsl_feature_level = devinfo->verx10 >= 75 ? 460 :
424 (devinfo->ver >= 7 ? 420 : (devinfo->ver >= 6 ? 330 : 140));
425 caps->clip_planes = devinfo->verx10 < 45 ? 6 : 1; // defaults to MAX (8)
426 /* 3DSTATE_CONSTANT_XS requires the start of UBOs to be 32B aligned */
427 caps->constant_buffer_offset_alignment = 32;
428 caps->min_map_buffer_alignment = CROCUS_MAP_BUFFER_ALIGNMENT;
429 caps->shader_buffer_offset_alignment = devinfo->ver >= 7 ? 4 : 0;
430 caps->max_shader_buffer_size = devinfo->ver >= 7 ? (1 << 27) : 0;
431 caps->texture_buffer_offset_alignment = 16; // XXX: u_screen says 256 is the minimum value...
432 caps->texture_transfer_modes = PIPE_TEXTURE_TRANSFER_BLIT;
433 caps->max_texel_buffer_elements = CROCUS_MAX_TEXTURE_BUFFER_SIZE;
434 caps->max_viewports = devinfo->ver >= 6 ? 16 : 1;
435 caps->max_geometry_output_vertices = devinfo->ver >= 6 ? 256 : 0;
436 caps->max_geometry_total_output_components = devinfo->ver >= 6 ? 1024 : 0;
437 caps->max_gs_invocations = devinfo->ver >= 7 ? 32 : 1;
438 caps->max_texture_gather_components = devinfo->ver >= 7 ? 4 :
439 (devinfo->ver == 6 ? 1 : 0);
440 caps->min_texture_gather_offset = devinfo->ver >= 7 ? -32 :
441 (devinfo->ver == 6 ? -8 : 0);
442 caps->max_texture_gather_offset = devinfo->ver >= 7 ? 31 :
443 (devinfo->ver == 6 ? 7 : 0);
444 caps->max_vertex_streams = devinfo->ver >= 7 ? 4 : 1;
445 caps->vendor_id = 0x8086;
446 caps->device_id = screen->pci_id;
447
448 /* Once a batch uses more than 75% of the maximum mappable size, we
449 * assume that there's some fragmentation, and we start doing extra
450 * flushing, etc. That's the big cliff apps will care about.
451 */
452 const unsigned gpu_mappable_megabytes =
453 (screen->aperture_threshold) / (1024 * 1024);
454
455 const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
456 const long system_page_size = sysconf(_SC_PAGE_SIZE);
457
458 if (system_memory_pages <= 0 || system_page_size <= 0) {
459 caps->video_memory = -1;
460 } else {
461 const uint64_t system_memory_bytes =
462 (uint64_t) system_memory_pages * (uint64_t) system_page_size;
463
464 const unsigned system_memory_megabytes =
465 (unsigned) (system_memory_bytes / (1024 * 1024));
466
467 caps->video_memory = MIN2(system_memory_megabytes, gpu_mappable_megabytes);
468 }
469
470 caps->max_shader_patch_varyings =
471 caps->max_varyings = (screen->devinfo.ver >= 6) ? 32 : 16;
472 /* AMD_pinned_memory assumes the flexibility of using client memory
473 * for any buffer (incl. vertex buffers) which rules out the prospect
474 * of using snooped buffers, as using snooped buffers without
475 * cogniscience is likely to be detrimental to performance and require
476 * extensive checking in the driver for correctness, e.g. to prevent
477 * illegal snoop <-> snoop transfers.
478 */
479 caps->resource_from_user_memory = devinfo->has_llc;
480 caps->throttle = !screen->driconf.disable_throttling;
481
482 caps->context_priority_mask =
483 PIPE_CONTEXT_PRIORITY_LOW |
484 PIPE_CONTEXT_PRIORITY_MEDIUM |
485 PIPE_CONTEXT_PRIORITY_HIGH;
486
487 caps->frontend_noop = true;
488 // XXX: don't hardcode 00:00:02.0 PCI here
489 caps->pci_group = 0;
490 caps->pci_bus = 0;
491 caps->pci_device = 2;
492 caps->pci_function = 0;
493
494 caps->hardware_gl_select = false;
495
496 caps->timer_resolution = DIV_ROUND_UP(1000000000ull, devinfo->timestamp_frequency);
497
498 caps->min_line_width =
499 caps->min_line_width_aa =
500 caps->min_point_size =
501 caps->min_point_size_aa = 1;
502
503 caps->point_size_granularity =
504 caps->line_width_granularity = 0.1;
505
506 caps->max_line_width =
507 caps->max_line_width_aa = devinfo->ver >= 6 ? 7.375f : 7.0f;
508
509 caps->max_point_size =
510 caps->max_point_size_aa = 255.0f;
511
512 caps->max_texture_anisotropy = 16.0f;
513 caps->max_texture_lod_bias = 15.0f;
514 }
515
516 static uint64_t
crocus_get_timestamp(struct pipe_screen * pscreen)517 crocus_get_timestamp(struct pipe_screen *pscreen)
518 {
519 struct crocus_screen *screen = (struct crocus_screen *) pscreen;
520 uint64_t result;
521
522 if (!intel_gem_read_render_timestamp(crocus_bufmgr_get_fd(screen->bufmgr),
523 screen->devinfo.kmd_type, &result))
524 return 0;
525
526 result = intel_device_info_timebase_scale(&screen->devinfo, result);
527 result &= (1ull << TIMESTAMP_BITS) - 1;
528
529 return result;
530 }
531
532 void
crocus_screen_destroy(struct crocus_screen * screen)533 crocus_screen_destroy(struct crocus_screen *screen)
534 {
535 intel_perf_free(screen->perf_cfg);
536 u_transfer_helper_destroy(screen->base.transfer_helper);
537 crocus_bufmgr_unref(screen->bufmgr);
538 disk_cache_destroy(screen->disk_cache);
539 close(screen->winsys_fd);
540 ralloc_free(screen);
541 }
542
543 static void
crocus_screen_unref(struct pipe_screen * pscreen)544 crocus_screen_unref(struct pipe_screen *pscreen)
545 {
546 crocus_pscreen_unref(pscreen);
547 }
548
549 static void
crocus_query_memory_info(struct pipe_screen * pscreen,struct pipe_memory_info * info)550 crocus_query_memory_info(struct pipe_screen *pscreen,
551 struct pipe_memory_info *info)
552 {
553 }
554
555 static const void *
crocus_get_compiler_options(struct pipe_screen * pscreen,enum pipe_shader_ir ir,enum pipe_shader_type pstage)556 crocus_get_compiler_options(struct pipe_screen *pscreen,
557 enum pipe_shader_ir ir,
558 enum pipe_shader_type pstage)
559 {
560 struct crocus_screen *screen = (struct crocus_screen *) pscreen;
561 gl_shader_stage stage = stage_from_pipe(pstage);
562 assert(ir == PIPE_SHADER_IR_NIR);
563
564 return screen->compiler->nir_options[stage];
565 }
566
567 static struct disk_cache *
crocus_get_disk_shader_cache(struct pipe_screen * pscreen)568 crocus_get_disk_shader_cache(struct pipe_screen *pscreen)
569 {
570 struct crocus_screen *screen = (struct crocus_screen *) pscreen;
571 return screen->disk_cache;
572 }
573
574 static const struct intel_l3_config *
crocus_get_default_l3_config(const struct intel_device_info * devinfo,bool compute)575 crocus_get_default_l3_config(const struct intel_device_info *devinfo,
576 bool compute)
577 {
578 bool wants_dc_cache = true;
579 bool has_slm = compute;
580 const struct intel_l3_weights w =
581 intel_get_default_l3_weights(devinfo, wants_dc_cache, has_slm);
582 return intel_get_l3_config(devinfo, w);
583 }
584
585 static void
crocus_shader_debug_log(void * data,unsigned * id,const char * fmt,...)586 crocus_shader_debug_log(void *data, unsigned *id, const char *fmt, ...)
587 {
588 struct util_debug_callback *dbg = data;
589 va_list args;
590
591 if (!dbg->debug_message)
592 return;
593
594 va_start(args, fmt);
595 dbg->debug_message(dbg->data, id, UTIL_DEBUG_TYPE_SHADER_INFO, fmt, args);
596 va_end(args);
597 }
598
599 static void
crocus_shader_perf_log(void * data,unsigned * id,const char * fmt,...)600 crocus_shader_perf_log(void *data, unsigned *id, const char *fmt, ...)
601 {
602 struct util_debug_callback *dbg = data;
603 va_list args;
604 va_start(args, fmt);
605
606 if (INTEL_DEBUG(DEBUG_PERF)) {
607 va_list args_copy;
608 va_copy(args_copy, args);
609 vfprintf(stderr, fmt, args_copy);
610 va_end(args_copy);
611 }
612
613 if (dbg->debug_message) {
614 dbg->debug_message(dbg->data, id, UTIL_DEBUG_TYPE_PERF_INFO, fmt, args);
615 }
616
617 va_end(args);
618 }
619
620 static int
crocus_screen_get_fd(struct pipe_screen * pscreen)621 crocus_screen_get_fd(struct pipe_screen *pscreen)
622 {
623 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
624
625 return screen->winsys_fd;
626 }
627
628 struct pipe_screen *
crocus_screen_create(int fd,const struct pipe_screen_config * config)629 crocus_screen_create(int fd, const struct pipe_screen_config *config)
630 {
631 struct crocus_screen *screen = rzalloc(NULL, struct crocus_screen);
632 if (!screen)
633 return NULL;
634
635 if (!intel_get_device_info_from_fd(fd, &screen->devinfo, 4, 8))
636 return NULL;
637 screen->pci_id = screen->devinfo.pci_device_id;
638
639 if (screen->devinfo.ver > 8)
640 return NULL;
641
642 if (screen->devinfo.ver == 8) {
643 /* bind to cherryview or bdw if forced */
644 if (screen->devinfo.platform != INTEL_PLATFORM_CHV &&
645 !getenv("CROCUS_GEN8"))
646 return NULL;
647 }
648
649 p_atomic_set(&screen->refcount, 1);
650
651 screen->aperture_bytes = get_aperture_size(fd);
652 screen->aperture_threshold = screen->aperture_bytes * 3 / 4;
653
654 driParseConfigFiles(config->options, config->options_info, 0, "crocus",
655 NULL, NULL, NULL, 0, NULL, 0);
656
657 bool bo_reuse = false;
658 int bo_reuse_mode = driQueryOptioni(config->options, "bo_reuse");
659 switch (bo_reuse_mode) {
660 case DRI_CONF_BO_REUSE_DISABLED:
661 break;
662 case DRI_CONF_BO_REUSE_ALL:
663 bo_reuse = true;
664 break;
665 }
666
667 screen->bufmgr = crocus_bufmgr_get_for_fd(&screen->devinfo, fd, bo_reuse);
668 if (!screen->bufmgr)
669 return NULL;
670 screen->fd = crocus_bufmgr_get_fd(screen->bufmgr);
671 screen->winsys_fd = fd;
672
673 process_intel_debug_variable();
674
675 screen->driconf.dual_color_blend_by_location =
676 driQueryOptionb(config->options, "dual_color_blend_by_location");
677 screen->driconf.disable_throttling =
678 driQueryOptionb(config->options, "disable_throttling");
679 screen->driconf.always_flush_cache =
680 driQueryOptionb(config->options, "always_flush_cache");
681 screen->driconf.limit_trig_input_range =
682 driQueryOptionb(config->options, "limit_trig_input_range");
683 screen->driconf.lower_depth_range_rate =
684 driQueryOptionf(config->options, "lower_depth_range_rate");
685
686 screen->precompile = debug_get_bool_option("shader_precompile", true);
687
688 isl_device_init(&screen->isl_dev, &screen->devinfo);
689
690 screen->compiler = elk_compiler_create(screen, &screen->devinfo);
691 screen->compiler->shader_debug_log = crocus_shader_debug_log;
692 screen->compiler->shader_perf_log = crocus_shader_perf_log;
693 screen->compiler->supports_shader_constants = false;
694 screen->compiler->constant_buffer_0_is_relative = true;
695
696 if (screen->devinfo.ver >= 7) {
697 screen->l3_config_3d = crocus_get_default_l3_config(&screen->devinfo, false);
698 screen->l3_config_cs = crocus_get_default_l3_config(&screen->devinfo, true);
699 }
700
701 crocus_disk_cache_init(screen);
702
703 slab_create_parent(&screen->transfer_pool,
704 sizeof(struct crocus_transfer), 64);
705
706 struct pipe_screen *pscreen = &screen->base;
707
708 crocus_init_screen_fence_functions(pscreen);
709 crocus_init_screen_resource_functions(pscreen);
710
711 pscreen->destroy = crocus_screen_unref;
712 pscreen->get_name = crocus_get_name;
713 pscreen->get_vendor = crocus_get_vendor;
714 pscreen->get_device_vendor = crocus_get_device_vendor;
715 pscreen->get_screen_fd = crocus_screen_get_fd;
716 pscreen->get_shader_param = crocus_get_shader_param;
717 pscreen->get_compute_param = crocus_get_compute_param;
718 pscreen->get_compiler_options = crocus_get_compiler_options;
719 pscreen->get_device_uuid = crocus_get_device_uuid;
720 pscreen->get_driver_uuid = crocus_get_driver_uuid;
721 pscreen->get_disk_shader_cache = crocus_get_disk_shader_cache;
722 pscreen->is_format_supported = crocus_is_format_supported;
723 pscreen->context_create = crocus_create_context;
724 pscreen->get_timestamp = crocus_get_timestamp;
725 pscreen->query_memory_info = crocus_query_memory_info;
726 pscreen->get_driver_query_group_info = crocus_get_monitor_group_info;
727 pscreen->get_driver_query_info = crocus_get_monitor_info;
728
729 crocus_init_screen_caps(screen);
730
731 genX_call(&screen->devinfo, crocus_init_screen_state, screen);
732 genX_call(&screen->devinfo, crocus_init_screen_query, screen);
733 return pscreen;
734 }
735