1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <device/mmio.h>
4 #include <drivers/intel/gma/i915_reg.h>
5 #include <intelblocks/early_graphics.h>
6 #include <soc/soc_chip.h>
7
early_graphics_soc_panel_init(void)8 void early_graphics_soc_panel_init(void)
9 {
10 const struct soc_intel_alderlake_config *soc_conf;
11 const struct i915_gpu_panel_config *panel_cfg;
12 void *mmio = (void *)CONFIG_GFX_GMA_DEFAULT_MMIO;
13 uint32_t reg32;
14 unsigned int pwm_period, pwm_polarity, pwm_duty;
15
16 soc_conf = config_of_soc();
17 panel_cfg = &soc_conf->panel_cfg;
18
19 reg32 = ((DIV_ROUND_UP(panel_cfg->cycle_delay_ms, 100) + 1) & 0x1f) << 4;
20 reg32 |= PANEL_POWER_RESET;
21 write32(mmio + PCH_PP_CONTROL, reg32);
22
23 reg32 = ((panel_cfg->up_delay_ms * 10) & 0x1fff) << 16;
24 reg32 |= (panel_cfg->backlight_on_delay_ms * 10) & 0x1fff;
25 write32(mmio + PCH_PP_ON_DELAYS, reg32);
26
27 reg32 = ((panel_cfg->down_delay_ms * 10) & 0x1fff) << 16;
28 reg32 |= (panel_cfg->backlight_off_delay_ms * 10) & 0x1fff;
29 write32(mmio + PCH_PP_OFF_DELAYS, reg32);
30
31 if (!panel_cfg->backlight_pwm_hz)
32 return;
33
34 /* Configure backlight */
35 pwm_polarity = panel_cfg->backlight_polarity ? BXT_BLC_PWM_POLARITY : 0;
36 pwm_period = DIV_ROUND_CLOSEST(CONFIG_CPU_XTAL_HZ,
37 panel_cfg->backlight_pwm_hz);
38 pwm_duty = DIV_ROUND_CLOSEST(pwm_period, 2); /* Start with 50 % */
39 write32(mmio + BXT_BLC_PWM_FREQ(0), pwm_period);
40 write32(mmio + BXT_BLC_PWM_CTL(0), pwm_polarity);
41 write32(mmio + BXT_BLC_PWM_DUTY(0), pwm_duty);
42 }
43