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1 /*
2  * Copyright © 2012 Rob Clark <robclark@freedesktop.org>
3  * SPDX-License-Identifier: MIT
4  *
5  * Authors:
6  *    Rob Clark <robclark@freedesktop.org>
7  *    Jonathan Marek <jonathan@marek.ca>
8  */
9 
10 #include "nir/tgsi_to_nir.h"
11 #include "pipe/p_state.h"
12 #include "tgsi/tgsi_dump.h"
13 #include "util/format/u_format.h"
14 #include "util/u_inlines.h"
15 #include "util/u_memory.h"
16 #include "util/u_string.h"
17 
18 #include "freedreno_program.h"
19 
20 #include "ir2/instr-a2xx.h"
21 #include "fd2_program.h"
22 #include "fd2_texture.h"
23 #include "fd2_util.h"
24 #include "ir2.h"
25 
26 static struct fd2_shader_stateobj *
create_shader(struct pipe_context * pctx,gl_shader_stage type)27 create_shader(struct pipe_context *pctx, gl_shader_stage type)
28 {
29    struct fd2_shader_stateobj *so = CALLOC_STRUCT(fd2_shader_stateobj);
30    if (!so)
31       return NULL;
32    so->type = type;
33    so->is_a20x = is_a20x(fd_context(pctx)->screen);
34    return so;
35 }
36 
37 static void
delete_shader(struct fd2_shader_stateobj * so)38 delete_shader(struct fd2_shader_stateobj *so)
39 {
40    if (!so)
41       return;
42    ralloc_free(so->nir);
43    for (int i = 0; i < ARRAY_SIZE(so->variant); i++)
44       free(so->variant[i].info.dwords);
45    free(so);
46 }
47 
48 static void
emit(struct fd_ringbuffer * ring,gl_shader_stage type,struct ir2_shader_info * info,struct util_dynarray * patches)49 emit(struct fd_ringbuffer *ring, gl_shader_stage type,
50      struct ir2_shader_info *info, struct util_dynarray *patches)
51 {
52    unsigned i;
53 
54    assert(info->sizedwords);
55 
56    OUT_PKT3(ring, CP_IM_LOAD_IMMEDIATE, 2 + info->sizedwords);
57    OUT_RING(ring, type == MESA_SHADER_FRAGMENT);
58    OUT_RING(ring, info->sizedwords);
59 
60    if (patches)
61       util_dynarray_append(patches, uint32_t *,
62                            &ring->cur[info->mem_export_ptr]);
63 
64    for (i = 0; i < info->sizedwords; i++)
65       OUT_RING(ring, info->dwords[i]);
66 }
67 
68 static int
ir2_glsl_type_size(const struct glsl_type * type,bool bindless)69 ir2_glsl_type_size(const struct glsl_type *type, bool bindless)
70 {
71    return glsl_count_attribute_slots(type, false);
72 }
73 
74 static void *
fd2_fp_state_create(struct pipe_context * pctx,const struct pipe_shader_state * cso)75 fd2_fp_state_create(struct pipe_context *pctx,
76                     const struct pipe_shader_state *cso)
77 {
78    struct fd2_shader_stateobj *so = create_shader(pctx, MESA_SHADER_FRAGMENT);
79    if (!so)
80       return NULL;
81 
82    so->nir = (cso->type == PIPE_SHADER_IR_NIR)
83                 ? cso->ir.nir
84                 : tgsi_to_nir(cso->tokens, pctx->screen, false);
85 
86    NIR_PASS_V(so->nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
87               ir2_glsl_type_size,
88               nir_lower_io_use_interpolated_input_intrinsics);
89 
90    if (ir2_optimize_nir(so->nir, true))
91       goto fail;
92 
93    so->first_immediate = so->nir->num_uniforms;
94 
95    ir2_compile(so, 0, NULL);
96 
97    ralloc_free(so->nir);
98    so->nir = NULL;
99    return so;
100 
101 fail:
102    delete_shader(so);
103    return NULL;
104 }
105 
106 static void
fd2_fp_state_delete(struct pipe_context * pctx,void * hwcso)107 fd2_fp_state_delete(struct pipe_context *pctx, void *hwcso)
108 {
109    struct fd2_shader_stateobj *so = hwcso;
110    delete_shader(so);
111 }
112 
113 static void *
fd2_vp_state_create(struct pipe_context * pctx,const struct pipe_shader_state * cso)114 fd2_vp_state_create(struct pipe_context *pctx,
115                     const struct pipe_shader_state *cso)
116 {
117    struct fd2_shader_stateobj *so = create_shader(pctx, MESA_SHADER_VERTEX);
118    if (!so)
119       return NULL;
120 
121    so->nir = (cso->type == PIPE_SHADER_IR_NIR)
122                 ? cso->ir.nir
123                 : tgsi_to_nir(cso->tokens, pctx->screen, false);
124 
125    NIR_PASS_V(so->nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
126               ir2_glsl_type_size, (nir_lower_io_options)0);
127 
128    if (ir2_optimize_nir(so->nir, true))
129       goto fail;
130 
131    so->first_immediate = so->nir->num_uniforms;
132 
133    /* compile binning variant now */
134    ir2_compile(so, 0, NULL);
135 
136    return so;
137 
138 fail:
139    delete_shader(so);
140    return NULL;
141 }
142 
143 static void
fd2_vp_state_delete(struct pipe_context * pctx,void * hwcso)144 fd2_vp_state_delete(struct pipe_context *pctx, void *hwcso)
145 {
146    struct fd2_shader_stateobj *so = hwcso;
147    delete_shader(so);
148 }
149 
150 static void
patch_vtx_fetch(struct fd_context * ctx,struct pipe_vertex_element * elem,instr_fetch_vtx_t * instr,uint16_t dst_swiz)151 patch_vtx_fetch(struct fd_context *ctx, struct pipe_vertex_element *elem,
152                 instr_fetch_vtx_t *instr, uint16_t dst_swiz) assert_dt
153 {
154    struct surface_format fmt = fd2_pipe2surface(elem->src_format);
155 
156    instr->dst_swiz = fd2_vtx_swiz(elem->src_format, dst_swiz);
157    instr->format_comp_all = fmt.sign == SQ_TEX_SIGN_SIGNED;
158    instr->num_format_all = fmt.num_format;
159    instr->format = fmt.format;
160    instr->exp_adjust_all = fmt.exp_adjust;
161    instr->stride = elem->src_stride;
162    instr->offset = elem->src_offset;
163 }
164 
165 static void
patch_fetches(struct fd_context * ctx,struct ir2_shader_info * info,struct fd_vertex_stateobj * vtx,struct fd_texture_stateobj * tex)166 patch_fetches(struct fd_context *ctx, struct ir2_shader_info *info,
167               struct fd_vertex_stateobj *vtx,
168               struct fd_texture_stateobj *tex) assert_dt
169 {
170    for (int i = 0; i < info->num_fetch_instrs; i++) {
171       struct ir2_fetch_info *fi = &info->fetch_info[i];
172 
173       instr_fetch_t *instr = (instr_fetch_t *)&info->dwords[fi->offset];
174       if (instr->opc == VTX_FETCH) {
175          unsigned idx =
176             (instr->vtx.const_index - 20) * 3 + instr->vtx.const_index_sel;
177          patch_vtx_fetch(ctx, &vtx->pipe[idx], &instr->vtx, fi->vtx.dst_swiz);
178          continue;
179       }
180 
181       assert(instr->opc == TEX_FETCH);
182       instr->tex.const_idx = fd2_get_const_idx(ctx, tex, fi->tex.samp_id);
183       instr->tex.src_swiz = fi->tex.src_swiz;
184    }
185 }
186 
187 void
fd2_program_emit(struct fd_context * ctx,struct fd_ringbuffer * ring,struct fd_program_stateobj * prog)188 fd2_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
189                  struct fd_program_stateobj *prog)
190 {
191    struct fd2_shader_stateobj *fp = NULL, *vp;
192    struct ir2_shader_info *fpi, *vpi;
193    struct ir2_frag_linkage *f;
194    uint8_t vs_gprs, fs_gprs = 0, vs_export = 0;
195    enum a2xx_sq_ps_vtx_mode mode = POSITION_1_VECTOR;
196    bool binning = (ctx->batch && ring == ctx->batch->binning);
197    unsigned variant = 0;
198 
199    vp = prog->vs;
200 
201    /* find variant matching the linked fragment shader */
202    if (!binning) {
203       fp = prog->fs;
204       for (variant = 1; variant < ARRAY_SIZE(vp->variant); variant++) {
205          /* if checked all variants, compile a new variant */
206          if (!vp->variant[variant].info.sizedwords) {
207             ir2_compile(vp, variant, fp);
208             break;
209          }
210 
211          /* check if fragment shader linkage matches */
212          if (!memcmp(&vp->variant[variant].f, &fp->variant[0].f,
213                      sizeof(struct ir2_frag_linkage)))
214             break;
215       }
216       assert(variant < ARRAY_SIZE(vp->variant));
217    }
218 
219    vpi = &vp->variant[variant].info;
220    fpi = &fp->variant[0].info;
221    f = &fp->variant[0].f;
222 
223    /* clear/gmem2mem/mem2gmem need to be changed to remove this condition */
224    if (prog != &ctx->solid_prog && prog != &ctx->blit_prog[0]) {
225       patch_fetches(ctx, vpi, ctx->vtx.vtx, &ctx->tex[PIPE_SHADER_VERTEX]);
226       if (fp)
227          patch_fetches(ctx, fpi, NULL, &ctx->tex[PIPE_SHADER_FRAGMENT]);
228    }
229 
230    emit(ring, MESA_SHADER_VERTEX, vpi,
231         binning ? &ctx->batch->shader_patches : NULL);
232 
233    if (fp) {
234       emit(ring, MESA_SHADER_FRAGMENT, fpi, NULL);
235       fs_gprs = (fpi->max_reg < 0) ? 0x80 : fpi->max_reg;
236       vs_export = MAX2(1, f->inputs_count) - 1;
237    }
238 
239    vs_gprs = (vpi->max_reg < 0) ? 0x80 : vpi->max_reg;
240 
241    if (vp->writes_psize && !binning)
242       mode = POSITION_2_VECTORS_SPRITE;
243 
244    /* set register to use for param (fragcoord/pointcoord/frontfacing) */
245    OUT_PKT3(ring, CP_SET_CONSTANT, 2);
246    OUT_RING(ring, CP_REG(REG_A2XX_SQ_CONTEXT_MISC));
247    OUT_RING(ring,
248             A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(CENTERS_ONLY) |
249                COND(fp, A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS(f->inputs_count)) |
250                /* we need SCREEN_XY for both fragcoord and frontfacing */
251                A2XX_SQ_CONTEXT_MISC_SC_OUTPUT_SCREEN_XY);
252 
253    OUT_PKT3(ring, CP_SET_CONSTANT, 2);
254    OUT_RING(ring, CP_REG(REG_A2XX_SQ_PROGRAM_CNTL));
255    OUT_RING(ring,
256             A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE(2) |
257                A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE(mode) |
258                A2XX_SQ_PROGRAM_CNTL_VS_RESOURCE |
259                A2XX_SQ_PROGRAM_CNTL_PS_RESOURCE |
260                A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT(vs_export) |
261                A2XX_SQ_PROGRAM_CNTL_PS_REGS(fs_gprs) |
262                A2XX_SQ_PROGRAM_CNTL_VS_REGS(vs_gprs) |
263                COND(fp && fp->need_param, A2XX_SQ_PROGRAM_CNTL_PARAM_GEN) |
264                COND(!fp, A2XX_SQ_PROGRAM_CNTL_GEN_INDEX_VTX));
265 }
266 
267 void
fd2_prog_init(struct pipe_context * pctx)268 fd2_prog_init(struct pipe_context *pctx)
269 {
270    struct fd_context *ctx = fd_context(pctx);
271    struct fd_program_stateobj *prog;
272    struct fd2_shader_stateobj *so;
273    struct ir2_shader_info *info;
274    instr_fetch_vtx_t *instr;
275 
276    pctx->create_fs_state = fd2_fp_state_create;
277    pctx->delete_fs_state = fd2_fp_state_delete;
278 
279    pctx->create_vs_state = fd2_vp_state_create;
280    pctx->delete_vs_state = fd2_vp_state_delete;
281 
282    fd_prog_init(pctx);
283 
284    /* XXX maybe its possible to reuse patch_vtx_fetch somehow? */
285 
286    prog = &ctx->solid_prog;
287    so = prog->vs;
288    ir2_compile(prog->vs, 1, prog->fs);
289 
290 #define IR2_FETCH_SWIZ_XY01 0xb08
291 #define IR2_FETCH_SWIZ_XYZ1 0xa88
292 
293    info = &so->variant[1].info;
294 
295    instr = (instr_fetch_vtx_t *)&info->dwords[info->fetch_info[0].offset];
296    instr->const_index = 26;
297    instr->const_index_sel = 0;
298    instr->format = FMT_32_32_32_FLOAT;
299    instr->format_comp_all = false;
300    instr->stride = 12;
301    instr->num_format_all = true;
302    instr->dst_swiz = IR2_FETCH_SWIZ_XYZ1;
303 
304    prog = &ctx->blit_prog[0];
305    so = prog->vs;
306    ir2_compile(prog->vs, 1, prog->fs);
307 
308    info = &so->variant[1].info;
309 
310    instr = (instr_fetch_vtx_t *)&info->dwords[info->fetch_info[0].offset];
311    instr->const_index = 26;
312    instr->const_index_sel = 1;
313    instr->format = FMT_32_32_FLOAT;
314    instr->format_comp_all = false;
315    instr->stride = 8;
316    instr->num_format_all = false;
317    instr->dst_swiz = IR2_FETCH_SWIZ_XY01;
318 
319    instr = (instr_fetch_vtx_t *)&info->dwords[info->fetch_info[1].offset];
320    instr->const_index = 26;
321    instr->const_index_sel = 0;
322    instr->format = FMT_32_32_32_FLOAT;
323    instr->format_comp_all = false;
324    instr->stride = 12;
325    instr->num_format_all = false;
326    instr->dst_swiz = IR2_FETCH_SWIZ_XYZ1;
327 }
328