Home
last modified time | relevance | path

Searched defs:fsqrt (Results 1 – 7 of 7) sorted by relevance

/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s1857 fsqrt d6, d7 define
Darm64-fp-encoding.s148 fsqrt d1, d2 define
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc588 __ fsqrt(d14, d17); in GenerateTestSequenceFP() local
589 __ fsqrt(s4, s14); in GenerateTestSequenceFP() local
2732 __ fsqrt(v6.V2D(), v18.V2D()); in GenerateTestSequenceNEONFP() local
2733 __ fsqrt(v6.V2S(), v18.V2S()); in GenerateTestSequenceNEONFP() local
2734 __ fsqrt(v0.V4S(), v31.V4S()); in GenerateTestSequenceNEONFP() local
Dtest-api-movprfx-aarch64.cc562 __ fsqrt(z2.VnS(), p6.Merging(), z2.VnS()); in TEST() local
1040 __ fsqrt(z20.VnD(), p2.Merging(), z15.VnD()); in TEST() local
1905 __ fsqrt(z23.VnS(), p4.Merging(), z10.VnS()); in TEST() local
Dtest-assembler-fp-aarch64.cc2185 TEST(fsqrt) { in TEST() argument
/external/vixl/src/aarch64/
Dassembler-sve-aarch64.cc1890 void Assembler::fsqrt(const ZRegister& zd, in fsqrt() function in vixl::aarch64::Assembler
Dlogic-aarch64.cc5538 LogicVRegister Simulator::fsqrt(VectorFormat vform, in fsqrt() function in vixl::aarch64::Simulator