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1 /**************************************************************************
2  *
3  * Copyright 2017 Advanced Micro Devices, Inc.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  **************************************************************************/
8 
9 #ifndef _AC_VCN_DEC_H
10 #define _AC_VCN_DEC_H
11 
12 /* VCN programming information shared between gallium/vulkan */
13 #define RDECODE_PKT_TYPE_S(x)        (((unsigned)(x)&0x3) << 30)
14 #define RDECODE_PKT_TYPE_G(x)        (((x) >> 30) & 0x3)
15 #define RDECODE_PKT_TYPE_C           0x3FFFFFFF
16 #define RDECODE_PKT_COUNT_S(x)       (((unsigned)(x)&0x3FFF) << 16)
17 #define RDECODE_PKT_COUNT_G(x)       (((x) >> 16) & 0x3FFF)
18 #define RDECODE_PKT_COUNT_C          0xC000FFFF
19 #define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x)&0xFFFF) << 0)
20 #define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF)
21 #define RDECODE_PKT0_BASE_INDEX_C    0xFFFF0000
22 #define RDECODE_PKT0(index, count)                                                                 \
23    (RDECODE_PKT_TYPE_S(0) | RDECODE_PKT0_BASE_INDEX_S(index) | RDECODE_PKT_COUNT_S(count))
24 
25 #define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2))
26 
27 #define RDECODE_PKT_REG_J(x)  ((unsigned)(x)&0x3FFFF)
28 #define RDECODE_PKT_RES_J(x)  (((unsigned)(x)&0x3F) << 18)
29 #define RDECODE_PKT_COND_J(x) (((unsigned)(x)&0xF) << 24)
30 #define RDECODE_PKT_TYPE_J(x) (((unsigned)(x)&0xF) << 28)
31 #define RDECODE_PKTJ(reg, cond, type)                                                              \
32    (RDECODE_PKT_REG_J(reg) | RDECODE_PKT_RES_J(0) | RDECODE_PKT_COND_J(cond) |                     \
33     RDECODE_PKT_TYPE_J(type))
34 
35 #define RDECODE_IB_PARAM_DECODE_BUFFER                               (0x00000001)
36 #define RDECODE_IB_PARAM_QUERY_BUFFER                                (0x00000002)
37 #define RDECODE_IB_PARAM_PREDICATION_BUFFER                          (0x00000003)
38 #define RDECODE_IB_PARAM_UMD_64BIT_FENCE                             (0x00000005)
39 #define RDECODE_IB_PARAM_UMD_RECORD_TIMESTAMP                        (0x00000006)
40 #define RDECODE_IB_PARAM_UMD_REPORT_EVENT_STATUS                     (0x00000007)
41 #define RDECODE_IB_PARAM_UMD_COPY_MEMORY                             (0x00000008)
42 #define RDECODE_IB_PARAM_UMD_WRITE_MEMORY                            (0x00000009)
43 #define RDECODE_IB_PARAM_FEEDBACK_BUFFER                             (0x0000000A)
44 
45 #define RDECODE_CMDBUF_FLAGS_MSG_BUFFER                              (0x00000001)
46 #define RDECODE_CMDBUF_FLAGS_DPB_BUFFER                              (0x00000002)
47 #define RDECODE_CMDBUF_FLAGS_BITSTREAM_BUFFER                        (0x00000004)
48 #define RDECODE_CMDBUF_FLAGS_DECODING_TARGET_BUFFER                  (0x00000008)
49 #define RDECODE_CMDBUF_FLAGS_FEEDBACK_BUFFER                         (0x00000010)
50 #define RDECODE_CMDBUF_FLAGS_PICTURE_PARAM_BUFFER                    (0x00000020)
51 #define RDECODE_CMDBUF_FLAGS_MB_CONTROL_BUFFER                       (0x00000040)
52 #define RDECODE_CMDBUF_FLAGS_IDCT_COEF_BUFFER                        (0x00000080)
53 #define RDECODE_CMDBUF_FLAGS_PREEMPT_BUFFER                          (0x00000100)
54 #define RDECODE_CMDBUF_FLAGS_IT_SCALING_BUFFER                       (0x00000200)
55 #define RDECODE_CMDBUF_FLAGS_SCALER_TARGET_BUFFER                    (0x00000400)
56 #define RDECODE_CMDBUF_FLAGS_CONTEXT_BUFFER                          (0x00000800)
57 #define RDECODE_CMDBUF_FLAGS_PROB_TBL_BUFFER                         (0x00001000)
58 #define RDECODE_CMDBUF_FLAGS_QUERY_BUFFER                            (0x00002000)
59 #define RDECODE_CMDBUF_FLAGS_PREDICATION_BUFFER                      (0x00004000)
60 #define RDECODE_CMDBUF_FLAGS_SCLR_COEF_BUFFER                        (0x00008000)
61 #define RDECODE_CMDBUF_FLAGS_RECORD_TIMESTAMP                        (0x00010000)
62 #define RDECODE_CMDBUF_FLAGS_REPORT_EVENT_STATUS                     (0x00020000)
63 #define RDECODE_CMDBUF_FLAGS_RESERVED_SIZE_INFO_BUFFER               (0x00040000)
64 #define RDECODE_CMDBUF_FLAGS_LUMA_HIST_BUFFER                        (0x00080000)
65 #define RDECODE_CMDBUF_FLAGS_SESSION_CONTEXT_BUFFER                  (0x00100000)
66 
67 #define RDECODE_CMD_MSG_BUFFER                              0x00000000
68 #define RDECODE_CMD_DPB_BUFFER                              0x00000001
69 #define RDECODE_CMD_DECODING_TARGET_BUFFER                  0x00000002
70 #define RDECODE_CMD_FEEDBACK_BUFFER                         0x00000003
71 #define RDECODE_CMD_PROB_TBL_BUFFER                         0x00000004
72 #define RDECODE_CMD_SESSION_CONTEXT_BUFFER                  0x00000005
73 #define RDECODE_CMD_BITSTREAM_BUFFER                        0x00000100
74 #define RDECODE_CMD_IT_SCALING_TABLE_BUFFER                 0x00000204
75 #define RDECODE_CMD_CONTEXT_BUFFER                          0x00000206
76 #define RDECODE_CMD_WRITE_MEMORY                            0x00000800
77 
78 #define RDECODE_MSG_CREATE                                  0x00000000
79 #define RDECODE_MSG_DECODE                                  0x00000001
80 #define RDECODE_MSG_DESTROY                                 0x00000002
81 
82 #define RDECODE_CODEC_H264                                  0x00000000
83 #define RDECODE_CODEC_VC1                                   0x00000001
84 #define RDECODE_CODEC_MPEG2_VLD                             0x00000003
85 #define RDECODE_CODEC_MPEG4                                 0x00000004
86 #define RDECODE_CODEC_H264_PERF                             0x00000007
87 #define RDECODE_CODEC_JPEG                                  0x00000008
88 #define RDECODE_CODEC_H265                                  0x00000010
89 #define RDECODE_CODEC_VP9                                   0x00000011
90 #define RDECODE_CODEC_AV1                                   0x00000013
91 #define RDECODE_MESSAGE_HEVC_DIRECT_REF_LIST                0x00000015
92 
93 #define RDECODE_ARRAY_MODE_LINEAR                           0x00000000
94 #define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED         0x00000001
95 #define RDECODE_ARRAY_MODE_1D_THIN                          0x00000002
96 #define RDECODE_ARRAY_MODE_2D_THIN                          0x00000004
97 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR         0x00000004
98 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED          0x00000005
99 
100 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX10                0x00000000
101 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX9                 0x00000001
102 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX8                 0x00000002
103 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX11                0x00000003
104 
105 #define RDECODE_H264_PROFILE_BASELINE                       0x00000000
106 #define RDECODE_H264_PROFILE_MAIN                           0x00000001
107 #define RDECODE_H264_PROFILE_HIGH                           0x00000002
108 #define RDECODE_H264_PROFILE_STEREO_HIGH                    0x00000003
109 #define RDECODE_H264_PROFILE_MVC                            0x00000004
110 
111 #define RDECODE_VC1_PROFILE_SIMPLE                          0x00000000
112 #define RDECODE_VC1_PROFILE_MAIN                            0x00000001
113 #define RDECODE_VC1_PROFILE_ADVANCED                        0x00000002
114 
115 #define RDECODE_SW_MODE_LINEAR                              0x00000000
116 /* for legacy VCN generations */
117 #define RDECODE_256B_S                                      0x00000001
118 #define RDECODE_256B_D                                      0x00000002
119 #define RDECODE_4KB_S                                       0x00000005
120 #define RDECODE_4KB_D                                       0x00000006
121 #define RDECODE_64KB_S                                      0x00000009
122 #define RDECODE_64KB_D                                      0x0000000A
123 #define RDECODE_4KB_S_X                                     0x00000015
124 #define RDECODE_4KB_D_X                                     0x00000016
125 #define RDECODE_64KB_S_X                                    0x00000019
126 #define RDECODE_64KB_D_X                                    0x0000001A
127 /* for VCN5 */
128 #define RDECODE_VCN5_256B_D                                 0x00000001
129 
130 #define RDECODE_TILE_LINEAR                                 0x00000000
131 #define RDECODE_TILE_8X4                                    0x00000001
132 #define RDECODE_TILE_8X8                                    0x00000002
133 #define RDECODE_TILE_32AS8                                  0x00000003
134 
135 #define RDECODE_MESSAGE_NOT_SUPPORTED                       0x00000000
136 #define RDECODE_MESSAGE_CREATE                              0x00000001
137 #define RDECODE_MESSAGE_DECODE                              0x00000002
138 #define RDECODE_MESSAGE_DRM                                 0x00000003
139 #define RDECODE_MESSAGE_AVC                                 0x00000006
140 #define RDECODE_MESSAGE_VC1                                 0x00000007
141 #define RDECODE_MESSAGE_MPEG2_VLD                           0x0000000A
142 #define RDECODE_MESSAGE_MPEG4_ASP_VLD                       0x0000000B
143 #define RDECODE_MESSAGE_HEVC                                0x0000000D
144 #define RDECODE_MESSAGE_VP9                                 0x0000000E
145 #define RDECODE_MESSAGE_DYNAMIC_DPB                         0x00000010
146 #define RDECODE_MESSAGE_AV1                                 0x00000011
147 
148 #define RDECODE_FEEDBACK_PROFILING                          0x00000001
149 
150 #define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT  7
151 
152 #define RDECODE_VP9_PROBS_DATA_SIZE                         2304
153 
154 /* *** decode flags *** */
155 #define RDECODE_FLAGS_USE_DYNAMIC_DPB_MASK                  0x00000001
156 #define RDECODE_FLAGS_USE_PAL_MASK                          0x00000008
157 #define RDECODE_FLAGS_DPB_RESIZE_MASK                       0x00000100
158 
159 #define mmUVD_JPEG_CNTL                                     0x0200
160 #define mmUVD_JPEG_CNTL_BASE_IDX                            1
161 #define mmUVD_JPEG_RB_BASE                                  0x0201
162 #define mmUVD_JPEG_RB_BASE_BASE_IDX                         1
163 #define mmUVD_JPEG_RB_WPTR                                  0x0202
164 #define mmUVD_JPEG_RB_WPTR_BASE_IDX                         1
165 #define mmUVD_JPEG_RB_RPTR                                  0x0203
166 #define mmUVD_JPEG_RB_RPTR_BASE_IDX                         1
167 #define mmUVD_JPEG_RB_SIZE                                  0x0204
168 #define mmUVD_JPEG_RB_SIZE_BASE_IDX                         1
169 #define mmUVD_JPEG_TIER_CNTL2                               0x021a
170 #define mmUVD_JPEG_TIER_CNTL2_BASE_IDX                      1
171 #define mmUVD_JPEG_UV_TILING_CTRL                           0x021c
172 #define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX                  1
173 #define mmUVD_JPEG_TILING_CTRL                              0x021e
174 #define mmUVD_JPEG_TILING_CTRL_BASE_IDX                     1
175 #define mmUVD_JPEG_OUTBUF_RPTR                              0x0220
176 #define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX                     1
177 #define mmUVD_JPEG_OUTBUF_WPTR                              0x0221
178 #define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX                     1
179 #define mmUVD_JPEG_PITCH                                    0x0222
180 #define mmUVD_JPEG_PITCH_BASE_IDX                           1
181 #define mmUVD_JPEG_INT_EN                                   0x0229
182 #define mmUVD_JPEG_INT_EN_BASE_IDX                          1
183 #define mmUVD_JPEG_UV_PITCH                                 0x022b
184 #define mmUVD_JPEG_UV_PITCH_BASE_IDX                        1
185 #define mmUVD_JPEG_INDEX                                    0x023e
186 #define mmUVD_JPEG_INDEX_BASE_IDX                           1
187 #define mmUVD_JPEG_DATA                                     0x023f
188 #define mmUVD_JPEG_DATA_BASE_IDX                            1
189 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH                 0x0438
190 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX        1
191 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW                  0x0439
192 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX         1
193 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH                  0x045a
194 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX         1
195 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW                   0x045b
196 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX          1
197 #define mmUVD_CTX_INDEX                                     0x0528
198 #define mmUVD_CTX_INDEX_BASE_IDX                            1
199 #define mmUVD_CTX_DATA                                      0x0529
200 #define mmUVD_CTX_DATA_BASE_IDX                             1
201 #define mmUVD_SOFT_RESET                                    0x05a0
202 #define mmUVD_SOFT_RESET_BASE_IDX                           1
203 
204 #define vcnipUVD_JPEG_DEC_SOFT_RST                          0x402f
205 #define vcnipUVD_JRBC_IB_COND_RD_TIMER                      0x408e
206 #define vcnipUVD_JRBC_IB_REF_DATA                           0x408f
207 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH               0x40e1
208 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW                0x40e0
209 #define vcnipUVD_JPEG_RB_BASE                               0x4001
210 #define vcnipUVD_JPEG_RB_SIZE                               0x4004
211 #define vcnipUVD_JPEG_RB_WPTR                               0x4002
212 #define vcnipUVD_JPEG_PITCH                                 0x401f
213 #define vcnipUVD_JPEG_UV_PITCH                              0x4020
214 #define vcnipJPEG_DEC_ADDR_MODE                             0x4027
215 #define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE                0x4024
216 #define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE               0x4025
217 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH              0x40e3
218 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW               0x40e2
219 #define vcnipUVD_JPEG_INDEX                                 0x402c
220 #define vcnipUVD_JPEG_DATA                                  0x402d
221 #define vcnipUVD_JPEG_TIER_CNTL2                            0x400f
222 #define vcnipUVD_JPEG_OUTBUF_RPTR                           0x401e
223 #define vcnipUVD_JPEG_OUTBUF_CNTL                           0x401c
224 #define vcnipUVD_JPEG_INT_EN                                0x400a
225 #define vcnipUVD_JPEG_CNTL                                  0x4000
226 #define vcnipUVD_JPEG_RB_RPTR                               0x4003
227 #define vcnipUVD_JPEG_OUTBUF_WPTR                           0x401d
228 #define vcnipUVD_JPEG_DEC_SOFT_RST_1                        0x4051
229 #define vcnipUVD_JPEG_PITCH_1                               0x4043
230 #define vcnipUVD_JPEG_UV_PITCH_1                            0x4044
231 #define vcnipJPEG_DEC_ADDR_MODE_1                           0x404B
232 #define vcnipUVD_JPEG_TIER_CNTL2_1                          0x400E
233 #define vcnipUVD_JPEG_OUTBUF_CNTL_1                         0x4040
234 #define vcnipUVD_JPEG_OUTBUF_WPTR_1                         0x4041
235 #define vcnipUVD_JPEG_OUTBUF_RPTR_1                         0x4042
236 #define vcnipUVD_JPEG_LUMA_BASE0_0                          0x41C0
237 #define vcnipUVD_JPEG_CHROMA_BASE0_0                        0x41C1
238 #define vcnipUVD_JPEG_CHROMAV_BASE0_0                       0x41C2
239 #define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE_1              0x4048
240 #define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE_1             0x4049
241 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_1            0x40B5
242 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_1             0x40B4
243 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_1             0x40B3
244 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW_1              0x40B2
245 #define vcnipUVD_JPEG_ROI_CROP_POS_START                    0x401B
246 #define vcnipUVD_JPEG_ROI_CROP_POS_STRIDE                   0x401C
247 #define vcnipUVD_JPEG_INT_STAT                              0x400B
248 #define vcnipUVD_JPEG_FC_SPS_INFO                           0x4052
249 #define vcnipUVD_JPEG_SPS_INFO                              0x4006
250 #define vcnipUVD_JPEG_FC_R_COEF                             0x4018
251 #define vcnipUVD_JPEG_FC_G_COEF                             0x4019
252 #define vcnipUVD_JPEG_FC_B_COEF                             0x401A
253 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL0                     0x4010
254 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL1                     0x4011
255 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL2                     0x4012
256 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL3                     0x4013
257 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL0                     0x4014
258 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL1                     0x4015
259 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL2                     0x4016
260 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL3                     0x4017
261 #define vcnipUVD_JPEG_FC_TMEOUT_CNT                         0x4183
262 #define vcnipUVD_JPEG_SPS1_INFO                             0x4007
263 
264 #define UVD_BASE_INST0_SEG0                                 0x00007800
265 #define UVD_BASE_INST0_SEG1                                 0x00007E00
266 #define UVD_BASE_INST0_SEG2                                 0
267 #define UVD_BASE_INST0_SEG3                                 0
268 #define UVD_BASE_INST0_SEG4                                 0
269 
270 #define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg)
271 
272 #define COND0 0
273 #define COND1 1
274 #define COND2 2
275 #define COND3 3
276 #define COND4 4
277 #define COND5 5
278 #define COND6 6
279 #define COND7 7
280 
281 #define TYPE0 0
282 #define TYPE1 1
283 #define TYPE2 2
284 #define TYPE3 3
285 #define TYPE4 4
286 #define TYPE5 5
287 #define TYPE6 6
288 #define TYPE7 7
289 
290 /* VP9 Frame header flags */
291 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_SHIFT      (14)
292 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT     (13)
293 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT        (12)
294 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT       (11)
295 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT     (10)
296 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9)
297 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT      (8)
298 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT         (7)
299 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6)
300 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT        (5)
301 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT      (4)
302 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT                   (3)
303 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT         (2)
304 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT                   (1)
305 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT          (0)
306 
307 
308 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_MASK      (0x00004000)
309 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK     (0x00002000)
310 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK        (0x00001000)
311 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK       (0x00000800)
312 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK     (0x00000400)
313 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200)
314 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK      (0x00000100)
315 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK         (0x00000080)
316 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040)
317 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK        (0x00000020)
318 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK      (0x00000010)
319 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK                   (0x00000008)
320 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK         (0x00000004)
321 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK                   (0x00000002)
322 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK          (0x00000001)
323 
324 /* Drm definitions */
325 #define DRM_CMD_KEY_SHIFT              0
326 #define DRM_CMD_CNT_KEY_SHIFT          1
327 #define DRM_CMD_CNT_DATA_SHIFT         2
328 #define DRM_CMD_OFFSET_SHIFT           3
329 #define DRM_CMD_SESSION_SEL_SHIFT      4
330 #define DRM_CMD_UNWRAP_KEY_SHIFT       8
331 #define DRM_CMD_GEN_MASK_SHIFT         9
332 #define DRM_CMD_ALGORITHM_SHIFT        10
333 #define DRM_CMD_BYTE_MASK_SHIFT        16
334 #define DRM_CMD_DRM_BYPASS_SHIFT       31
335 
336 #define DRM_CMD_KEY_MASK               (0x00000001)
337 #define DRM_CMD_CNT_KEY_MASK           (0x00000002)
338 #define DRM_CMD_CNT_DATA_MASK          (0x00000004)
339 #define DRM_CMD_OFFSET_MASK            (0x00000008)
340 #define DRM_CMD_SESSION_SEL_MASK       (0x000000F0)
341 #define DRM_CMD_UNWRAP_KEY_MASK        (0x00000100)
342 #define DRM_CMD_GEN_MASK_MASK          (0x00000200)
343 #define DRM_CMD_ALGORITHM_MASK         (0x00000C00)
344 #define DRM_CMD_BYTE_MASK_MASK         (0x00FF0000)
345 #define DRM_CMD_DRM_BYPASS_MASK        (0x80000000)
346 
347 /* Drm_cntl definitions */
348 #define DRM_CNTL_ENC_BYTECNT_SHIFT     (6)
349 #define DRM_CNTL_CLR_BYTECNT_SHIFT     (16)
350 #define DRM_CNTL_BYPASS_SHIFT          (24)
351 #define DRM_CNTL_PARTIAL_MODE_SHIFT    (25)
352 #define DRM_CNTL_OFFSET_MODE_SHIFT     (26)
353 #define DRM_CNTL_HEADER_MODE_SHIFT     (27)
354 #define DRM_CNTL_HEADER_BYTECNT_SHIFT  (28)
355 
356 #define DRM_CNTL_ENC_BYTECNT_MASK      (0x00000FC0)
357 #define DRM_CNTL_CLR_BYTECNT_MASK      (0x003F0000)
358 #define DRM_CNTL_BYPASS_MASK           (0x01000000)
359 #define DRM_CNTL_PARTIAL_MODE_MASK     (0x02000000)
360 #define DRM_CNTL_OFFSET_MODE_MASK      (0x04000000)
361 #define DRM_CNTL_HEADER_MODE_MASK      (0x08000000)
362 #define DRM_CNTL_HEADER_BYTECNT_MASK   (0xF0000000)
363 
364 #define SAMU_DRM_DISABLE 0x00000000
365 #define SAMU_DRM_ENABLE  0x00000001
366 
367 /* AV1 Frame header flags */
368 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_SHIFT        (31)
369 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_SHIFT        (30)
370 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_SHIFT         (29)
371 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_SHIFT               (28)
372 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (27)
373 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_SHIFT      (26)
374 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_SHIFT         (25)
375 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_SHIFT          (24)
376 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_SHIFT        (23)
377 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_SHIFT         (22)
378 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_SHIFT        (21)
379 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_SHIFT       (20)
380 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_SHIFT   (19)
381 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_SHIFT   (18)
382 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_SHIFT          (17)
383 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_SHIFT              (16)
384 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_SHIFT            (15)
385 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_SHIFT           (14)
386 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_SHIFT          (13)
387 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_SHIFT       (12)
388 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_SHIFT   (11)
389 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_SHIFT     (10)
390 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_SHIFT          (9)
391 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_SHIFT                (8)
392 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_SHIFT               (7)
393 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_SHIFT                   (6)
394 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_SHIFT      (5)
395 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_SHIFT                (4)
396 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_SHIFT                   (3)
397 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_SHIFT        (2)
398 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_SHIFT           (1)
399 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_SHIFT                   (0)
400 
401 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_MASK         (0x80000000)
402 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_MASK         (0x40000000)
403 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_MASK          (0x20000000)
404 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_MASK                (0x10000000)
405 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_MASK  (0x08000000)
406 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_MASK       (0x04000000)
407 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_MASK          (0x02000000)
408 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_MASK           (0x01000000)
409 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_MASK         (0x00800000)
410 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_MASK          (0x00400000)
411 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_MASK         (0x00200000)
412 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_MASK        (0x00100000)
413 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_MASK    (0x00080000)
414 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_MASK    (0x00040000)
415 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_MASK           (0x00020000)
416 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_MASK               (0x00010000)
417 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_MASK             (0x00008000)
418 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_MASK            (0x00004000)
419 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_MASK           (0x00002000)
420 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_MASK        (0x00001000)
421 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_MASK    (0x00000800)
422 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_MASK      (0x00000400)
423 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_MASK           (0x00000200)
424 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_MASK                 (0x00000100)
425 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_MASK                (0x00000080)
426 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_MASK                    (0x08000040)
427 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_MASK       (0x00000020)
428 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_MASK                 (0x00000010)
429 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_MASK                    (0x00000008)
430 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_MASK         (0x00000004)
431 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_MASK            (0x00000002)
432 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_MASK                    (0x00000001)
433 
434 #define RDECODE_AV1_VER_0  0
435 #define RDECODE_AV1_VER_1  1
436 
437 typedef struct rvcn_decode_buffer_s {
438    unsigned int valid_buf_flag;
439    unsigned int msg_buffer_address_hi;
440    unsigned int msg_buffer_address_lo;
441    unsigned int dpb_buffer_address_hi;
442    unsigned int dpb_buffer_address_lo;
443    unsigned int target_buffer_address_hi;
444    unsigned int target_buffer_address_lo;
445    unsigned int session_contex_buffer_address_hi;
446    unsigned int session_contex_buffer_address_lo;
447    unsigned int bitstream_buffer_address_hi;
448    unsigned int bitstream_buffer_address_lo;
449    unsigned int context_buffer_address_hi;
450    unsigned int context_buffer_address_lo;
451    unsigned int feedback_buffer_address_hi;
452    unsigned int feedback_buffer_address_lo;
453    unsigned int luma_hist_buffer_address_hi;
454    unsigned int luma_hist_buffer_address_lo;
455    unsigned int prob_tbl_buffer_address_hi;
456    unsigned int prob_tbl_buffer_address_lo;
457    unsigned int sclr_coeff_buffer_address_hi;
458    unsigned int sclr_coeff_buffer_address_lo;
459    unsigned int it_sclr_table_buffer_address_hi;
460    unsigned int it_sclr_table_buffer_address_lo;
461    unsigned int sclr_target_buffer_address_hi;
462    unsigned int sclr_target_buffer_address_lo;
463    unsigned int reserved_size_info_buffer_address_hi;
464    unsigned int reserved_size_info_buffer_address_lo;
465    unsigned int mpeg2_pic_param_buffer_address_hi;
466    unsigned int mpeg2_pic_param_buffer_address_lo;
467    unsigned int mpeg2_mb_control_buffer_address_hi;
468    unsigned int mpeg2_mb_control_buffer_address_lo;
469    unsigned int mpeg2_idct_coeff_buffer_address_hi;
470    unsigned int mpeg2_idct_coeff_buffer_address_lo;
471 } rvcn_decode_buffer_t;
472 
473 typedef struct rvcn_decode_ib_package_s {
474    unsigned int package_size;
475    unsigned int package_type;
476 } rvcn_decode_ib_package_t;
477 
478 typedef struct rvcn_dec_message_index_s {
479    unsigned int message_id;
480    unsigned int offset;
481    unsigned int size;
482    unsigned int filled;
483 } rvcn_dec_message_index_t;
484 
485 typedef struct rvcn_dec_message_header_s {
486    unsigned int header_size;
487    unsigned int total_size;
488    unsigned int num_buffers;
489    unsigned int msg_type;
490    unsigned int stream_handle;
491    unsigned int status_report_feedback_number;
492 
493    rvcn_dec_message_index_t index[1];
494 } rvcn_dec_message_header_t;
495 
496 typedef struct rvcn_dec_message_create_s {
497    unsigned int stream_type;
498    unsigned int session_flags;
499    unsigned int width_in_samples;
500    unsigned int height_in_samples;
501 } rvcn_dec_message_create_t;
502 
503 typedef struct rvcn_dec_message_decode_s {
504    unsigned int stream_type;
505    unsigned int decode_flags;
506    unsigned int width_in_samples;
507    unsigned int height_in_samples;
508 
509    unsigned int bsd_size;
510    unsigned int dpb_size;
511    unsigned int dt_size;
512    unsigned int sct_size;
513    unsigned int sc_coeff_size;
514    unsigned int hw_ctxt_size;
515    unsigned int sw_ctxt_size;
516    unsigned int pic_param_size;
517    unsigned int mb_cntl_size;
518    unsigned int reserved0[4];
519    unsigned int decode_buffer_flags;
520 
521    unsigned int db_pitch;
522    unsigned int db_aligned_height;
523    unsigned int db_tiling_mode;
524    unsigned int db_swizzle_mode;
525    unsigned int db_array_mode;
526    unsigned int db_field_mode;
527    unsigned int db_surf_tile_config;
528 
529    unsigned int dt_pitch;
530    unsigned int dt_uv_pitch;
531    unsigned int dt_tiling_mode;
532    unsigned int dt_swizzle_mode;
533    unsigned int dt_array_mode;
534    unsigned int dt_field_mode;
535    unsigned int dt_out_format;
536    unsigned int dt_surf_tile_config;
537    unsigned int dt_uv_surf_tile_config;
538    unsigned int dt_luma_top_offset;
539    unsigned int dt_luma_bottom_offset;
540    unsigned int dt_chroma_top_offset;
541    unsigned int dt_chroma_bottom_offset;
542    unsigned int dt_chromaV_top_offset;
543    unsigned int dt_chromaV_bottom_offset;
544 
545    unsigned int mif_wrc_en;
546    unsigned int db_pitch_uv;
547 
548    unsigned char reserved1[20];
549 } rvcn_dec_message_decode_t;
550 
551 typedef struct rvcn_dec_message_drm_s {
552    unsigned int	drm_key[4];
553    unsigned int	drm_counter[4];
554    unsigned int	drm_wrapped_key[4];
555    unsigned int	drm_offset;
556    unsigned int	drm_cmd;
557    unsigned int	drm_cntl;
558    unsigned int	drm_reserved;
559 } rvcn_dec_message_drm_t;
560 
561 typedef struct rvcn_dec_message_dynamic_dpb_s {
562    unsigned int dpbConfigFlags;
563    unsigned int dpbLumaPitch;
564    unsigned int dpbLumaAlignedHeight;
565    unsigned int dpbLumaAlignedSize;
566    unsigned int dpbChromaPitch;
567    unsigned int dpbChromaAlignedHeight;
568    unsigned int dpbChromaAlignedSize;
569 
570    unsigned char dpbArraySize;
571    unsigned char dpbCurArraySlice;
572    unsigned char dpbRefArraySlice[16];
573    unsigned char dpbReserved0[2];
574 
575    unsigned int dpbCurrOffset;
576    unsigned int dpbAddrOffset[16];
577 } rvcn_dec_message_dynamic_dpb_t;
578 
579 typedef struct rvcn_dec_message_dynamic_dpb_t2_s {
580     unsigned int dpbConfigFlags;
581     unsigned int dpbLumaPitch;
582     unsigned int dpbLumaAlignedHeight;
583     unsigned int dpbLumaAlignedSize;
584     unsigned int dpbChromaPitch;
585     unsigned int dpbChromaAlignedHeight;
586     unsigned int dpbChromaAlignedSize;
587     unsigned int dpbArraySize;
588 
589     unsigned int dpbCurrLo;
590     unsigned int dpbCurrHi;
591     unsigned int dpbAddrLo[16];
592     unsigned int dpbAddrHi[16];
593 } rvcn_dec_message_dynamic_dpb_t2_t;
594 
595 typedef struct rvcn_dec_message_hevc_direct_ref_list_s {
596    unsigned int num_direct_reflist;
597    unsigned char multi_direct_reflist[128][2][15];
598 } rvcn_dec_message_hevc_direct_ref_list_t;
599 
600 typedef struct {
601    unsigned short viewOrderIndex;
602    unsigned short viewId;
603    unsigned short numOfAnchorRefsInL0;
604    unsigned short viewIdOfAnchorRefsInL0[15];
605    unsigned short numOfAnchorRefsInL1;
606    unsigned short viewIdOfAnchorRefsInL1[15];
607    unsigned short numOfNonAnchorRefsInL0;
608    unsigned short viewIdOfNonAnchorRefsInL0[15];
609    unsigned short numOfNonAnchorRefsInL1;
610    unsigned short viewIdOfNonAnchorRefsInL1[15];
611 } radeon_mvcElement_t;
612 
613 typedef struct rvcn_dec_message_avc_s {
614    unsigned int profile;
615    unsigned int level;
616 
617    unsigned int sps_info_flags;
618    unsigned int pps_info_flags;
619    unsigned char chroma_format;
620    unsigned char bit_depth_luma_minus8;
621    unsigned char bit_depth_chroma_minus8;
622    unsigned char log2_max_frame_num_minus4;
623 
624    unsigned char pic_order_cnt_type;
625    unsigned char log2_max_pic_order_cnt_lsb_minus4;
626    unsigned char num_ref_frames;
627    unsigned char reserved_8bit;
628 
629    signed char pic_init_qp_minus26;
630    signed char pic_init_qs_minus26;
631    signed char chroma_qp_index_offset;
632    signed char second_chroma_qp_index_offset;
633 
634    unsigned char num_slice_groups_minus1;
635    unsigned char slice_group_map_type;
636    unsigned char num_ref_idx_l0_active_minus1;
637    unsigned char num_ref_idx_l1_active_minus1;
638 
639    unsigned short slice_group_change_rate_minus1;
640    unsigned short reserved_16bit_1;
641 
642    unsigned char scaling_list_4x4[6][16];
643    unsigned char scaling_list_8x8[2][64];
644 
645    unsigned int frame_num;
646    unsigned int frame_num_list[16];
647    int curr_field_order_cnt_list[2];
648    int field_order_cnt_list[16][2];
649 
650    unsigned int decoded_pic_idx;
651    unsigned int curr_pic_ref_frame_num;
652    unsigned char ref_frame_list[16];
653 
654    unsigned int reserved[122];
655 
656    struct {
657       unsigned int numViews;
658       unsigned int viewId0;
659       radeon_mvcElement_t mvcElements[1];
660    } mvc;
661 
662    unsigned short non_existing_frame_flags;
663    unsigned int used_for_reference_flags;
664 } rvcn_dec_message_avc_t;
665 
666 typedef struct rvcn_dec_message_vc1_s {
667    unsigned int profile;
668    unsigned int level;
669    unsigned int sps_info_flags;
670    unsigned int pps_info_flags;
671    unsigned int pic_structure;
672    unsigned int chroma_format;
673    unsigned short decoded_pic_idx;
674    unsigned short deblocked_pic_idx;
675    unsigned short forward_ref_idx;
676    unsigned short backward_ref_idx;
677    unsigned int cached_frame_flag;
678 } rvcn_dec_message_vc1_t;
679 
680 typedef struct rvcn_dec_message_mpeg2_vld_s {
681    unsigned int decoded_pic_idx;
682    unsigned int forward_ref_pic_idx;
683    unsigned int backward_ref_pic_idx;
684 
685    unsigned char load_intra_quantiser_matrix;
686    unsigned char load_nonintra_quantiser_matrix;
687    unsigned char reserved_quantiser_alignement[2];
688    unsigned char intra_quantiser_matrix[64];
689    unsigned char nonintra_quantiser_matrix[64];
690 
691    unsigned char profile_and_level_indication;
692    unsigned char chroma_format;
693 
694    unsigned char picture_coding_type;
695 
696    unsigned char reserved_1;
697 
698    unsigned char f_code[2][2];
699    unsigned char intra_dc_precision;
700    unsigned char pic_structure;
701    unsigned char top_field_first;
702    unsigned char frame_pred_frame_dct;
703    unsigned char concealment_motion_vectors;
704    unsigned char q_scale_type;
705    unsigned char intra_vlc_format;
706    unsigned char alternate_scan;
707 } rvcn_dec_message_mpeg2_vld_t;
708 
709 typedef struct rvcn_dec_message_mpeg4_asp_vld_s {
710    unsigned int decoded_pic_idx;
711    unsigned int forward_ref_pic_idx;
712    unsigned int backward_ref_pic_idx;
713 
714    unsigned int variant_type;
715    unsigned char profile_and_level_indication;
716 
717    unsigned char video_object_layer_verid;
718    unsigned char video_object_layer_shape;
719 
720    unsigned char reserved_1;
721 
722    unsigned short video_object_layer_width;
723    unsigned short video_object_layer_height;
724 
725    unsigned short vop_time_increment_resolution;
726 
727    unsigned short reserved_2;
728 
729    struct {
730       unsigned int short_video_header : 1;
731       unsigned int obmc_disable : 1;
732       unsigned int interlaced : 1;
733       unsigned int load_intra_quant_mat : 1;
734       unsigned int load_nonintra_quant_mat : 1;
735       unsigned int quarter_sample : 1;
736       unsigned int complexity_estimation_disable : 1;
737       unsigned int resync_marker_disable : 1;
738       unsigned int data_partitioned : 1;
739       unsigned int reversible_vlc : 1;
740       unsigned int newpred_enable : 1;
741       unsigned int reduced_resolution_vop_enable : 1;
742       unsigned int scalability : 1;
743       unsigned int is_object_layer_identifier : 1;
744       unsigned int fixed_vop_rate : 1;
745       unsigned int newpred_segment_type : 1;
746       unsigned int reserved_bits : 16;
747    };
748 
749    unsigned char quant_type;
750    unsigned char reserved_3[3];
751    unsigned char intra_quant_mat[64];
752    unsigned char nonintra_quant_mat[64];
753 
754    struct {
755       unsigned char sprite_enable;
756 
757       unsigned char reserved_4[3];
758 
759       unsigned short sprite_width;
760       unsigned short sprite_height;
761       short sprite_left_coordinate;
762       short sprite_top_coordinate;
763 
764       unsigned char no_of_sprite_warping_points;
765       unsigned char sprite_warping_accuracy;
766       unsigned char sprite_brightness_change;
767       unsigned char low_latency_sprite_enable;
768    } sprite_config;
769 
770    struct {
771       struct {
772          unsigned int check_skip : 1;
773          unsigned int switch_rounding : 1;
774          unsigned int t311 : 1;
775          unsigned int reserved_bits : 29;
776       };
777 
778       unsigned char vol_mode;
779 
780       unsigned char reserved_5[3];
781    } divx_311_config;
782 
783    struct {
784       unsigned char vop_data_present;
785       unsigned char vop_coding_type;
786       unsigned char vop_quant;
787       unsigned char vop_coded;
788       unsigned char vop_rounding_type;
789       unsigned char intra_dc_vlc_thr;
790       unsigned char top_field_first;
791       unsigned char alternate_vertical_scan_flag;
792       unsigned char vop_fcode_forward;
793       unsigned char vop_fcode_backward;
794       unsigned int TRB[2];
795       unsigned int TRD[2];
796    } vop;
797 
798 } rvcn_dec_message_mpeg4_asp_vld_t;
799 
800 typedef struct rvcn_dec_message_hevc_s {
801    unsigned int sps_info_flags;
802    unsigned int pps_info_flags;
803    unsigned char chroma_format;
804    unsigned char bit_depth_luma_minus8;
805    unsigned char bit_depth_chroma_minus8;
806    unsigned char log2_max_pic_order_cnt_lsb_minus4;
807 
808    unsigned char sps_max_dec_pic_buffering_minus1;
809    unsigned char log2_min_luma_coding_block_size_minus3;
810    unsigned char log2_diff_max_min_luma_coding_block_size;
811    unsigned char log2_min_transform_block_size_minus2;
812 
813    unsigned char log2_diff_max_min_transform_block_size;
814    unsigned char max_transform_hierarchy_depth_inter;
815    unsigned char max_transform_hierarchy_depth_intra;
816    unsigned char pcm_sample_bit_depth_luma_minus1;
817 
818    unsigned char pcm_sample_bit_depth_chroma_minus1;
819    unsigned char log2_min_pcm_luma_coding_block_size_minus3;
820    unsigned char log2_diff_max_min_pcm_luma_coding_block_size;
821    unsigned char num_extra_slice_header_bits;
822 
823    unsigned char num_short_term_ref_pic_sets;
824    unsigned char num_long_term_ref_pic_sps;
825    unsigned char num_ref_idx_l0_default_active_minus1;
826    unsigned char num_ref_idx_l1_default_active_minus1;
827 
828    signed char pps_cb_qp_offset;
829    signed char pps_cr_qp_offset;
830    signed char pps_beta_offset_div2;
831    signed char pps_tc_offset_div2;
832 
833    unsigned char diff_cu_qp_delta_depth;
834    unsigned char num_tile_columns_minus1;
835    unsigned char num_tile_rows_minus1;
836    unsigned char log2_parallel_merge_level_minus2;
837 
838    unsigned short column_width_minus1[19];
839    unsigned short row_height_minus1[21];
840 
841    signed char init_qp_minus26;
842    unsigned char num_delta_pocs_ref_rps_idx;
843    unsigned char curr_idx;
844    unsigned char reserved[1];
845    int curr_poc;
846    unsigned char ref_pic_list[16];
847    int poc_list[16];
848    unsigned char ref_pic_set_st_curr_before[8];
849    unsigned char ref_pic_set_st_curr_after[8];
850    unsigned char ref_pic_set_lt_curr[8];
851 
852    unsigned char ucScalingListDCCoefSizeID2[6];
853    unsigned char ucScalingListDCCoefSizeID3[2];
854 
855    unsigned char highestTid;
856    unsigned char isNonRef;
857 
858    unsigned char p010_mode;
859    unsigned char msb_mode;
860    unsigned char luma_10to8;
861    unsigned char chroma_10to8;
862 
863    unsigned char hevc_reserved[2];
864 
865    unsigned char direct_reflist[2][15];
866    unsigned int st_rps_bits;
867    unsigned char reserved_1[15];
868 } rvcn_dec_message_hevc_t;
869 
870 typedef struct rvcn_dec_message_vp9_s {
871    unsigned int frame_header_flags;
872 
873    unsigned char frame_context_idx;
874    unsigned char reset_frame_context;
875 
876    unsigned char curr_pic_idx;
877    unsigned char interp_filter;
878 
879    unsigned char filter_level;
880    unsigned char sharpness_level;
881    unsigned char lf_adj_level[8][4][2];
882    unsigned char base_qindex;
883    signed char y_dc_delta_q;
884    signed char uv_ac_delta_q;
885    signed char uv_dc_delta_q;
886 
887    unsigned char log2_tile_cols;
888    unsigned char log2_tile_rows;
889    unsigned char tx_mode;
890    unsigned char reference_mode;
891    unsigned char chroma_format;
892 
893    unsigned char ref_frame_map[8];
894 
895    unsigned char frame_refs[3];
896    unsigned char ref_frame_sign_bias[3];
897    unsigned char frame_to_show;
898    unsigned char bit_depth_luma_minus8;
899    unsigned char bit_depth_chroma_minus8;
900 
901    unsigned char p010_mode;
902    unsigned char msb_mode;
903    unsigned char luma_10to8;
904    unsigned char chroma_10to8;
905 
906    unsigned int vp9_frame_size;
907    unsigned int compressed_header_size;
908    unsigned int uncompressed_header_size;
909    unsigned char reserved[2];
910 } rvcn_dec_message_vp9_t;
911 
912 typedef enum {
913    RVCN_DEC_AV1_IDENTITY = 0,
914    RVCN_DEC_AV1_TRANSLATION = 1,
915    RVCN_DEC_AV1_ROTZOOM = 2,
916    RVCN_DEC_AV1_AFFINE = 3,
917    RVCN_DEC_AV1_HORTRAPEZOID = 4,
918    RVCN_DEC_AV1_VERTRAPEZOID = 5,
919    RVCN_DEC_AV1_HOMOGRAPHY = 6,
920    RVCN_DEC_AV1_TRANS_TYPES = 7,
921 } rvcn_dec_transformation_type_e;
922 
923 typedef struct {
924    rvcn_dec_transformation_type_e wmtype;
925    int wmmat[8];
926    short alpha, beta, gamma, delta;
927 } rvcn_dec_warped_motion_params_t;
928 
929 typedef struct {
930    unsigned char apply_grain;
931    unsigned char scaling_points_y[14][2];
932    unsigned char num_y_points;
933    unsigned char scaling_points_cb[10][2];
934    unsigned char num_cb_points;
935    unsigned char scaling_points_cr[10][2];
936    unsigned char num_cr_points;
937    unsigned char scaling_shift;
938    unsigned char ar_coeff_lag;
939    signed char ar_coeffs_y[24];
940    signed char ar_coeffs_cb[25];
941    signed char ar_coeffs_cr[25];
942    unsigned char ar_coeff_shift;
943    unsigned char cb_mult;
944    unsigned char cb_luma_mult;
945    unsigned short cb_offset;
946    unsigned char cr_mult;
947    unsigned char cr_luma_mult;
948    unsigned short cr_offset;
949    unsigned char overlap_flag;
950    unsigned char clip_to_restricted_range;
951    unsigned char bit_depth_minus_8;
952    unsigned char chroma_scaling_from_luma;
953    unsigned char grain_scale_shift;
954    unsigned short random_seed;
955 } rvcn_dec_film_grain_params_t;
956 
957 typedef struct rvcn_dec_av1_tile_info_s {
958    unsigned int offset;
959    unsigned int size;
960 } rvcn_dec_av1_tile_info_t;
961 
962 typedef struct rvcn_dec_message_av1_s {
963    unsigned int frame_header_flags;
964    unsigned int current_frame_id;
965    unsigned int frame_offset;
966 
967    unsigned char profile;
968    unsigned char is_annexb;
969    unsigned char frame_type;
970    unsigned char primary_ref_frame;
971    unsigned char curr_pic_idx;
972 
973    unsigned char sb_size;
974    unsigned char interp_filter;
975    unsigned char filter_level[2];
976    unsigned char filter_level_u;
977    unsigned char filter_level_v;
978    unsigned char sharpness_level;
979    signed char ref_deltas[8];
980    signed char mode_deltas[2];
981    unsigned char base_qindex;
982    signed char y_dc_delta_q;
983    signed char u_dc_delta_q;
984    signed char v_dc_delta_q;
985    signed char u_ac_delta_q;
986    signed char v_ac_delta_q;
987    signed char qm_y;
988    signed char qm_u;
989    signed char qm_v;
990    signed char delta_q_res;
991    signed char delta_lf_res;
992 
993    unsigned char tile_cols;
994    unsigned char tile_rows;
995    unsigned char tx_mode;
996    unsigned char reference_mode;
997    unsigned char chroma_format;
998    unsigned int tile_size_bytes;
999    unsigned int context_update_tile_id;
1000    unsigned int tile_col_start_sb[65];
1001    unsigned int tile_row_start_sb[65];
1002    unsigned int max_width;
1003    unsigned int max_height;
1004    unsigned int width;
1005    unsigned int height;
1006    unsigned int superres_upscaled_width;
1007    unsigned char superres_scale_denominator;
1008    unsigned char order_hint_bits;
1009 
1010    unsigned char ref_frame_map[8];
1011    unsigned int ref_frame_offset[8];
1012    unsigned char frame_refs[7];
1013    unsigned char ref_frame_sign_bias[7];
1014 
1015    unsigned char bit_depth_luma_minus8;
1016    unsigned char bit_depth_chroma_minus8;
1017 
1018    int feature_data[8][8];
1019    unsigned char feature_mask[8];
1020 
1021    unsigned char cdef_damping;
1022    unsigned char cdef_bits;
1023    unsigned short cdef_strengths[16];
1024    unsigned short cdef_uv_strengths[16];
1025    unsigned char frame_restoration_type[3];
1026    unsigned char log2_restoration_unit_size_minus5[3];
1027 
1028    unsigned char p010_mode;
1029    unsigned char msb_mode;
1030    unsigned char luma_10to8;
1031    unsigned char chroma_10to8;
1032    unsigned char preskip_segid;
1033    unsigned char last_active_segid;
1034    unsigned char seg_lossless_flag;
1035    unsigned char coded_lossless;
1036    rvcn_dec_film_grain_params_t film_grain;
1037    unsigned int uncompressed_header_size;
1038    rvcn_dec_warped_motion_params_t global_motion[8];
1039    rvcn_dec_av1_tile_info_t tile_info[256];
1040    unsigned char reserved[3];
1041 } rvcn_dec_message_av1_t;
1042 
1043 typedef struct rvcn_dec_feature_index_s {
1044    unsigned int feature_id;
1045    unsigned int offset;
1046    unsigned int size;
1047    unsigned int filled;
1048 } rvcn_dec_feature_index_t;
1049 
1050 typedef struct rvcn_dec_feedback_header_s {
1051    unsigned int header_size;
1052    unsigned int total_size;
1053    unsigned int num_buffers;
1054    unsigned int status_report_feedback_number;
1055    unsigned int status;
1056    unsigned int value;
1057    unsigned int errorBits;
1058    rvcn_dec_feature_index_t index[1];
1059 } rvcn_dec_feedback_header_t;
1060 
1061 typedef struct rvcn_dec_feedback_profiling_s {
1062    unsigned int size;
1063 
1064    unsigned int decodingTime;
1065    unsigned int decodePlusOverhead;
1066    unsigned int masterTimerHits;
1067    unsigned int uvdLBSIREWaitCount;
1068 
1069    unsigned int avgMPCMemLatency;
1070    unsigned int maxMPCMemLatency;
1071    unsigned int uvdMPCLumaHits;
1072    unsigned int uvdMPCLumaHitPend;
1073    unsigned int uvdMPCLumaSearch;
1074    unsigned int uvdMPCChromaHits;
1075    unsigned int uvdMPCChromaHitPend;
1076    unsigned int uvdMPCChromaSearch;
1077 
1078    unsigned int uvdLMIPerfCountLo;
1079    unsigned int uvdLMIPerfCountHi;
1080    unsigned int uvdLMIAvgLatCntrEnvHit;
1081    unsigned int uvdLMILatCntr;
1082 
1083    unsigned int frameCRC0;
1084    unsigned int frameCRC1;
1085    unsigned int frameCRC2;
1086    unsigned int frameCRC3;
1087 
1088    unsigned int uvdLMIPerfMonCtrl;
1089    unsigned int uvdLMILatCtrl;
1090    unsigned int uvdMPCCntl;
1091    unsigned int reserved0[4];
1092    unsigned int decoderID;
1093    unsigned int codec;
1094 
1095    unsigned int dmaHwCrc32Enable;
1096    unsigned int dmaHwCrc32Value;
1097    unsigned int dmaHwCrc32Value2;
1098 } rvcn_dec_feedback_profiling_t;
1099 
1100 typedef struct rvcn_dec_vp9_nmv_ctx_mask_s {
1101    unsigned short classes_mask[2];
1102    unsigned short bits_mask[2];
1103    unsigned char joints_mask;
1104    unsigned char sign_mask[2];
1105    unsigned char class0_mask[2];
1106    unsigned char class0_fp_mask[2];
1107    unsigned char fp_mask[2];
1108    unsigned char class0_hp_mask[2];
1109    unsigned char hp_mask[2];
1110    unsigned char reserve[11];
1111 } rvcn_dec_vp9_nmv_ctx_mask_t;
1112 
1113 typedef struct rvcn_dec_vp9_nmv_component_s {
1114    unsigned char sign;
1115    unsigned char classes[10];
1116    unsigned char class0[1];
1117    unsigned char bits[10];
1118    unsigned char class0_fp[2][3];
1119    unsigned char fp[3];
1120    unsigned char class0_hp;
1121    unsigned char hp;
1122 } rvcn_dec_vp9_nmv_component_t;
1123 
1124 typedef struct rvcn_dec_vp9_probs_s {
1125    rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask;
1126    unsigned char coef_probs[4][2][2][6][6][3];
1127    unsigned char y_mode_prob[4][9];
1128    unsigned char uv_mode_prob[10][9];
1129    unsigned char single_ref_prob[5][2];
1130    unsigned char switchable_interp_prob[4][2];
1131    unsigned char partition_prob[16][3];
1132    unsigned char inter_mode_probs[7][3];
1133    unsigned char mbskip_probs[3];
1134    unsigned char intra_inter_prob[4];
1135    unsigned char comp_inter_prob[5];
1136    unsigned char comp_ref_prob[5];
1137    unsigned char tx_probs_32x32[2][3];
1138    unsigned char tx_probs_16x16[2][2];
1139    unsigned char tx_probs_8x8[2][1];
1140    unsigned char mv_joints[3];
1141    rvcn_dec_vp9_nmv_component_t mv_comps[2];
1142 } rvcn_dec_vp9_probs_t;
1143 
1144 typedef struct rvcn_dec_vp9_probs_segment_s {
1145    union {
1146       rvcn_dec_vp9_probs_t probs;
1147       unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE];
1148    };
1149 
1150    union {
1151       struct {
1152          unsigned int feature_data[8];
1153          unsigned char tree_probs[7];
1154          unsigned char pred_probs[3];
1155          unsigned char abs_delta;
1156          unsigned char feature_mask[8];
1157       } seg;
1158       unsigned char segment_data[256];
1159    };
1160 } rvcn_dec_vp9_probs_segment_t;
1161 
1162 typedef struct rvcn_dec_av1_fg_init_buf_s {
1163    short luma_grain_block[64][96];
1164    short cb_grain_block[32][48];
1165    short cr_grain_block[32][48];
1166    short scaling_lut_y[256];
1167    short scaling_lut_cb[256];
1168    short scaling_lut_cr[256];
1169    unsigned short temp_tile_left_seed[256];
1170 } rvcn_dec_av1_fg_init_buf_t;
1171 
1172 typedef struct rvcn_dec_av1_segment_fg_s {
1173    union {
1174       struct {
1175          unsigned char feature_data[128];
1176          unsigned char feature_mask[8];
1177       } seg;
1178       unsigned char segment_data[256];
1179    };
1180    rvcn_dec_av1_fg_init_buf_t fg_buf;
1181 } rvcn_dec_av1_segment_fg_t;
1182 
1183 struct jpeg_params {
1184    unsigned bsd_size;
1185    unsigned dt_pitch;
1186    unsigned dt_uv_pitch;
1187    unsigned dt_luma_top_offset;
1188    unsigned dt_chroma_top_offset;
1189    unsigned dt_chromav_top_offset;
1190    unsigned dt_addr_mode;
1191    unsigned dt_swizzle_mode;
1192    uint16_t crop_x;
1193    uint16_t crop_y;
1194    uint16_t crop_width;
1195    uint16_t crop_height;
1196 };
1197 
1198 #define RDECODE_VCN1_GPCOM_VCPU_CMD   0x2070c
1199 #define RDECODE_VCN1_GPCOM_VCPU_DATA0 0x20710
1200 #define RDECODE_VCN1_GPCOM_VCPU_DATA1 0x20714
1201 #define RDECODE_VCN1_ENGINE_CNTL      0x20718
1202 
1203 #define RDECODE_VCN2_GPCOM_VCPU_CMD       (0x503 << 2)
1204 #define RDECODE_VCN2_GPCOM_VCPU_DATA0     (0x504 << 2)
1205 #define RDECODE_VCN2_GPCOM_VCPU_DATA1     (0x505 << 2)
1206 #define RDECODE_VCN2_GPCOM_VCPU_DATA2     (0x54C << 2)
1207 #define RDECODE_VCN2_ENGINE_CNTL          (0x506 << 2)
1208 
1209 #define RDECODE_VCN2_5_GPCOM_VCPU_CMD       0x3c
1210 #define RDECODE_VCN2_5_GPCOM_VCPU_DATA0     0x40
1211 #define RDECODE_VCN2_5_GPCOM_VCPU_DATA1     0x44
1212 #define RDECODE_VCN2_5_GPCOM_VCPU_DATA2     0x1A0
1213 #define RDECODE_VCN2_5_ENGINE_CNTL          0x9b4
1214 
1215 #define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024)
1216 
1217 unsigned ac_vcn_dec_calc_ctx_size_av1(unsigned av1_version);
1218 void ac_vcn_av1_init_probs(unsigned av1_version, uint8_t *prob);
1219 void ac_vcn_av1_init_film_grain_buffer(rvcn_dec_film_grain_params_t *fg_params, rvcn_dec_av1_fg_init_buf_t *fg_buf);
1220 
1221 #endif
1222