Home
last modified time | relevance | path

Searched defs:imm5 (Results 1 – 3 of 3) sorted by relevance

/art/compiler/utils/riscv64/
Dassembler_riscv64.cc3853 void Riscv64Assembler::VAdd_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VAdd_vi()
3881 void Riscv64Assembler::VRsub_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VRsub_vi()
3960 void Riscv64Assembler::VAnd_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VAnd_vi()
3980 void Riscv64Assembler::VOr_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VOr_vi()
4001 void Riscv64Assembler::VXor_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VXor_vi()
4089 void Riscv64Assembler::VAdc_vim(VRegister vd, VRegister vs2, int32_t imm5) { in VAdc_vim()
4108 void Riscv64Assembler::VMadc_vim(VRegister vd, VRegister vs2, int32_t imm5) { in VMadc_vim()
4126 void Riscv64Assembler::VMadc_vi(VRegister vd, VRegister vs2, int32_t imm5) { in VMadc_vi()
4184 void Riscv64Assembler::VMerge_vim(VRegister vd, VRegister vs2, int32_t imm5) { in VMerge_vim()
4203 void Riscv64Assembler::VMv_vi(VRegister vd, int32_t imm5) { in VMv_vi()
[all …]
Dassembler_riscv64.h2586 void EmitCM(uint32_t funct3, uint32_t imm5, XRegister rs1_s, Reg rd_rs2_s, uint32_t opcode) { in EmitCM()
/art/disassembler/
Ddisassembler_riscv64.cc1436 const uint32_t imm5 = GetRs1(insn32); in Print32RVVOp() local