1 /*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
31
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
34
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
39 #include "lima_bo.h"
40 #include "lima_fence.h"
41 #include "lima_format.h"
42 #include "lima_disk_cache.h"
43 #include "ir/lima_ir.h"
44
45 #include "xf86drm.h"
46
47 int lima_plb_max_blk = 0;
48 int lima_plb_pp_stream_cache_size = 0;
49
50 static void
lima_screen_destroy(struct pipe_screen * pscreen)51 lima_screen_destroy(struct pipe_screen *pscreen)
52 {
53 struct lima_screen *screen = lima_screen(pscreen);
54
55 slab_destroy_parent(&screen->transfer_pool);
56
57 if (screen->ro)
58 screen->ro->destroy(screen->ro);
59
60 if (screen->pp_buffer)
61 lima_bo_unreference(screen->pp_buffer);
62
63 lima_bo_cache_fini(screen);
64 lima_bo_table_fini(screen);
65 disk_cache_destroy(screen->disk_cache);
66 lima_resource_screen_destroy(screen);
67 ralloc_free(screen);
68 }
69
70 static const char *
lima_screen_get_name(struct pipe_screen * pscreen)71 lima_screen_get_name(struct pipe_screen *pscreen)
72 {
73 struct lima_screen *screen = lima_screen(pscreen);
74
75 switch (screen->gpu_type) {
76 case DRM_LIMA_PARAM_GPU_ID_MALI400:
77 return "Mali400";
78 case DRM_LIMA_PARAM_GPU_ID_MALI450:
79 return "Mali450";
80 }
81
82 return NULL;
83 }
84
85 static const char *
lima_screen_get_vendor(struct pipe_screen * pscreen)86 lima_screen_get_vendor(struct pipe_screen *pscreen)
87 {
88 return "Mesa";
89 }
90
91 static const char *
lima_screen_get_device_vendor(struct pipe_screen * pscreen)92 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
93 {
94 return "ARM";
95 }
96
97 static int
get_vertex_shader_param(struct lima_screen * screen,enum pipe_shader_cap param)98 get_vertex_shader_param(struct lima_screen *screen,
99 enum pipe_shader_cap param)
100 {
101 switch (param) {
102 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
103 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
104 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
105 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
106 return 16384; /* need investigate */
107
108 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
109 return 1024;
110
111 case PIPE_SHADER_CAP_MAX_INPUTS:
112 return 16; /* attributes */
113
114 case PIPE_SHADER_CAP_MAX_OUTPUTS:
115 return LIMA_MAX_VARYING_NUM; /* varying */
116
117 /* Mali-400 GP provides space for 304 vec4 uniforms, globals and
118 * temporary variables. */
119 case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
120 return 304 * 4 * sizeof(float);
121
122 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
123 return 1;
124
125 case PIPE_SHADER_CAP_MAX_TEMPS:
126 return 256; /* need investigate */
127
128 default:
129 return 0;
130 }
131 }
132
133 static int
get_fragment_shader_param(struct lima_screen * screen,enum pipe_shader_cap param)134 get_fragment_shader_param(struct lima_screen *screen,
135 enum pipe_shader_cap param)
136 {
137 switch (param) {
138 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
139 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
140 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
141 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
142 return 16384; /* need investigate */
143
144 case PIPE_SHADER_CAP_MAX_INPUTS:
145 return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
146
147 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
148 return 1024;
149
150 /* The Mali-PP supports a uniform table up to size 32768 total.
151 * However, indirect access to an uniform only supports indices up
152 * to 8192 (a 2048 vec4 array). To prevent indices bigger than that,
153 * limit max const buffer size to 8192 for now. */
154 case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
155 return 2048 * 4 * sizeof(float);
156
157 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
158 return 1;
159
160 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
161 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
162 return 16; /* need investigate */
163
164 case PIPE_SHADER_CAP_MAX_TEMPS:
165 return 256; /* need investigate */
166
167 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
168 return 1;
169
170 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
171 return 0;
172
173 default:
174 return 0;
175 }
176 }
177
178 static int
lima_screen_get_shader_param(struct pipe_screen * pscreen,enum pipe_shader_type shader,enum pipe_shader_cap param)179 lima_screen_get_shader_param(struct pipe_screen *pscreen,
180 enum pipe_shader_type shader,
181 enum pipe_shader_cap param)
182 {
183 struct lima_screen *screen = lima_screen(pscreen);
184
185 switch (shader) {
186 case PIPE_SHADER_FRAGMENT:
187 return get_fragment_shader_param(screen, param);
188 case PIPE_SHADER_VERTEX:
189 return get_vertex_shader_param(screen, param);
190
191 default:
192 return 0;
193 }
194 }
195
196 static void
lima_init_screen_caps(struct pipe_screen * screen)197 lima_init_screen_caps(struct pipe_screen *screen)
198 {
199 struct pipe_caps *caps = (struct pipe_caps *)&screen->caps;
200
201 u_init_pipe_screen_caps(screen, 1);
202
203 caps->npot_textures = true;
204 caps->blend_equation_separate = true;
205 caps->uma = true;
206 caps->clip_halfz = true;
207 caps->native_fence_fd = true;
208 caps->fragment_shader_texture_lod = true;
209 caps->texture_swizzle = true;
210 caps->vertex_color_unclamped = true;
211 caps->texture_barrier = true;
212 caps->surface_sample_count = true;
213
214 /* not clear supported */
215 caps->fs_coord_origin_upper_left = true;
216 caps->fs_coord_origin_lower_left = true;
217 caps->fs_coord_pixel_center_integer = true;
218 caps->fs_coord_pixel_center_half_integer = true;
219
220 caps->fs_position_is_sysval = true;
221 caps->fs_point_is_sysval = true;
222 caps->fs_face_is_integer_sysval = true;
223
224 caps->texture_half_float_linear = true;
225
226 caps->max_texture_2d_size = 1 << (LIMA_MAX_MIP_LEVELS - 1);
227 caps->max_texture_3d_levels =
228 caps->max_texture_cube_levels = LIMA_MAX_MIP_LEVELS;
229
230 caps->vendor_id = 0x13B5;
231
232 caps->video_memory = 0;
233
234 caps->pci_group =
235 caps->pci_bus =
236 caps->pci_device =
237 caps->pci_function = 0;
238
239 caps->texture_transfer_modes = 0;
240
241 caps->shareable_shaders = false;
242
243 caps->alpha_test = true;
244
245 caps->flatshade = false;
246 caps->two_sided_color = false;
247 caps->clip_planes = 0;
248
249 caps->fragment_shader_derivatives = true;
250
251 /* Mali4x0 PP doesn't have a swizzle for load_input, so use POT-aligned
252 * varyings to avoid unnecessary movs for vec3 and precision downgrade
253 * in case if this vec3 is coordinates for a sampler
254 */
255 caps->prefer_pot_aligned_varyings = true;
256
257 caps->max_dual_source_render_targets = true;
258
259 caps->min_line_width =
260 caps->min_line_width_aa =
261 caps->min_point_size =
262 caps->min_point_size_aa = 1;
263
264 caps->point_size_granularity =
265 caps->line_width_granularity = 0.1;
266
267 caps->max_line_width =
268 caps->max_line_width_aa =
269 caps->max_point_size =
270 caps->max_point_size_aa = 100.0f;
271
272 caps->max_texture_anisotropy = 16.0f;
273
274 caps->max_texture_lod_bias = 15.0f;
275 }
276
277 static bool
lima_screen_is_format_supported(struct pipe_screen * pscreen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned usage)278 lima_screen_is_format_supported(struct pipe_screen *pscreen,
279 enum pipe_format format,
280 enum pipe_texture_target target,
281 unsigned sample_count,
282 unsigned storage_sample_count,
283 unsigned usage)
284 {
285 switch (target) {
286 case PIPE_BUFFER:
287 case PIPE_TEXTURE_1D:
288 case PIPE_TEXTURE_2D:
289 case PIPE_TEXTURE_3D:
290 case PIPE_TEXTURE_RECT:
291 case PIPE_TEXTURE_CUBE:
292 break;
293 default:
294 return false;
295 }
296
297 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
298 return false;
299
300 /* Utgard supports 16x, but for now limit it to 4x */
301 if (sample_count > 1 && sample_count != 4)
302 return false;
303
304 if (usage & PIPE_BIND_RENDER_TARGET) {
305 if (!lima_format_pixel_supported(format))
306 return false;
307
308 /* multisample unsupported with half float target */
309 if (sample_count > 1 && util_format_is_float(format))
310 return false;
311 }
312
313 if (usage & PIPE_BIND_DEPTH_STENCIL) {
314 switch (format) {
315 case PIPE_FORMAT_Z16_UNORM:
316 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
317 case PIPE_FORMAT_Z24X8_UNORM:
318 break;
319 default:
320 return false;
321 }
322 }
323
324 if (usage & PIPE_BIND_VERTEX_BUFFER) {
325 switch (format) {
326 case PIPE_FORMAT_R32_FLOAT:
327 case PIPE_FORMAT_R32G32_FLOAT:
328 case PIPE_FORMAT_R32G32B32_FLOAT:
329 case PIPE_FORMAT_R32G32B32A32_FLOAT:
330 case PIPE_FORMAT_R32_FIXED:
331 case PIPE_FORMAT_R32G32_FIXED:
332 case PIPE_FORMAT_R32G32B32_FIXED:
333 case PIPE_FORMAT_R32G32B32A32_FIXED:
334 case PIPE_FORMAT_R16_FLOAT:
335 case PIPE_FORMAT_R16G16_FLOAT:
336 case PIPE_FORMAT_R16G16B16_FLOAT:
337 case PIPE_FORMAT_R16G16B16A16_FLOAT:
338 case PIPE_FORMAT_R32_UNORM:
339 case PIPE_FORMAT_R32G32_UNORM:
340 case PIPE_FORMAT_R32G32B32_UNORM:
341 case PIPE_FORMAT_R32G32B32A32_UNORM:
342 case PIPE_FORMAT_R32_SNORM:
343 case PIPE_FORMAT_R32G32_SNORM:
344 case PIPE_FORMAT_R32G32B32_SNORM:
345 case PIPE_FORMAT_R32G32B32A32_SNORM:
346 case PIPE_FORMAT_R32_USCALED:
347 case PIPE_FORMAT_R32G32_USCALED:
348 case PIPE_FORMAT_R32G32B32_USCALED:
349 case PIPE_FORMAT_R32G32B32A32_USCALED:
350 case PIPE_FORMAT_R32_SSCALED:
351 case PIPE_FORMAT_R32G32_SSCALED:
352 case PIPE_FORMAT_R32G32B32_SSCALED:
353 case PIPE_FORMAT_R32G32B32A32_SSCALED:
354 case PIPE_FORMAT_R16_UNORM:
355 case PIPE_FORMAT_R16G16_UNORM:
356 case PIPE_FORMAT_R16G16B16_UNORM:
357 case PIPE_FORMAT_R16G16B16A16_UNORM:
358 case PIPE_FORMAT_R16_SNORM:
359 case PIPE_FORMAT_R16G16_SNORM:
360 case PIPE_FORMAT_R16G16B16_SNORM:
361 case PIPE_FORMAT_R16G16B16A16_SNORM:
362 case PIPE_FORMAT_R16_USCALED:
363 case PIPE_FORMAT_R16G16_USCALED:
364 case PIPE_FORMAT_R16G16B16_USCALED:
365 case PIPE_FORMAT_R16G16B16A16_USCALED:
366 case PIPE_FORMAT_R16_SSCALED:
367 case PIPE_FORMAT_R16G16_SSCALED:
368 case PIPE_FORMAT_R16G16B16_SSCALED:
369 case PIPE_FORMAT_R16G16B16A16_SSCALED:
370 case PIPE_FORMAT_R8_UNORM:
371 case PIPE_FORMAT_R8G8_UNORM:
372 case PIPE_FORMAT_R8G8B8_UNORM:
373 case PIPE_FORMAT_R8G8B8A8_UNORM:
374 case PIPE_FORMAT_R8_SNORM:
375 case PIPE_FORMAT_R8G8_SNORM:
376 case PIPE_FORMAT_R8G8B8_SNORM:
377 case PIPE_FORMAT_R8G8B8A8_SNORM:
378 case PIPE_FORMAT_R8_USCALED:
379 case PIPE_FORMAT_R8G8_USCALED:
380 case PIPE_FORMAT_R8G8B8_USCALED:
381 case PIPE_FORMAT_R8G8B8A8_USCALED:
382 case PIPE_FORMAT_R8_SSCALED:
383 case PIPE_FORMAT_R8G8_SSCALED:
384 case PIPE_FORMAT_R8G8B8_SSCALED:
385 case PIPE_FORMAT_R8G8B8A8_SSCALED:
386 break;
387 default:
388 return false;
389 }
390 }
391
392 if (usage & PIPE_BIND_INDEX_BUFFER) {
393 switch (format) {
394 case PIPE_FORMAT_R8_UINT:
395 case PIPE_FORMAT_R16_UINT:
396 case PIPE_FORMAT_R32_UINT:
397 break;
398 default:
399 return false;
400 }
401 }
402
403 if (usage & PIPE_BIND_SAMPLER_VIEW)
404 return lima_format_texel_supported(format);
405
406 return true;
407 }
408
409 static const void *
lima_screen_get_compiler_options(struct pipe_screen * pscreen,enum pipe_shader_ir ir,enum pipe_shader_type shader)410 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
411 enum pipe_shader_ir ir,
412 enum pipe_shader_type shader)
413 {
414 return lima_program_get_compiler_options(shader);
415 }
416
417 static bool
lima_screen_set_plb_max_blk(struct lima_screen * screen)418 lima_screen_set_plb_max_blk(struct lima_screen *screen)
419 {
420 if (lima_plb_max_blk) {
421 screen->plb_max_blk = lima_plb_max_blk;
422 return true;
423 }
424
425 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
426 screen->plb_max_blk = 4096;
427 else
428 screen->plb_max_blk = 512;
429
430 drmDevicePtr devinfo;
431
432 if (drmGetDevice2(screen->fd, 0, &devinfo))
433 return false;
434
435 if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
436 char **compatible = devinfo->deviceinfo.platform->compatible;
437
438 if (compatible && *compatible)
439 if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
440 screen->plb_max_blk = 2048;
441 }
442
443 drmFreeDevice(&devinfo);
444
445 return true;
446 }
447
448 static bool
lima_screen_query_info(struct lima_screen * screen)449 lima_screen_query_info(struct lima_screen *screen)
450 {
451 drmVersionPtr version = drmGetVersion(screen->fd);
452 if (!version)
453 return false;
454
455 if (version->version_major > 1 || version->version_minor > 0)
456 screen->has_growable_heap_buffer = true;
457
458 drmFreeVersion(version);
459
460 if (lima_debug & LIMA_DEBUG_NO_GROW_HEAP)
461 screen->has_growable_heap_buffer = false;
462
463 struct drm_lima_get_param param;
464
465 memset(¶m, 0, sizeof(param));
466 param.param = DRM_LIMA_PARAM_GPU_ID;
467 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, ¶m))
468 return false;
469
470 switch (param.value) {
471 case DRM_LIMA_PARAM_GPU_ID_MALI400:
472 case DRM_LIMA_PARAM_GPU_ID_MALI450:
473 screen->gpu_type = param.value;
474 break;
475 default:
476 return false;
477 }
478
479 memset(¶m, 0, sizeof(param));
480 param.param = DRM_LIMA_PARAM_NUM_PP;
481 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, ¶m))
482 return false;
483
484 screen->num_pp = param.value;
485
486 lima_screen_set_plb_max_blk(screen);
487
488 return true;
489 }
490
491 static const uint64_t lima_available_modifiers[] = {
492 DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
493 DRM_FORMAT_MOD_LINEAR,
494 };
495
lima_is_modifier_external_only(enum pipe_format format)496 static bool lima_is_modifier_external_only(enum pipe_format format)
497 {
498 return util_format_is_yuv(format);
499 }
500
501 static void
lima_screen_query_dmabuf_modifiers(struct pipe_screen * pscreen,enum pipe_format format,int max,uint64_t * modifiers,unsigned int * external_only,int * count)502 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
503 enum pipe_format format, int max,
504 uint64_t *modifiers,
505 unsigned int *external_only,
506 int *count)
507 {
508 int num_modifiers = ARRAY_SIZE(lima_available_modifiers);
509
510 if (!modifiers) {
511 *count = num_modifiers;
512 return;
513 }
514
515 *count = MIN2(max, num_modifiers);
516 for (int i = 0; i < *count; i++) {
517 modifiers[i] = lima_available_modifiers[i];
518 if (external_only)
519 external_only[i] = lima_is_modifier_external_only(format);
520 }
521 }
522
523 static bool
lima_screen_is_dmabuf_modifier_supported(struct pipe_screen * pscreen,uint64_t modifier,enum pipe_format format,bool * external_only)524 lima_screen_is_dmabuf_modifier_supported(struct pipe_screen *pscreen,
525 uint64_t modifier,
526 enum pipe_format format,
527 bool *external_only)
528 {
529 for (int i = 0; i < ARRAY_SIZE(lima_available_modifiers); i++) {
530 if (lima_available_modifiers[i] == modifier) {
531 if (external_only)
532 *external_only = lima_is_modifier_external_only(format);
533
534 return true;
535 }
536 }
537
538 return false;
539 }
540
541 static const struct debug_named_value lima_debug_options[] = {
542 { "gp", LIMA_DEBUG_GP,
543 "print GP shader compiler result of each stage" },
544 { "pp", LIMA_DEBUG_PP,
545 "print PP shader compiler result of each stage" },
546 { "dump", LIMA_DEBUG_DUMP,
547 "dump GPU command stream to $PWD/lima.dump" },
548 { "shaderdb", LIMA_DEBUG_SHADERDB,
549 "print shader information for shaderdb" },
550 { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
551 "disable BO cache" },
552 { "bocache", LIMA_DEBUG_BO_CACHE,
553 "print debug info for BO cache" },
554 { "notiling", LIMA_DEBUG_NO_TILING,
555 "don't use tiled buffers" },
556 { "nogrowheap", LIMA_DEBUG_NO_GROW_HEAP,
557 "disable growable heap buffer" },
558 { "singlejob", LIMA_DEBUG_SINGLE_JOB,
559 "disable multi job optimization" },
560 { "precompile", LIMA_DEBUG_PRECOMPILE,
561 "Precompile shaders for shader-db" },
562 { "diskcache", LIMA_DEBUG_DISK_CACHE,
563 "print debug info for shader disk cache" },
564 { "noblit", LIMA_DEBUG_NO_BLIT,
565 "use generic u_blitter instead of lima-specific" },
566 DEBUG_NAMED_VALUE_END
567 };
568
569 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", lima_debug_options, 0)
570 uint32_t lima_debug;
571
572 static void
lima_screen_parse_env(void)573 lima_screen_parse_env(void)
574 {
575 lima_debug = debug_get_option_lima_debug();
576
577 lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
578 if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
579 lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
580 fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
581 "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
582 LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
583 lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
584 }
585
586 lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
587 if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
588 fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
589 "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
590 lima_plb_max_blk = 0;
591 }
592
593 lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
594 if (lima_ppir_force_spilling < 0) {
595 fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
596 "reset to default 0\n", lima_ppir_force_spilling);
597 lima_ppir_force_spilling = 0;
598 }
599
600 lima_plb_pp_stream_cache_size = debug_get_num_option("LIMA_PLB_PP_STREAM_CACHE_SIZE", 0);
601 if (lima_plb_pp_stream_cache_size < 0) {
602 fprintf(stderr, "lima: LIMA_PLB_PP_STREAM_CACHE_SIZE %d less than 0, "
603 "reset to default 0\n", lima_plb_pp_stream_cache_size);
604 lima_plb_pp_stream_cache_size = 0;
605 }
606 }
607
608 static struct disk_cache *
lima_get_disk_shader_cache(struct pipe_screen * pscreen)609 lima_get_disk_shader_cache (struct pipe_screen *pscreen)
610 {
611 struct lima_screen *screen = lima_screen(pscreen);
612
613 return screen->disk_cache;
614 }
615
616 static int
lima_screen_get_fd(struct pipe_screen * pscreen)617 lima_screen_get_fd(struct pipe_screen *pscreen)
618 {
619 struct lima_screen *screen = lima_screen(pscreen);
620 return screen->fd;
621 }
622
623 struct pipe_screen *
lima_screen_create(int fd,const struct pipe_screen_config * config,struct renderonly * ro)624 lima_screen_create(int fd, const struct pipe_screen_config *config,
625 struct renderonly *ro)
626 {
627 uint64_t system_memory;
628 struct lima_screen *screen;
629
630 screen = rzalloc(NULL, struct lima_screen);
631 if (!screen)
632 return NULL;
633
634 screen->fd = fd;
635 screen->ro = ro;
636
637 lima_screen_parse_env();
638
639 /* Limit PP PLB stream cache size to 0.1% of system memory */
640 if (!lima_plb_pp_stream_cache_size &&
641 os_get_total_physical_memory(&system_memory))
642 lima_plb_pp_stream_cache_size = system_memory >> 10;
643
644 /* Set lower limit on PP PLB cache size */
645 lima_plb_pp_stream_cache_size = MAX2(128 * 1024 * lima_ctx_num_plb,
646 lima_plb_pp_stream_cache_size);
647
648 if (!lima_screen_query_info(screen))
649 goto err_out0;
650
651 if (!lima_bo_cache_init(screen))
652 goto err_out0;
653
654 if (!lima_bo_table_init(screen))
655 goto err_out1;
656
657 screen->pp_ra = ppir_regalloc_init(screen);
658 if (!screen->pp_ra)
659 goto err_out2;
660
661 screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
662 if (!screen->pp_buffer)
663 goto err_out2;
664 screen->pp_buffer->cacheable = false;
665
666 /* fs program for clear buffer?
667 */
668 static const uint32_t pp_clear_program[] = {
669 PP_CLEAR_PROGRAM
670 };
671 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
672 pp_clear_program, sizeof(pp_clear_program));
673
674 /* copy texture to framebuffer, used to reload gpu tile buffer
675 * load.v $1 0.xy, texld 0, mov.v0 $0 ^tex_sampler, sync, stop
676 */
677 static const uint32_t pp_reload_program[] = {
678 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
679 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
680 };
681 memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
682 pp_reload_program, sizeof(pp_reload_program));
683
684 /* 0/1/2 vertex index for reload/clear draw */
685 static const uint8_t pp_shared_index[] = { 0, 1, 2 };
686 memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
687 pp_shared_index, sizeof(pp_shared_index));
688
689 /* 4096x4096 gl pos used for partial clear */
690 static const float pp_clear_gl_pos[] = {
691 4096, 0, 1, 1,
692 0, 0, 1, 1,
693 0, 4096, 1, 1,
694 };
695 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
696 pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
697
698 /* is pp frame render state static? */
699 uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
700 memset(pp_frame_rsw, 0, 0x40);
701 pp_frame_rsw[8] = 0x0000f008;
702 pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
703 pp_frame_rsw[13] = 0x00000100;
704
705 screen->base.destroy = lima_screen_destroy;
706 screen->base.get_screen_fd = lima_screen_get_fd;
707 screen->base.get_name = lima_screen_get_name;
708 screen->base.get_vendor = lima_screen_get_vendor;
709 screen->base.get_device_vendor = lima_screen_get_device_vendor;
710 screen->base.get_shader_param = lima_screen_get_shader_param;
711 screen->base.context_create = lima_context_create;
712 screen->base.is_format_supported = lima_screen_is_format_supported;
713 screen->base.get_compiler_options = lima_screen_get_compiler_options;
714 screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
715 screen->base.is_dmabuf_modifier_supported = lima_screen_is_dmabuf_modifier_supported;
716 screen->base.get_disk_shader_cache = lima_get_disk_shader_cache;
717
718 lima_resource_screen_init(screen);
719 lima_fence_screen_init(screen);
720 lima_disk_cache_init(screen);
721
722 lima_init_screen_caps(&screen->base);
723
724 slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
725
726 return &screen->base;
727
728 err_out2:
729 lima_bo_table_fini(screen);
730 err_out1:
731 lima_bo_cache_fini(screen);
732 err_out0:
733 ralloc_free(screen);
734 return NULL;
735 }
736