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1 /**************************************************************************
2  *
3  * Copyright 2007 VMware, Inc.
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  **************************************************************************/
27 
28 #ifndef PIPE_DEFINES_H
29 #define PIPE_DEFINES_H
30 
31 /* For pipe_blend* and pipe_logicop enums */
32 #include "util/blend.h"
33 
34 #include "util/compiler.h"
35 
36 #include "compiler/shader_enums.h"
37 #include "util/os_time.h"
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 /**
44  * Gallium error codes.
45  *
46  * - A zero value always means success.
47  * - A negative value always means failure.
48  * - The meaning of a positive value is function dependent.
49  */
50 enum pipe_error
51 {
52    PIPE_OK = 0,
53    PIPE_ERROR = -1,    /**< Generic error */
54    PIPE_ERROR_BAD_INPUT = -2,
55    PIPE_ERROR_OUT_OF_MEMORY = -3,
56    PIPE_ERROR_RETRY = -4
57    /* TODO */
58 };
59 
60 /**
61  * Inequality functions.  Used for depth test, stencil compare, alpha
62  * test, shadow compare, etc.
63  */
64 enum pipe_compare_func {
65    PIPE_FUNC_NEVER,
66    PIPE_FUNC_LESS,
67    PIPE_FUNC_EQUAL,
68    PIPE_FUNC_LEQUAL,
69    PIPE_FUNC_GREATER,
70    PIPE_FUNC_NOTEQUAL,
71    PIPE_FUNC_GEQUAL,
72    PIPE_FUNC_ALWAYS,
73 };
74 
75 /** Polygon fill mode */
76 enum {
77    PIPE_POLYGON_MODE_FILL,
78    PIPE_POLYGON_MODE_LINE,
79    PIPE_POLYGON_MODE_POINT,
80    PIPE_POLYGON_MODE_FILL_RECTANGLE,
81 };
82 
83 /** Polygon face specification, eg for culling */
84 #define PIPE_FACE_NONE           0
85 #define PIPE_FACE_FRONT          1
86 #define PIPE_FACE_BACK           2
87 #define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK)
88 
89 /** Stencil ops */
90 enum pipe_stencil_op {
91    PIPE_STENCIL_OP_KEEP,
92    PIPE_STENCIL_OP_ZERO,
93    PIPE_STENCIL_OP_REPLACE,
94    PIPE_STENCIL_OP_INCR,
95    PIPE_STENCIL_OP_DECR,
96    PIPE_STENCIL_OP_INCR_WRAP,
97    PIPE_STENCIL_OP_DECR_WRAP,
98    PIPE_STENCIL_OP_INVERT,
99 };
100 
101 /** Texture types.
102  * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D
103  */
104 enum pipe_texture_target
105 {
106    PIPE_BUFFER,
107    PIPE_TEXTURE_1D,
108    PIPE_TEXTURE_2D,
109    PIPE_TEXTURE_3D,
110    PIPE_TEXTURE_CUBE,
111    PIPE_TEXTURE_RECT,
112    PIPE_TEXTURE_1D_ARRAY,
113    PIPE_TEXTURE_2D_ARRAY,
114    PIPE_TEXTURE_CUBE_ARRAY,
115    PIPE_MAX_TEXTURE_TYPES,
116 };
117 
118 enum pipe_tex_face {
119    PIPE_TEX_FACE_POS_X,
120    PIPE_TEX_FACE_NEG_X,
121    PIPE_TEX_FACE_POS_Y,
122    PIPE_TEX_FACE_NEG_Y,
123    PIPE_TEX_FACE_POS_Z,
124    PIPE_TEX_FACE_NEG_Z,
125    PIPE_TEX_FACE_MAX,
126 };
127 
128 enum pipe_tex_wrap {
129    PIPE_TEX_WRAP_REPEAT,
130    PIPE_TEX_WRAP_CLAMP,
131    PIPE_TEX_WRAP_CLAMP_TO_EDGE,
132    PIPE_TEX_WRAP_CLAMP_TO_BORDER,
133    PIPE_TEX_WRAP_MIRROR_REPEAT,
134    PIPE_TEX_WRAP_MIRROR_CLAMP,
135    PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE,
136    PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER,
137 };
138 
139 /** Between mipmaps, ie mipfilter */
140 enum pipe_tex_mipfilter {
141    PIPE_TEX_MIPFILTER_NEAREST,
142    PIPE_TEX_MIPFILTER_LINEAR,
143    PIPE_TEX_MIPFILTER_NONE,
144 };
145 
146 /** Within a mipmap, ie min/mag filter */
147 enum pipe_tex_filter {
148    PIPE_TEX_FILTER_NEAREST,
149    PIPE_TEX_FILTER_LINEAR,
150 };
151 
152 enum pipe_tex_compare {
153    PIPE_TEX_COMPARE_NONE,
154    PIPE_TEX_COMPARE_R_TO_TEXTURE,
155 };
156 
157 enum pipe_tex_reduction_mode {
158    PIPE_TEX_REDUCTION_WEIGHTED_AVERAGE,
159    PIPE_TEX_REDUCTION_MIN,
160    PIPE_TEX_REDUCTION_MAX,
161 };
162 
163 /**
164  * Clear buffer bits
165  */
166 #define PIPE_CLEAR_DEPTH        (1 << 0)
167 #define PIPE_CLEAR_STENCIL      (1 << 1)
168 #define PIPE_CLEAR_COLOR0       (1 << 2)
169 #define PIPE_CLEAR_COLOR1       (1 << 3)
170 #define PIPE_CLEAR_COLOR2       (1 << 4)
171 #define PIPE_CLEAR_COLOR3       (1 << 5)
172 #define PIPE_CLEAR_COLOR4       (1 << 6)
173 #define PIPE_CLEAR_COLOR5       (1 << 7)
174 #define PIPE_CLEAR_COLOR6       (1 << 8)
175 #define PIPE_CLEAR_COLOR7       (1 << 9)
176 /** Combined flags */
177 /** All color buffers currently bound */
178 #define PIPE_CLEAR_COLOR        (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \
179                                  PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \
180                                  PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \
181                                  PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7)
182 #define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)
183 
184 /**
185  * CPU access map flags
186  */
187 enum pipe_map_flags
188 {
189    PIPE_MAP_NONE = 0,
190    /**
191     * Resource contents read back (or accessed directly) at transfer
192     * create time.
193     */
194    PIPE_MAP_READ = 1 << 0,
195 
196    /**
197     * Resource contents will be written back at buffer/texture_unmap
198     * time (or modified as a result of being accessed directly).
199     */
200    PIPE_MAP_WRITE = 1 << 1,
201 
202    /**
203     * Read/modify/write
204     */
205    PIPE_MAP_READ_WRITE = PIPE_MAP_READ | PIPE_MAP_WRITE,
206 
207    /**
208     * The transfer should map the texture storage directly. The driver may
209     * return NULL if that isn't possible, and the gallium frontend needs to cope
210     * with that and use an alternative path without this flag.
211     *
212     * E.g. the gallium frontend could have a simpler path which maps textures and
213     * does read/modify/write cycles on them directly, and a more complicated
214     * path which uses minimal read and write transfers.
215     *
216     * This flag supresses implicit "DISCARD" for buffer_subdata.
217     */
218    PIPE_MAP_DIRECTLY = 1 << 2,
219 
220    /**
221     * Discards the memory within the mapped region.
222     *
223     * It should not be used with PIPE_MAP_READ.
224     *
225     * See also:
226     * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag.
227     */
228    PIPE_MAP_DISCARD_RANGE = 1 << 3,
229 
230    /**
231     * Fail if the resource cannot be mapped immediately.
232     *
233     * See also:
234     * - Direct3D's D3DLOCK_DONOTWAIT flag.
235     * - Mesa's MESA_MAP_NOWAIT_BIT flag.
236     * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag.
237     */
238    PIPE_MAP_DONTBLOCK = 1 << 4,
239 
240    /**
241     * Do not attempt to synchronize pending operations on the resource when mapping.
242     *
243     * It should not be used with PIPE_MAP_READ.
244     *
245     * See also:
246     * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag.
247     * - Direct3D's D3DLOCK_NOOVERWRITE flag.
248     * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag.
249     */
250    PIPE_MAP_UNSYNCHRONIZED = 1 << 5,
251 
252    /**
253     * Written ranges will be notified later with
254     * pipe_context::transfer_flush_region.
255     *
256     * It should not be used with PIPE_MAP_READ.
257     *
258     * See also:
259     * - pipe_context::transfer_flush_region
260     * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag.
261     */
262    PIPE_MAP_FLUSH_EXPLICIT = 1 << 6,
263 
264    /**
265     * Discards all memory backing the resource.
266     *
267     * It should not be used with PIPE_MAP_READ.
268     *
269     * This is equivalent to:
270     * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_BUFFER_BIT
271     * - BufferData(NULL) on a GL buffer
272     * - Direct3D's D3DLOCK_DISCARD flag.
273     * - WDDM's D3DDDICB_LOCKFLAGS.Discard flag.
274     * - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag
275     * - D3D10's D3D10_MAP_WRITE_DISCARD flag.
276     */
277    PIPE_MAP_DISCARD_WHOLE_RESOURCE = 1 << 7,
278 
279    /**
280     * Allows the resource to be used for rendering while mapped.
281     *
282     * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating
283     * the resource.
284     *
285     * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER)
286     * must be called to ensure the device can see what the CPU has written.
287     */
288    PIPE_MAP_PERSISTENT = 1 << 8,
289 
290    /**
291     * If PERSISTENT is set, this ensures any writes done by the device are
292     * immediately visible to the CPU and vice versa.
293     *
294     * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating
295     * the resource.
296     */
297    PIPE_MAP_COHERENT = 1 << 9,
298 
299    /**
300     * Map a resource in a thread-safe manner, because the calling thread can
301     * be any thread. It can only be used if both WRITE and UNSYNCHRONIZED are
302     * set.
303     */
304    PIPE_MAP_THREAD_SAFE = 1 << 10,
305 
306    /**
307     * Map only the depth aspect of a resource
308     */
309    PIPE_MAP_DEPTH_ONLY = 1 << 11,
310 
311    /**
312     * Map only the stencil aspect of a resource
313     */
314    PIPE_MAP_STENCIL_ONLY = 1 << 12,
315 
316    /**
317     * Mapping will be used only once (never remapped).
318     */
319    PIPE_MAP_ONCE = 1 << 13,
320 
321    /**
322     * This and higher bits are reserved for private use by drivers. Drivers
323     * should use this as (PIPE_MAP_DRV_PRV << i).
324     */
325    PIPE_MAP_DRV_PRV = 1 << 14,
326 };
327 
328 /**
329  * Flags for the flush function.
330  */
331 enum pipe_flush_flags
332 {
333    PIPE_FLUSH_END_OF_FRAME = (1 << 0),
334    PIPE_FLUSH_DEFERRED = (1 << 1),
335    PIPE_FLUSH_FENCE_FD = (1 << 2),
336    PIPE_FLUSH_ASYNC = (1 << 3),
337    PIPE_FLUSH_HINT_FINISH = (1 << 4),
338    PIPE_FLUSH_TOP_OF_PIPE = (1 << 5),
339    PIPE_FLUSH_BOTTOM_OF_PIPE = (1 << 6),
340 };
341 
342 /**
343  * Flags for pipe_context::dump_debug_state.
344  */
345 #define PIPE_DUMP_DEVICE_STATUS_REGISTERS    (1 << 0)
346 
347 /**
348  * Create a compute-only context. Use in pipe_screen::context_create.
349  * This disables draw, blit, and clear*, render_condition, and other graphics
350  * functions. Interop with other graphics contexts is still allowed.
351  * This allows scheduling jobs on a compute-only hardware command queue that
352  * can run in parallel with graphics without stalling it.
353  */
354 #define PIPE_CONTEXT_COMPUTE_ONLY      (1 << 0)
355 
356 /**
357  * Gather debug information and expect that pipe_context::dump_debug_state
358  * will be called. Use in pipe_screen::context_create.
359  */
360 #define PIPE_CONTEXT_DEBUG             (1 << 1)
361 
362 /**
363  * Whether out-of-bounds shader loads must return zero and out-of-bounds
364  * shader stores must be dropped.
365  */
366 #define PIPE_CONTEXT_ROBUST_BUFFER_ACCESS (1 << 2)
367 
368 /**
369  * Prefer threaded pipe_context. It also implies that video codec functions
370  * will not be used. (they will be either no-ops or NULL when threading is
371  * enabled)
372  */
373 #define PIPE_CONTEXT_PREFER_THREADED   (1 << 3)
374 
375 /**
376  * Create a high priority context.
377  */
378 #define PIPE_CONTEXT_HIGH_PRIORITY     (1 << 4)
379 
380 /**
381  * Create a low priority context.
382  */
383 #define PIPE_CONTEXT_LOW_PRIORITY      (1 << 5)
384 
385 /** Stop execution if the device is reset. */
386 #define PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET (1 << 6)
387 
388 /**
389  * Create a protected context to access protected content (surfaces,
390  * textures, ...)
391  *
392  * This is required to access protected images and surfaces if
393  * EGL_EXT_protected_surface is not supported.
394  */
395 #define PIPE_CONTEXT_PROTECTED         (1 << 7)
396 
397 /**
398  * Create a context that does not use sampler LOD bias. If this is set, the
399  * frontend MUST set pipe_sampler_state::lod_bias to 0.0f for all samplers used
400  * with the context. Drivers MAY ignore lod_bias for such contexts.
401  *
402  * This may allow driver fast paths for GLES, which lacks sampler LOD bias.
403  */
404 #define PIPE_CONTEXT_NO_LOD_BIAS (1 << 8)
405 
406 /**
407  * Create a media-only context. Use in pipe_screen::context_create.
408  * This disables draw, blit, and clear*, render_condition, and other graphics.
409  * This also disabled all compute related functions
410  * functions. Interop with other media contexts is still allowed.
411  * This allows scheduling jobs on a media-only hardware command queue that
412  * can run in parallel with media without stalling it.
413  */
414 #define PIPE_CONTEXT_MEDIA_ONLY      (1 << 9)
415 
416 /**
417  * Create a realtime priority context.
418  *
419  * The context must run at the highest possible priority and be capable of
420  * preempting the current executing context when commands are flushed
421  * by such a realtime context.
422  */
423 #define PIPE_CONTEXT_REALTIME_PRIORITY (1 << 10)
424 
425 /**
426  * Flags for pipe_context::memory_barrier.
427  */
428 #define PIPE_BARRIER_MAPPED_BUFFER     (1 << 0)
429 #define PIPE_BARRIER_SHADER_BUFFER     (1 << 1)
430 #define PIPE_BARRIER_QUERY_BUFFER      (1 << 2)
431 #define PIPE_BARRIER_VERTEX_BUFFER     (1 << 3)
432 #define PIPE_BARRIER_INDEX_BUFFER      (1 << 4)
433 #define PIPE_BARRIER_CONSTANT_BUFFER   (1 << 5)
434 #define PIPE_BARRIER_INDIRECT_BUFFER   (1 << 6)
435 #define PIPE_BARRIER_TEXTURE           (1 << 7)
436 #define PIPE_BARRIER_IMAGE             (1 << 8)
437 #define PIPE_BARRIER_FRAMEBUFFER       (1 << 9)
438 #define PIPE_BARRIER_STREAMOUT_BUFFER  (1 << 10)
439 #define PIPE_BARRIER_GLOBAL_BUFFER     (1 << 11)
440 #define PIPE_BARRIER_UPDATE_BUFFER     (1 << 12)
441 #define PIPE_BARRIER_UPDATE_TEXTURE    (1 << 13)
442 #define PIPE_BARRIER_ALL               ((1 << 14) - 1)
443 
444 #define PIPE_BARRIER_UPDATE \
445    (PIPE_BARRIER_UPDATE_BUFFER | PIPE_BARRIER_UPDATE_TEXTURE)
446 
447 /**
448  * Flags for pipe_context::texture_barrier.
449  */
450 #define PIPE_TEXTURE_BARRIER_SAMPLER      (1 << 0)
451 #define PIPE_TEXTURE_BARRIER_FRAMEBUFFER  (1 << 1)
452 
453 /**
454  * Resource binding flags -- gallium frontends must specify in advance all
455  * the ways a resource might be used.
456  */
457 #define PIPE_BIND_DEPTH_STENCIL        (1 << 0) /* create_surface */
458 #define PIPE_BIND_RENDER_TARGET        (1 << 1) /* create_surface */
459 #define PIPE_BIND_BLENDABLE            (1 << 2) /* create_surface */
460 #define PIPE_BIND_SAMPLER_VIEW         (1 << 3) /* create_sampler_view */
461 #define PIPE_BIND_VERTEX_BUFFER        (1 << 4) /* set_vertex_buffers */
462 #define PIPE_BIND_INDEX_BUFFER         (1 << 5) /* draw_elements */
463 #define PIPE_BIND_CONSTANT_BUFFER      (1 << 6) /* set_constant_buffer */
464 #define PIPE_BIND_DISPLAY_TARGET       (1 << 7) /* flush_front_buffer */
465 #define PIPE_BIND_VERTEX_STATE         (1 << 8) /* create_vertex_state */
466 /* gap */
467 #define PIPE_BIND_STREAM_OUTPUT        (1 << 10) /* set_stream_output_buffers */
468 #define PIPE_BIND_CURSOR               (1 << 11) /* mouse cursor */
469 #define PIPE_BIND_CUSTOM               (1 << 12) /* gallium frontend/winsys usages */
470 #define PIPE_BIND_GLOBAL               (1 << 13) /* set_global_binding */
471 #define PIPE_BIND_SHADER_BUFFER        (1 << 14) /* set_shader_buffers */
472 #define PIPE_BIND_SHADER_IMAGE         (1 << 15) /* set_shader_images */
473 #define PIPE_BIND_COMPUTE_RESOURCE     (1 << 16) /* set_compute_resources */
474 #define PIPE_BIND_COMMAND_ARGS_BUFFER  (1 << 17) /* pipe_draw_info.indirect */
475 #define PIPE_BIND_QUERY_BUFFER         (1 << 18) /* get_query_result_resource */
476 
477 /**
478  * The first two flags above were previously part of the amorphous
479  * TEXTURE_USAGE, most of which are now descriptions of the ways a
480  * particular texture can be bound to the gallium pipeline.  The two flags
481  * below do not fit within that and probably need to be migrated to some
482  * other place.
483  *
484  * Scanout is used to ask for a texture suitable for actual scanout (hence
485  * the name), which implies extra layout constraints on some hardware.
486  * It may also have some special meaning regarding mouse cursor images.
487  *
488  * The shared flag is quite underspecified, but certainly isn't a
489  * binding flag - it seems more like a message to the winsys to create
490  * a shareable allocation.
491  *
492  * The third flag has been added to be able to force textures to be created
493  * in linear mode (no tiling).
494  */
495 #define PIPE_BIND_SCANOUT     (1 << 19) /*  */
496 #define PIPE_BIND_SHARED      (1 << 20) /* get_texture_handle ??? */
497 #define PIPE_BIND_LINEAR      (1 << 21)
498 #define PIPE_BIND_PROTECTED   (1 << 22) /* Resource will be protected/encrypted */
499 #define PIPE_BIND_SAMPLER_REDUCTION_MINMAX (1 << 23) /* pipe_caps.sampler_reduction_minmax */
500 /* Resource is the DRI_PRIME blit destination. Only set on on the render GPU. */
501 #define PIPE_BIND_PRIME_BLIT_DST (1 << 24)
502 #define PIPE_BIND_USE_FRONT_RENDERING (1 << 25) /* Resource may be used for frontbuffer rendering */
503 #define PIPE_BIND_CONST_BW    (1 << 26) /* Avoid using a data dependent layout (AFBC, UBWC, etc) */
504 #define PIPE_BIND_VIDEO_DECODE_DPB     (1 << 27) /* video engine DPB decode reconstructed picture */
505 #define PIPE_BIND_VIDEO_ENCODE_DPB     (1 << 28) /* video engine DPB encode reconstructed picture */
506 
507 /**
508  * Flags for the driver about resource behaviour:
509  */
510 #define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0)
511 #define PIPE_RESOURCE_FLAG_MAP_COHERENT   (1 << 1)
512 #define PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY (1 << 2)
513 #define PIPE_RESOURCE_FLAG_SPARSE                (1 << 3)
514 #define PIPE_RESOURCE_FLAG_SINGLE_THREAD_USE     (1 << 4)
515 #define PIPE_RESOURCE_FLAG_ENCRYPTED             (1 << 5)
516 #define PIPE_RESOURCE_FLAG_DONT_OVER_ALLOCATE    (1 << 6)
517 #define PIPE_RESOURCE_FLAG_DONT_MAP_DIRECTLY     (1 << 7) /* for small visible VRAM */
518 #define PIPE_RESOURCE_FLAG_UNMAPPABLE            (1 << 8) /* implies staging transfers due to VK interop */
519 #define PIPE_RESOURCE_FLAG_DRV_PRIV              (1 << 9) /* driver/winsys private */
520 #define PIPE_RESOURCE_FLAG_FRONTEND_PRIV         (1 << 24) /* gallium frontend private */
521 
522 /**
523  * Fixed-rate compression
524  */
525 #define PIPE_COMPRESSION_FIXED_RATE_NONE    0x0
526 #define PIPE_COMPRESSION_FIXED_RATE_DEFAULT 0xF
527 
528 /**
529  * Hint about the expected lifecycle of a resource.
530  * Sorted according to GPU vs CPU access.
531  */
532 enum pipe_resource_usage {
533    PIPE_USAGE_DEFAULT,        /* fast GPU access */
534    PIPE_USAGE_IMMUTABLE,      /* fast GPU access, immutable */
535    PIPE_USAGE_DYNAMIC,        /* uploaded data is used multiple times */
536    PIPE_USAGE_STREAM,         /* uploaded data is used once */
537    PIPE_USAGE_STAGING,        /* fast CPU access */
538 };
539 
540 /**
541  * Tessellator spacing types
542  */
543 enum pipe_tess_spacing {
544    PIPE_TESS_SPACING_FRACTIONAL_ODD,
545    PIPE_TESS_SPACING_FRACTIONAL_EVEN,
546    PIPE_TESS_SPACING_EQUAL,
547 };
548 
549 /**
550  * Query object types
551  */
552 enum pipe_query_type {
553    PIPE_QUERY_OCCLUSION_COUNTER,
554    PIPE_QUERY_OCCLUSION_PREDICATE,
555    PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE,
556    PIPE_QUERY_TIMESTAMP,
557    PIPE_QUERY_TIMESTAMP_DISJOINT,
558    PIPE_QUERY_TIME_ELAPSED,
559    PIPE_QUERY_PRIMITIVES_GENERATED,
560    PIPE_QUERY_PRIMITIVES_EMITTED,
561    PIPE_QUERY_SO_STATISTICS,
562    PIPE_QUERY_SO_OVERFLOW_PREDICATE,
563    PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE,
564    PIPE_QUERY_GPU_FINISHED,
565    PIPE_QUERY_PIPELINE_STATISTICS,
566    PIPE_QUERY_PIPELINE_STATISTICS_SINGLE,
567    PIPE_QUERY_TYPES,
568    /* start of driver queries, see pipe_screen::get_driver_query_info */
569    PIPE_QUERY_DRIVER_SPECIFIC = 256,
570 };
571 
572 /**
573  * Index for PIPE_QUERY_PIPELINE_STATISTICS subqueries.
574  */
575 enum pipe_statistics_query_index {
576    PIPE_STAT_QUERY_IA_VERTICES,
577    PIPE_STAT_QUERY_IA_PRIMITIVES,
578    PIPE_STAT_QUERY_VS_INVOCATIONS,
579    PIPE_STAT_QUERY_GS_INVOCATIONS,
580    PIPE_STAT_QUERY_GS_PRIMITIVES,
581    PIPE_STAT_QUERY_C_INVOCATIONS,
582    PIPE_STAT_QUERY_C_PRIMITIVES,
583    PIPE_STAT_QUERY_PS_INVOCATIONS,
584    PIPE_STAT_QUERY_HS_INVOCATIONS,
585    PIPE_STAT_QUERY_DS_INVOCATIONS,
586    PIPE_STAT_QUERY_CS_INVOCATIONS,
587    PIPE_STAT_QUERY_TS_INVOCATIONS,
588    PIPE_STAT_QUERY_MS_INVOCATIONS,
589 };
590 
591 /**
592  * Conditional rendering modes
593  */
594 enum pipe_render_cond_flag {
595    PIPE_RENDER_COND_WAIT,
596    PIPE_RENDER_COND_NO_WAIT,
597    PIPE_RENDER_COND_BY_REGION_WAIT,
598    PIPE_RENDER_COND_BY_REGION_NO_WAIT,
599 };
600 
601 /**
602  * Point sprite coord modes
603  */
604 enum pipe_sprite_coord_mode {
605    PIPE_SPRITE_COORD_UPPER_LEFT,
606    PIPE_SPRITE_COORD_LOWER_LEFT,
607 };
608 
609 /**
610  * Viewport swizzles
611  */
612 enum pipe_viewport_swizzle {
613    PIPE_VIEWPORT_SWIZZLE_POSITIVE_X,
614    PIPE_VIEWPORT_SWIZZLE_NEGATIVE_X,
615    PIPE_VIEWPORT_SWIZZLE_POSITIVE_Y,
616    PIPE_VIEWPORT_SWIZZLE_NEGATIVE_Y,
617    PIPE_VIEWPORT_SWIZZLE_POSITIVE_Z,
618    PIPE_VIEWPORT_SWIZZLE_NEGATIVE_Z,
619    PIPE_VIEWPORT_SWIZZLE_POSITIVE_W,
620    PIPE_VIEWPORT_SWIZZLE_NEGATIVE_W,
621 };
622 
623 /**
624  * Device reset status.
625  */
626 enum pipe_reset_status
627 {
628    PIPE_NO_RESET,
629    PIPE_GUILTY_CONTEXT_RESET,
630    PIPE_INNOCENT_CONTEXT_RESET,
631    PIPE_UNKNOWN_CONTEXT_RESET,
632 };
633 
634 enum pipe_vertex_input_alignment {
635    PIPE_VERTEX_INPUT_ALIGNMENT_NONE,
636    PIPE_VERTEX_INPUT_ALIGNMENT_4BYTE,
637    PIPE_VERTEX_INPUT_ALIGNMENT_ELEMENT,
638 };
639 
640 
641 /**
642  * Conservative rasterization modes.
643  */
644 enum pipe_conservative_raster_mode
645 {
646    PIPE_CONSERVATIVE_RASTER_OFF,
647 
648    /**
649     * The post-snap mode means the conservative rasterization occurs after
650     * the conversion from floating-point to fixed-point coordinates
651     * on the subpixel grid.
652     */
653    PIPE_CONSERVATIVE_RASTER_POST_SNAP,
654 
655    /**
656     * The pre-snap mode means the conservative rasterization occurs before
657     * the conversion from floating-point to fixed-point coordinates.
658     */
659    PIPE_CONSERVATIVE_RASTER_PRE_SNAP,
660 };
661 
662 
663 /**
664  * resource_get_handle flags.
665  */
666 /* Requires pipe_context::flush_resource before external use. */
667 #define PIPE_HANDLE_USAGE_EXPLICIT_FLUSH     (1 << 0)
668 /* Expected external use of the resource: */
669 #define PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE  (1 << 1)
670 #define PIPE_HANDLE_USAGE_SHADER_WRITE       (1 << 2)
671 
672 /**
673  * pipe_image_view access flags.
674  */
675 #define PIPE_IMAGE_ACCESS_READ               (1 << 0)
676 #define PIPE_IMAGE_ACCESS_WRITE              (1 << 1)
677 #define PIPE_IMAGE_ACCESS_READ_WRITE         (PIPE_IMAGE_ACCESS_READ | \
678                                               PIPE_IMAGE_ACCESS_WRITE)
679 #define PIPE_IMAGE_ACCESS_COHERENT           (1 << 2)
680 #define PIPE_IMAGE_ACCESS_VOLATILE           (1 << 3)
681 #define PIPE_IMAGE_ACCESS_TEX2D_FROM_BUFFER  (1 << 4)
682 #define PIPE_IMAGE_ACCESS_DRIVER_INTERNAL    (1 << 5)
683 
684 /**
685  * Shader subgroup feature flags aligned with GL_KHR_shader_subgroup.
686  */
687 #define PIPE_SHADER_SUBGROUP_FEATURE_BASIC            (1 << 0)
688 #define PIPE_SHADER_SUBGROUP_FEATURE_VOTE             (1 << 1)
689 #define PIPE_SHADER_SUBGROUP_FEATURE_ARITHMETIC       (1 << 2)
690 #define PIPE_SHADER_SUBGROUP_FEATURE_BALLOT           (1 << 3)
691 #define PIPE_SHADER_SUBGROUP_FEATURE_SHUFFLE          (1 << 4)
692 #define PIPE_SHADER_SUBGROUP_FEATURE_SHUFFLE_RELATIVE (1 << 5)
693 #define PIPE_SHADER_SUBGROUP_FEATURE_CLUSTERED        (1 << 6)
694 #define PIPE_SHADER_SUBGROUP_FEATURE_QUAD             (1 << 7)
695 #define PIPE_SHADER_SUBGROUP_NUM_FEATURES             8
696 
697 enum pipe_point_size_lower_mode {
698    PIPE_POINT_SIZE_LOWER_ALWAYS,
699    PIPE_POINT_SIZE_LOWER_NEVER,
700    PIPE_POINT_SIZE_LOWER_USER_ONLY,
701 };
702 
703 enum pipe_texture_transfer_mode {
704    PIPE_TEXTURE_TRANSFER_DEFAULT = 0,
705    PIPE_TEXTURE_TRANSFER_BLIT = (1 << 0),
706    PIPE_TEXTURE_TRANSFER_COMPUTE = (1 << 1),
707 };
708 
709 /**
710  * Possible bits for pipe_caps.context_priority_mask param, which should
711  * return a bitmask of the supported priorities.  If the driver does not
712  * support prioritized contexts, it can return 0.
713  *
714  * Note that these match __EGL_CONTEXT_PRIORITY_*_BIT.
715  */
716 #define PIPE_CONTEXT_PRIORITY_LOW      (1 << 0)
717 #define PIPE_CONTEXT_PRIORITY_MEDIUM   (1 << 1)
718 #define PIPE_CONTEXT_PRIORITY_HIGH     (1 << 2)
719 #define PIPE_CONTEXT_PRIORITY_REALTIME (1 << 3)
720 
721 enum pipe_quirk_texture_border_color_swizzle {
722    PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 = (1 << 0),
723    PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 = (1 << 1),
724    PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO = (1 << 2),
725    PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_ALPHA_NOT_W = (1 << 3),
726 };
727 
728 enum pipe_endian
729 {
730    PIPE_ENDIAN_LITTLE = 0,
731    PIPE_ENDIAN_BIG = 1,
732 #if UTIL_ARCH_LITTLE_ENDIAN
733    PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE
734 #elif UTIL_ARCH_BIG_ENDIAN
735    PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG
736 #endif
737 };
738 
739 /** Shader caps not specific to any single stage */
740 enum pipe_shader_cap
741 {
742    PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */
743    PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS,
744    PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS,
745    PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS,
746    PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH,
747    PIPE_SHADER_CAP_MAX_INPUTS,
748    PIPE_SHADER_CAP_MAX_OUTPUTS,
749    PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE,
750    PIPE_SHADER_CAP_MAX_CONST_BUFFERS,
751    PIPE_SHADER_CAP_MAX_TEMPS,
752    /* boolean caps */
753    PIPE_SHADER_CAP_CONT_SUPPORTED,
754    PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR,
755    PIPE_SHADER_CAP_INDIRECT_CONST_ADDR,
756    PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */
757    PIPE_SHADER_CAP_INTEGERS,
758    PIPE_SHADER_CAP_INT64_ATOMICS,
759    PIPE_SHADER_CAP_FP16,
760    PIPE_SHADER_CAP_FP16_DERIVATIVES,
761    PIPE_SHADER_CAP_FP16_CONST_BUFFERS,
762    PIPE_SHADER_CAP_INT16,
763    PIPE_SHADER_CAP_GLSL_16BIT_CONSTS,
764    PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS,
765    PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED,
766    PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS,
767    PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE,
768    PIPE_SHADER_CAP_MAX_SHADER_BUFFERS,
769    PIPE_SHADER_CAP_SUPPORTED_IRS,
770    PIPE_SHADER_CAP_MAX_SHADER_IMAGES,
771    PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS,
772    PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS,
773 };
774 
775 /**
776  * Shader intermediate representation.
777  *
778  * Note that if the driver requests something other than TGSI, it must
779  * always be prepared to receive TGSI in addition to its preferred IR.
780  * If the driver requests TGSI as its preferred IR, it will *always*
781  * get TGSI.
782  *
783  * Note that PIPE_SHADER_IR_TGSI should be zero for backwards compat with
784  * gallium frontends that only understand TGSI.
785  */
786 enum pipe_shader_ir
787 {
788    PIPE_SHADER_IR_TGSI = 0,
789    PIPE_SHADER_IR_NATIVE,
790    PIPE_SHADER_IR_NIR,
791 };
792 
793 /**
794  * Compute-specific implementation capability.  They can be queried
795  * using pipe_screen::get_compute_param.
796  */
797 enum pipe_compute_cap
798 {
799    PIPE_COMPUTE_CAP_ADDRESS_BITS,
800    PIPE_COMPUTE_CAP_IR_TARGET,
801    PIPE_COMPUTE_CAP_GRID_DIMENSION,
802    PIPE_COMPUTE_CAP_MAX_GRID_SIZE,
803    PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE,
804    PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK,
805    PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE,
806    PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
807    PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE,
808    PIPE_COMPUTE_CAP_MAX_INPUT_SIZE,
809    PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
810    PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY,
811    PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS,
812    PIPE_COMPUTE_CAP_MAX_SUBGROUPS,
813    PIPE_COMPUTE_CAP_IMAGES_SUPPORTED,
814    PIPE_COMPUTE_CAP_SUBGROUP_SIZES,
815    PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK,
816 };
817 
818 struct pipe_caps {
819    bool graphics;
820    bool npot_textures;
821    bool anisotropic_filter;
822    bool occlusion_query;
823    bool query_time_elapsed;
824    bool texture_shadow_map;
825    bool texture_swizzle;
826    bool texture_mirror_clamp;
827    bool blend_equation_separate;
828    bool primitive_restart;
829    bool primitive_restart_fixed_index;
830    bool indep_blend_enable;
831    bool indep_blend_func;
832    bool fs_coord_origin_upper_left;
833    bool fs_coord_origin_lower_left;
834    bool fs_coord_pixel_center_half_integer;
835    bool fs_coord_pixel_center_integer;
836    bool depth_clip_disable;
837    bool depth_clip_disable_separate;
838    bool depth_clamp_enable;
839    bool shader_stencil_export;
840    bool vs_instanceid;
841    bool vertex_element_instance_divisor;
842    bool fragment_color_clamped;
843    bool mixed_colorbuffer_formats;
844    bool seamless_cube_map;
845    bool seamless_cube_map_per_texture;
846    bool conditional_render;
847    bool texture_barrier;
848    bool stream_output_pause_resume;
849    bool tgsi_can_compact_constants;
850    bool vertex_color_unclamped;
851    bool vertex_color_clamped;
852    bool quads_follow_provoking_vertex_convention;
853    bool user_vertex_buffers;
854    bool compute;
855    bool start_instance;
856    bool query_timestamp;
857    bool texture_multisample;
858    bool cube_map_array;
859    bool texture_buffer_objects;
860    bool buffer_sampler_view_rgba_only;
861    bool tgsi_texcoord;
862    bool query_pipeline_statistics;
863    bool mixed_framebuffer_sizes;
864    bool vs_layer_viewport;
865    bool texture_gather_sm5;
866    bool buffer_map_persistent_coherent;
867    bool fake_sw_msaa;
868    bool texture_query_lod;
869    bool sample_shading;
870    bool texture_gather_offsets;
871    bool vs_window_space_position;
872    bool draw_indirect;
873    bool fs_fine_derivative;
874    bool uma;
875    bool conditional_render_inverted;
876    bool sampler_view_target;
877    bool clip_halfz;
878    bool polygon_offset_clamp;
879    bool multisample_z_resolve;
880    bool resource_from_user_memory;
881    bool resource_from_user_memory_compute_only;
882    bool device_reset_status_query;
883    bool texture_float_linear;
884    bool texture_half_float_linear;
885    bool depth_bounds_test;
886    bool texture_query_samples;
887    bool force_persample_interp;
888    bool shareable_shaders;
889    bool copy_between_compressed_and_plain_formats;
890    bool clear_scissored;
891    bool draw_parameters;
892    bool shader_pack_half_float;
893    bool multi_draw_indirect;
894    bool multi_draw_indirect_params;
895    bool multi_draw_indirect_partial_stride;
896    bool fs_position_is_sysval;
897    bool fs_point_is_sysval;
898    bool fs_face_is_integer_sysval;
899    bool invalidate_buffer;
900    bool generate_mipmap;
901    bool string_marker;
902    bool surface_reinterpret_blocks;
903    bool query_buffer_object;
904    bool query_memory_info;
905    bool framebuffer_no_attachment;
906    bool robust_buffer_access_behavior;
907    bool cull_distance;
908    bool shader_group_vote;
909    bool polygon_offset_units_unscaled;
910    bool shader_array_components;
911    bool stream_output_interleave_buffers;
912    bool native_fence_fd;
913    bool glsl_tess_levels_as_inputs;
914    bool legacy_math_rules;
915    bool fp16;
916    bool doubles;
917    bool int64;
918    bool tgsi_tex_txf_lz;
919    bool shader_clock;
920    bool polygon_mode_fill_rectangle;
921    bool shader_ballot;
922    bool tes_layer_viewport;
923    bool can_bind_const_buffer_as_vertex;
924    bool allow_mapped_buffers_during_execution;
925    bool post_depth_coverage;
926    bool bindless_texture;
927    bool nir_samplers_as_deref;
928    bool query_so_overflow;
929    bool memobj;
930    bool load_constbuf;
931    bool tile_raster_order;
932    bool signed_vertex_buffer_offset;
933    bool fence_signal;
934    bool packed_uniforms;
935    bool conservative_raster_post_snap_triangles;
936    bool conservative_raster_post_snap_points_lines;
937    bool conservative_raster_pre_snap_triangles;
938    bool conservative_raster_pre_snap_points_lines;
939    bool conservative_raster_post_depth_coverage;
940    bool conservative_raster_inner_coverage;
941    bool programmable_sample_locations;
942    bool texture_mirror_clamp_to_edge;
943    bool surface_sample_count;
944    bool image_atomic_float_add;
945    bool query_pipeline_statistics_single;
946    bool dest_surface_srgb_control;
947    bool compute_grid_info_last_block;
948    bool compute_shader_derivatives;
949    bool image_load_formatted;
950    bool image_store_formatted;
951    bool throttle;
952    bool cl_gl_sharing;
953    bool prefer_compute_for_multimedia;
954    bool fragment_shader_interlock;
955    bool fbfetch_coherent;
956    bool atomic_float_minmax;
957    bool tgsi_div;
958    bool fragment_shader_texture_lod;
959    bool fragment_shader_derivatives;
960    bool texture_shadow_lod;
961    bool shader_samples_identical;
962    bool image_atomic_inc_wrap;
963    bool prefer_imm_arrays_as_constbuf;
964    bool gl_spirv;
965    bool gl_spirv_variable_pointers;
966    bool demote_to_helper_invocation;
967    bool tgsi_tg4_component_in_swizzle;
968    bool flatshade;
969    bool alpha_test;
970    bool two_sided_color;
971    bool opencl_integer_functions;
972    bool integer_multiply_32x16;
973    bool frontend_noop;
974    bool nir_images_as_deref;
975    bool packed_stream_output;
976    bool viewport_transform_lowered;
977    bool psiz_clamped;
978    bool viewport_swizzle;
979    bool system_svm;
980    bool viewport_mask;
981    bool alpha_to_coverage_dither_control;
982    bool map_unsynchronized_thread_safe;
983    bool blend_equation_advanced;
984    bool nir_atomics_as_deref;
985    bool no_clip_on_copy_tex;
986    bool shader_atomic_int64;
987    bool device_protected_surface;
988    bool prefer_real_buffer_in_constbuf0;
989    bool gl_clamp;
990    bool texrect;
991    bool sampler_reduction_minmax;
992    bool sampler_reduction_minmax_arb;
993    bool allow_dynamic_vao_fastpath;
994    bool emulate_nonfixed_primitive_restart;
995    bool prefer_back_buffer_reuse;
996    bool draw_vertex_state;
997    bool prefer_pot_aligned_varyings;
998    bool sparse_texture_full_array_cube_mipmaps;
999    bool query_sparse_texture_residency;
1000    bool clamp_sparse_texture_lod;
1001    bool allow_draw_out_of_order;
1002    bool hardware_gl_select;
1003    bool dithering;
1004    bool fbfetch_zs;
1005    bool timeline_semaphore_import;
1006    bool device_protected_context;
1007    bool allow_glthread_buffer_subdata_opt;
1008    bool null_textures;
1009    bool astc_void_extents_need_denorm_flush;
1010    bool validate_all_dirty_states;
1011    bool has_const_bw;
1012    bool performance_monitor;
1013    bool texture_sampler_independent;
1014    bool astc_decode_mode;
1015    bool shader_subgroup_quad_all_stages;
1016    bool call_finalize_nir_in_linker;
1017 
1018    int accelerated;
1019    int min_texel_offset;
1020    int max_texel_offset;
1021    int min_texture_gather_offset;
1022    int max_texture_gather_offset;
1023 
1024    unsigned max_dual_source_render_targets;
1025    unsigned max_render_targets;
1026    unsigned max_texture_2d_size;
1027    unsigned max_texture_3d_levels;
1028    unsigned max_texture_cube_levels;
1029    unsigned max_stream_output_buffers;
1030    unsigned max_texture_array_layers;
1031    unsigned max_stream_output_separate_components;
1032    unsigned max_stream_output_interleaved_components;
1033    unsigned glsl_feature_level;
1034    unsigned glsl_feature_level_compatibility;
1035    unsigned essl_feature_level;
1036    unsigned constant_buffer_offset_alignment;
1037    unsigned timer_resolution;
1038    unsigned min_map_buffer_alignment;
1039    unsigned texture_buffer_offset_alignment;
1040    unsigned linear_image_pitch_alignment;
1041    unsigned linear_image_base_address_alignment;
1042    /* pipe_texture_transfer_mode */
1043    unsigned texture_transfer_modes;
1044    /* pipe_quirk_texture_border_color_swizzle */
1045    unsigned texture_border_color_quirk;
1046    unsigned max_texel_buffer_elements;
1047    unsigned max_viewports;
1048    unsigned max_geometry_output_vertices;
1049    unsigned max_geometry_total_output_components;
1050    unsigned max_texture_gather_components;
1051    unsigned max_vertex_streams;
1052    unsigned vendor_id;
1053    unsigned device_id;
1054    unsigned video_memory;
1055    unsigned max_vertex_attrib_stride;
1056    unsigned max_shader_patch_varyings;
1057    unsigned shader_buffer_offset_alignment;
1058    unsigned pci_group;
1059    unsigned pci_bus;
1060    unsigned pci_device;
1061    unsigned pci_function;
1062    unsigned max_window_rectangles;
1063    unsigned viewport_subpixel_bits;
1064    unsigned rasterizer_subpixel_bits;
1065    unsigned mixed_color_depth_bits;
1066    unsigned fbfetch;
1067    unsigned sparse_buffer_page_size;
1068    unsigned max_combined_shader_output_resources;
1069    unsigned framebuffer_msaa_constraints;
1070    unsigned context_priority_mask;
1071    unsigned constbuf0_flags;
1072    unsigned max_conservative_raster_subpixel_precision_bias;
1073    unsigned max_gs_invocations;
1074    unsigned max_shader_buffer_size;
1075    unsigned max_combined_shader_buffers;
1076    unsigned max_combined_hw_atomic_counters;
1077    unsigned max_combined_hw_atomic_counter_buffers;
1078    unsigned max_texture_upload_memory_budget;
1079    unsigned max_vertex_element_src_offset;
1080    unsigned max_varyings;
1081    unsigned dmabuf;
1082    unsigned clip_planes;
1083    unsigned max_vertex_buffers;
1084    unsigned gl_begin_end_buffer_size;
1085    unsigned glsl_zero_init;
1086    unsigned max_texture_mb;
1087    unsigned supported_prim_modes;
1088    unsigned supported_prim_modes_with_restart;
1089    unsigned max_sparse_texture_size;
1090    unsigned max_sparse_3d_texture_size;
1091    unsigned max_sparse_array_texture_layers;
1092    unsigned max_constant_buffer_size;
1093    unsigned query_timestamp_bits;
1094    unsigned shader_subgroup_size;
1095    unsigned shader_subgroup_supported_stages;
1096    unsigned shader_subgroup_supported_features;
1097    unsigned multiview;
1098 
1099    enum pipe_vertex_input_alignment vertex_input_alignment;
1100    enum pipe_endian endianness;
1101    enum pipe_point_size_lower_mode point_size_fixed;
1102 
1103    float min_line_width;
1104    float min_line_width_aa;
1105    float max_line_width;
1106    float max_line_width_aa;
1107    float line_width_granularity;
1108    float min_point_size;
1109    float min_point_size_aa;
1110    float max_point_size;
1111    float max_point_size_aa;
1112    float point_size_granularity;
1113    float max_texture_anisotropy;
1114    float max_texture_lod_bias;
1115    float min_conservative_raster_dilate;
1116    float max_conservative_raster_dilate;
1117    float conservative_raster_dilate_granularity;
1118 };
1119 
1120 /**
1121  * Resource parameters. They can be queried using
1122  * pipe_screen::get_resource_param.
1123  */
1124 enum pipe_resource_param
1125 {
1126    PIPE_RESOURCE_PARAM_NPLANES,
1127    PIPE_RESOURCE_PARAM_STRIDE,
1128    PIPE_RESOURCE_PARAM_OFFSET,
1129    PIPE_RESOURCE_PARAM_MODIFIER,
1130    PIPE_RESOURCE_PARAM_HANDLE_TYPE_SHARED,
1131    PIPE_RESOURCE_PARAM_HANDLE_TYPE_KMS,
1132    PIPE_RESOURCE_PARAM_HANDLE_TYPE_FD,
1133    PIPE_RESOURCE_PARAM_LAYER_STRIDE,
1134 };
1135 
1136 /**
1137  * Types of parameters for pipe_context::set_context_param.
1138  */
1139 enum pipe_context_param
1140 {
1141    /* Call util_thread_sched_apply_policy() for each driver thread that
1142     * benefits from it.
1143     */
1144    PIPE_CONTEXT_PARAM_UPDATE_THREAD_SCHEDULING,
1145 };
1146 
1147 /**
1148  * Composite query types
1149  */
1150 
1151 /**
1152  * Query result for PIPE_QUERY_SO_STATISTICS.
1153  */
1154 struct pipe_query_data_so_statistics
1155 {
1156    uint64_t num_primitives_written;
1157    uint64_t primitives_storage_needed;
1158 };
1159 
1160 /**
1161  * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT.
1162  */
1163 struct pipe_query_data_timestamp_disjoint
1164 {
1165    uint64_t frequency;
1166    bool     disjoint;
1167 };
1168 
1169 /**
1170  * Query result for PIPE_QUERY_PIPELINE_STATISTICS.
1171  */
1172 struct pipe_query_data_pipeline_statistics
1173 {
1174    union {
1175       struct {
1176          uint64_t ia_vertices;    /**< Num vertices read by the vertex fetcher. */
1177          uint64_t ia_primitives;  /**< Num primitives read by the vertex fetcher. */
1178          uint64_t vs_invocations; /**< Num vertex shader invocations. */
1179          uint64_t gs_invocations; /**< Num geometry shader invocations. */
1180          uint64_t gs_primitives;  /**< Num primitives output by a geometry shader. */
1181          uint64_t c_invocations;  /**< Num primitives sent to the rasterizer. */
1182          uint64_t c_primitives;   /**< Num primitives that were rendered. */
1183          uint64_t ps_invocations; /**< Num pixel shader invocations. */
1184          uint64_t hs_invocations; /**< Num hull shader invocations. */
1185          uint64_t ds_invocations; /**< Num domain shader invocations. */
1186          uint64_t cs_invocations; /**< Num compute shader invocations. */
1187          uint64_t ts_invocations; /**< Num task shader invocations. */
1188          uint64_t ms_invocations; /**< Num mesh shader invocations. */
1189       };
1190       uint64_t counters[13];
1191    };
1192 };
1193 
1194 /**
1195  * For batch queries.
1196  */
1197 union pipe_numeric_type_union
1198 {
1199    uint64_t u64;
1200    uint32_t u32;
1201    float f;
1202 };
1203 
1204 /**
1205  * Query result (returned by pipe_context::get_query_result).
1206  */
1207 union pipe_query_result
1208 {
1209    /* PIPE_QUERY_OCCLUSION_PREDICATE */
1210    /* PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE */
1211    /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */
1212    /* PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE */
1213    /* PIPE_QUERY_GPU_FINISHED */
1214    bool b;
1215 
1216    /* PIPE_QUERY_OCCLUSION_COUNTER */
1217    /* PIPE_QUERY_TIMESTAMP */
1218    /* PIPE_QUERY_TIME_ELAPSED */
1219    /* PIPE_QUERY_PRIMITIVES_GENERATED */
1220    /* PIPE_QUERY_PRIMITIVES_EMITTED */
1221    /* PIPE_DRIVER_QUERY_TYPE_UINT64 */
1222    /* PIPE_DRIVER_QUERY_TYPE_BYTES */
1223    /* PIPE_DRIVER_QUERY_TYPE_MICROSECONDS */
1224    /* PIPE_DRIVER_QUERY_TYPE_HZ */
1225    uint64_t u64;
1226 
1227    /* PIPE_DRIVER_QUERY_TYPE_UINT */
1228    uint32_t u32;
1229 
1230    /* PIPE_DRIVER_QUERY_TYPE_FLOAT */
1231    /* PIPE_DRIVER_QUERY_TYPE_PERCENTAGE */
1232    float f;
1233 
1234    /* PIPE_QUERY_SO_STATISTICS */
1235    struct pipe_query_data_so_statistics so_statistics;
1236 
1237    /* PIPE_QUERY_TIMESTAMP_DISJOINT */
1238    struct pipe_query_data_timestamp_disjoint timestamp_disjoint;
1239 
1240    /* PIPE_QUERY_PIPELINE_STATISTICS */
1241    struct pipe_query_data_pipeline_statistics pipeline_statistics;
1242 
1243    /* batch queries (variable length) */
1244    union pipe_numeric_type_union batch[1];
1245 };
1246 
1247 enum pipe_query_value_type
1248 {
1249    PIPE_QUERY_TYPE_I32,
1250    PIPE_QUERY_TYPE_U32,
1251    PIPE_QUERY_TYPE_I64,
1252    PIPE_QUERY_TYPE_U64,
1253 };
1254 
1255 enum pipe_query_flags
1256 {
1257    PIPE_QUERY_WAIT = (1 << 0),
1258    PIPE_QUERY_PARTIAL = (1 << 1),
1259 };
1260 
1261 enum pipe_driver_query_type
1262 {
1263    PIPE_DRIVER_QUERY_TYPE_UINT64,
1264    PIPE_DRIVER_QUERY_TYPE_UINT,
1265    PIPE_DRIVER_QUERY_TYPE_FLOAT,
1266    PIPE_DRIVER_QUERY_TYPE_PERCENTAGE,
1267    PIPE_DRIVER_QUERY_TYPE_BYTES,
1268    PIPE_DRIVER_QUERY_TYPE_MICROSECONDS,
1269    PIPE_DRIVER_QUERY_TYPE_HZ,
1270    PIPE_DRIVER_QUERY_TYPE_DBM,
1271    PIPE_DRIVER_QUERY_TYPE_TEMPERATURE,
1272    PIPE_DRIVER_QUERY_TYPE_VOLTS,
1273    PIPE_DRIVER_QUERY_TYPE_AMPS,
1274    PIPE_DRIVER_QUERY_TYPE_WATTS,
1275 };
1276 
1277 /* Whether an average value per frame or a cumulative value should be
1278  * displayed.
1279  */
1280 enum pipe_driver_query_result_type
1281 {
1282    PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE,
1283    PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE,
1284 };
1285 
1286 /**
1287  * Some hardware requires some hardware-specific queries to be submitted
1288  * as batched queries. The corresponding query objects are created using
1289  * create_batch_query, and at most one such query may be active at
1290  * any time.
1291  */
1292 #define PIPE_DRIVER_QUERY_FLAG_BATCH     (1 << 0)
1293 
1294 /* Do not list this query in the HUD. */
1295 #define PIPE_DRIVER_QUERY_FLAG_DONT_LIST (1 << 1)
1296 
1297 struct pipe_driver_query_info
1298 {
1299    const char *name;
1300    unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */
1301    union pipe_numeric_type_union max_value; /* max value that can be returned */
1302    enum pipe_driver_query_type type;
1303    enum pipe_driver_query_result_type result_type;
1304    unsigned group_id;
1305    unsigned flags;
1306 };
1307 
1308 struct pipe_driver_query_group_info
1309 {
1310    const char *name;
1311    unsigned max_active_queries;
1312    unsigned num_queries;
1313 };
1314 
1315 enum pipe_fd_type
1316 {
1317    PIPE_FD_TYPE_NATIVE_SYNC,
1318    PIPE_FD_TYPE_SYNCOBJ,
1319    PIPE_FD_TYPE_TIMELINE_SEMAPHORE,
1320 };
1321 
1322 /**
1323  * counter type and counter data type enums used by INTEL_performance_query
1324  * APIs in gallium drivers.
1325  */
1326 enum pipe_perf_counter_type
1327 {
1328    PIPE_PERF_COUNTER_TYPE_EVENT,
1329    PIPE_PERF_COUNTER_TYPE_DURATION_NORM,
1330    PIPE_PERF_COUNTER_TYPE_DURATION_RAW,
1331    PIPE_PERF_COUNTER_TYPE_THROUGHPUT,
1332    PIPE_PERF_COUNTER_TYPE_RAW,
1333    PIPE_PERF_COUNTER_TYPE_TIMESTAMP,
1334 };
1335 
1336 enum pipe_perf_counter_data_type
1337 {
1338    PIPE_PERF_COUNTER_DATA_TYPE_BOOL32,
1339    PIPE_PERF_COUNTER_DATA_TYPE_UINT32,
1340    PIPE_PERF_COUNTER_DATA_TYPE_UINT64,
1341    PIPE_PERF_COUNTER_DATA_TYPE_FLOAT,
1342    PIPE_PERF_COUNTER_DATA_TYPE_DOUBLE,
1343 };
1344 
1345 #define PIPE_ASTC_DECODE_FORMAT_FLOAT16 0
1346 #define PIPE_ASTC_DECODE_FORMAT_UNORM8  1
1347 #define PIPE_ASTC_DECODE_FORMAT_RGB9E5  2
1348 
1349 #define PIPE_UUID_SIZE 16
1350 #define PIPE_LUID_SIZE 8
1351 
1352 #if DETECT_OS_POSIX
1353 #define PIPE_MEMORY_FD
1354 #endif
1355 
1356 #ifdef __cplusplus
1357 }
1358 #endif
1359 
1360 #endif
1361