1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef __SOC_MEDIATEK_MT8192_IOCFG_H__ 4 #define __SOC_MEDIATEK_MT8192_IOCFG_H__ 5 6 #include <soc/addressmap.h> 7 #include <types.h> 8 9 struct mt8192_iocfg_lm_regs { 10 u32 reserved[4]; 11 u32 drv_cfg1; 12 }; 13 check_member(mt8192_iocfg_lm_regs, drv_cfg1, 0x10); 14 15 enum { 16 IO_4_MA = 0x1, 17 }; 18 19 #define mtk_iocfg_lm ((struct mt8192_iocfg_lm_regs *)IOCFG_LM_BASE) 20 21 struct mt8192_iocfg_bm_regs { 22 u32 reserved[8]; 23 u32 drv_cfg2; 24 }; 25 check_member(mt8192_iocfg_bm_regs, drv_cfg2, 0x20); 26 27 #define mtk_iocfg_bm ((struct mt8192_iocfg_bm_regs *)IOCFG_BM_BASE) 28 29 #endif /* __SOC_MEDIATEK_MT8192_IOCFG_H__ */ 30