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1 /*
2  * Copyright (c) 2008-2024 Broadcom. All Rights Reserved.
3  * The term “Broadcom” refers to Broadcom Inc.
4  * and/or its subsidiaries.
5  * SPDX-License-Identifier: MIT
6  */
7 
8 #ifndef SVGA_CONTEXT_H
9 #define SVGA_CONTEXT_H
10 
11 
12 #include "pipe/p_context.h"
13 #include "pipe/p_defines.h"
14 #include "pipe/p_state.h"
15 
16 #include "util/os_time.h"
17 
18 #include "util/u_blitter.h"
19 #include "util/list.h"
20 
21 #include "vm_basic_types.h"
22 #include "svga_screen.h"
23 #include "svga_state.h"
24 #include "svga_winsys.h"
25 #include "svga_hw_reg.h"
26 #include "svga3d_shaderdefs.h"
27 #include "svga_image_view.h"
28 #include "svga_shader_buffer.h"
29 #include "svga_debug.h"
30 
31 /** Non-GPU queries for gallium HUD */
32 enum svga_hud {
33 /* per-frame counters */
34    SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
35    SVGA_QUERY_NUM_FALLBACKS,
36    SVGA_QUERY_NUM_FLUSHES,
37    SVGA_QUERY_NUM_VALIDATIONS,
38    SVGA_QUERY_MAP_BUFFER_TIME,
39    SVGA_QUERY_NUM_BUFFERS_MAPPED,
40    SVGA_QUERY_NUM_TEXTURES_MAPPED,
41    SVGA_QUERY_NUM_BYTES_UPLOADED,
42    SVGA_QUERY_NUM_COMMAND_BUFFERS,
43    SVGA_QUERY_COMMAND_BUFFER_SIZE,
44    SVGA_QUERY_FLUSH_TIME,
45    SVGA_QUERY_SURFACE_WRITE_FLUSHES,
46    SVGA_QUERY_NUM_READBACKS,
47    SVGA_QUERY_NUM_RESOURCE_UPDATES,
48    SVGA_QUERY_NUM_BUFFER_UPLOADS,
49    SVGA_QUERY_NUM_CONST_BUF_UPDATES,
50    SVGA_QUERY_NUM_CONST_UPDATES,
51    SVGA_QUERY_NUM_SHADER_RELOCATIONS,
52    SVGA_QUERY_NUM_SURFACE_RELOCATIONS,
53 
54 /* running total counters */
55    SVGA_QUERY_MEMORY_USED,
56    SVGA_QUERY_NUM_SHADERS,
57    SVGA_QUERY_NUM_RESOURCES,
58    SVGA_QUERY_NUM_STATE_OBJECTS,
59    SVGA_QUERY_NUM_SURFACE_VIEWS,
60    SVGA_QUERY_NUM_GENERATE_MIPMAP,
61    SVGA_QUERY_NUM_FAILED_ALLOCATIONS,
62    SVGA_QUERY_NUM_COMMANDS_PER_DRAW,
63    SVGA_QUERY_SHADER_MEM_USED,
64 
65 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
66    SVGA_QUERY_MAX
67 };
68 
69 
70 /**
71  * Maximum supported number of constant buffers per shader
72  * including the zero slot for the default constant buffer.
73  */
74 #define SVGA_MAX_CONST_BUFS 15
75 #define SVGA_MAX_RAW_BUFS   64
76 
77 /**
78  * Maximum constant buffer size that can be set in the
79  * DXSetSingleConstantBuffer command is
80  * DX10 constant buffer element count * 4 4-bytes components
81  */
82 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
83 
84 #define CONST0_UPLOAD_ALIGNMENT 256
85 #define SVGA_MAX_UAVIEWS        SVGA3D_DX11_1_MAX_UAVIEWS
86 #define SVGA_MAX_IMAGES         SVGA3D_DX11_MAX_UAVIEWS
87 #define SVGA_MAX_SHADER_BUFFERS SVGA3D_DX11_MAX_UAVIEWS
88 #define SVGA_MAX_ATOMIC_BUFFERS SVGA3D_DX11_MAX_UAVIEWS
89 
90 enum svga_surface_state
91 {
92    SVGA_SURFACE_STATE_CREATED,
93    SVGA_SURFACE_STATE_INVALIDATED,
94    SVGA_SURFACE_STATE_UPDATED,
95    SVGA_SURFACE_STATE_RENDERED,
96 };
97 
98 struct draw_vertex_shader;
99 struct draw_fragment_shader;
100 struct svga_shader_variant;
101 struct SVGACmdMemory;
102 struct util_bitmask;
103 
104 
105 struct svga_cache_context;
106 struct svga_tracked_state;
107 
108 struct svga_blend_state {
109    unsigned need_white_fragments:1;
110    unsigned independent_blend_enable:1;
111    unsigned alpha_to_coverage:1;
112    unsigned alpha_to_one:1;
113    unsigned blend_color_alpha:1;  /**< set blend color to alpha value */
114    unsigned logicop_enabled:1;
115    unsigned logicop_mode:5;
116 
117    /** Per-render target state */
118    struct {
119       uint8_t writemask;
120 
121       bool blend_enable;
122       uint8_t srcblend;
123       uint8_t dstblend;
124       uint8_t blendeq;
125 
126       bool separate_alpha_blend_enable;
127       uint8_t srcblend_alpha;
128       uint8_t dstblend_alpha;
129       uint8_t blendeq_alpha;
130    } rt[PIPE_MAX_COLOR_BUFS];
131 
132    SVGA3dBlendStateId id;  /**< vgpu10 */
133 };
134 
135 struct svga_depth_stencil_state {
136    unsigned zfunc:8;
137    unsigned zenable:1;
138    unsigned zwriteenable:1;
139 
140    unsigned alphatestenable:1;
141    unsigned alphafunc:8;
142 
143    struct {
144       unsigned enabled:1;
145       unsigned func:8;
146       unsigned fail:8;
147       unsigned zfail:8;
148       unsigned pass:8;
149    } stencil[2];
150 
151    /* SVGA3D has one ref/mask/writemask triple shared between front &
152     * back face stencil.  We really need two:
153     */
154    unsigned stencil_mask:8;
155    unsigned stencil_writemask:8;
156 
157    float    alpharef;
158 
159    SVGA3dDepthStencilStateId id;  /**< vgpu10 */
160 };
161 
162 #define SVGA_UNFILLED_DISABLE 0
163 #define SVGA_UNFILLED_LINE    1
164 #define SVGA_UNFILLED_POINT   2
165 
166 #define SVGA_PIPELINE_FLAG_POINTS   (1<<MESA_PRIM_POINTS)
167 #define SVGA_PIPELINE_FLAG_LINES    (1<<MESA_PRIM_LINES)
168 #define SVGA_PIPELINE_FLAG_TRIS     (1<<MESA_PRIM_TRIANGLES)
169 
170 #define SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES 4
171 
172 struct svga_rasterizer_state {
173    struct pipe_rasterizer_state templ; /* needed for draw module */
174 
175    unsigned shademode:8;
176    unsigned cullmode:8;
177    unsigned scissortestenable:1;
178    unsigned multisampleantialias:1;
179    unsigned antialiasedlineenable:1;
180    unsigned lastpixel:1;
181    unsigned pointsprite:1;
182 
183    unsigned linepattern;
184 
185    float slopescaledepthbias;
186    float depthbias;
187    float pointsize;
188    float linewidth;
189 
190    unsigned hw_fillmode:2;         /* PIPE_POLYGON_MODE_x */
191 
192    /** Which prims do we need help for?  Bitmask of (1 << MESA_PRIM_x) flags */
193    unsigned need_pipeline:16;
194 
195    SVGA3dRasterizerStateId id;    /**< vgpu10 */
196 
197    /* Alternate SVGA rasterizer state object with forcedSampleCount */
198    int altRastIds[SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES+1];
199 
200    struct svga_rasterizer_state *no_cull_rasterizer;
201 
202    /** For debugging: */
203    const char* need_pipeline_tris_str;
204    const char* need_pipeline_lines_str;
205    const char* need_pipeline_points_str;
206 };
207 
208 struct svga_sampler_state {
209    unsigned mipfilter;
210    unsigned magfilter;
211    unsigned minfilter;
212    unsigned aniso_level;
213    float lod_bias;
214    unsigned addressu;
215    unsigned addressv;
216    unsigned addressw;
217    unsigned bordercolor;
218    unsigned normalized_coords:1;
219    unsigned compare_mode:1;
220    unsigned compare_func:3;
221 
222    unsigned min_lod;
223    unsigned view_min_lod;
224    unsigned view_max_lod;
225 
226    SVGA3dSamplerId id[2];
227 };
228 
229 
230 struct svga_pipe_sampler_view
231 {
232    struct pipe_sampler_view base;
233 
234    SVGA3dShaderResourceViewId id;
235 };
236 
237 
238 static inline struct svga_pipe_sampler_view *
svga_pipe_sampler_view(struct pipe_sampler_view * v)239 svga_pipe_sampler_view(struct pipe_sampler_view *v)
240 {
241    return (struct svga_pipe_sampler_view *) v;
242 }
243 
244 
245 struct svga_velems_state {
246    unsigned count;
247    struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
248    SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
249    uint16_t strides[PIPE_MAX_ATTRIBS];
250 
251    /** Bitmasks indicating which attributes need format conversion */
252    unsigned adjust_attrib_range;     /**< range adjustment */
253    unsigned attrib_is_pure_int;      /**< pure int */
254    unsigned adjust_attrib_w_1;       /**< set w = 1 */
255    unsigned adjust_attrib_itof;      /**< int->float */
256    unsigned adjust_attrib_utof;      /**< uint->float */
257    unsigned attrib_is_bgra;          /**< R / B swizzling */
258    unsigned attrib_puint_to_snorm;   /**< 10_10_10_2 packed uint -> snorm */
259    unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
260    unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
261 
262    bool need_swvfetch;
263 
264    SVGA3dElementLayoutId id; /**< VGPU10 */
265 };
266 
267 struct svga_constant_buffer {
268    struct svga_winsys_surface *handle;
269    unsigned size;
270 };
271 
272 struct svga_raw_buffer {
273    struct svga_winsys_surface *handle;
274    unsigned buffer_offset;
275    unsigned buffer_size;
276    struct pipe_resource *buffer;
277    int32 srvid;
278 };
279 
280 /* Use to calculate differences between state emitted to hardware and
281  * current driver-calculated state.
282  */
283 struct svga_state
284 {
285    const struct svga_blend_state *blend;
286    const struct svga_depth_stencil_state *depth;
287    const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
288    const struct svga_velems_state *velems;
289 
290    struct svga_rasterizer_state *rast;
291    struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
292    struct svga_fragment_shader *fs;
293    struct svga_vertex_shader *vs;
294    struct svga_geometry_shader *user_gs; /* user-specified GS */
295    struct svga_geometry_shader *gs;      /* derived GS */
296    /* derived tessellation control shader */
297    struct svga_tcs_shader *tcs;
298    /* derived tessellation evaluation shader */
299    struct svga_tes_shader *tes;
300    struct svga_compute_shader *cs;
301 
302    struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
303    /** Constant buffers for each shader.
304     * The size should probably always match with that of
305     * svga_shader_emitter_v10.num_shader_consts.
306     */
307    struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
308    struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_RAW_BUFS];
309 
310    struct pipe_framebuffer_state framebuffer;
311    float depthscale;
312 
313    /* Hack to limit the number of different render targets between
314     * flushes.  Helps avoid blowing out our surface cache in EXA.
315     */
316    int nr_fbs;
317 
318    struct pipe_poly_stipple poly_stipple;
319    struct pipe_scissor_state scissor[SVGA3D_DX_MAX_VIEWPORTS];
320    struct pipe_blend_color blend_color;
321    struct pipe_stencil_ref stencil_ref;
322    struct pipe_clip_state clip;
323    struct pipe_viewport_state viewport[SVGA3D_DX_MAX_VIEWPORTS];
324 
325    bool use_samplers[PIPE_SHADER_TYPES];
326    unsigned num_samplers[PIPE_SHADER_TYPES];
327    unsigned num_sampler_views[PIPE_SHADER_TYPES];
328    unsigned num_vertex_buffers;
329    enum mesa_prim reduced_prim;
330 
331    unsigned vertex_id_bias;
332 
333    struct {
334       unsigned flag_1d;
335       unsigned flag_srgb;
336    } tex_flags;
337 
338    unsigned sample_mask;
339    unsigned vertices_per_patch;
340    float default_tesslevels[6]; /* tessellation (outer[4] + inner[2]) levels */
341 
342    /* Image views */
343    unsigned num_image_views[PIPE_SHADER_TYPES];
344    struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
345 
346    /* Shader buffers */
347    unsigned num_shader_buffers[PIPE_SHADER_TYPES];
348    struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
349 
350    /* HW atomic buffers */
351    unsigned num_atomic_buffers;
352    struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
353 
354    struct {
355       /* Determine the layout of the grid (in block units) to be used. */
356       unsigned size[3];
357       /* If DispatchIndirect is used, this will has grid size info*/
358       struct pipe_resource *indirect;
359    } grid_info;
360 
361 };
362 
363 struct svga_prescale {
364    float translate[4];
365    float scale[4];
366    bool enabled;
367 };
368 
369 struct svga_depthrange {
370    float zmin;
371    float zmax;
372 };
373 
374 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
375  */
376 struct svga_hw_clear_state
377 {
378    struct pipe_framebuffer_state framebuffer;
379 
380    /* VGPU9 only */
381    SVGA3dRect viewport;
382    struct svga_depthrange depthrange;
383 
384    /* VGPU10 state */
385    SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS];
386    struct svga_prescale prescale[SVGA3D_DX_MAX_VIEWPORTS];
387    struct pipe_scissor_state scissors[SVGA3D_DX_MAX_VIEWPORTS];
388    unsigned num_prescale;
389 
390    unsigned num_rendertargets;
391    struct pipe_surface *rtv[SVGA3D_DX_MAX_RENDER_TARGETS];
392    struct pipe_surface *dsv;
393 };
394 
395 struct svga_hw_view_state
396 {
397    struct pipe_resource *texture;
398    struct svga_sampler_view *v;
399    unsigned min_lod;
400    unsigned max_lod;
401    bool dirty;
402 };
403 
404 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
405  */
406 struct svga_hw_draw_state
407 {
408    /** VGPU9 rasterization state */
409    unsigned rs[SVGA3D_RS_MAX];
410    /** VGPU9 texture sampler and bindings state */
411    unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
412 
413    /** VGPU9 texture views */
414    unsigned num_views;
415    unsigned num_backed_views; /* views with backing copy of texture */
416    struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
417 
418    /** VGPU9 constant buffer values */
419    float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
420 
421    /** Currently bound shaders */
422    struct svga_shader_variant *fs;
423    struct svga_shader_variant *vs;
424    struct svga_shader_variant *gs;
425    struct svga_shader_variant *tcs;
426    struct svga_shader_variant *tes;
427    struct svga_shader_variant *cs;
428 
429    /** Currently bound constant buffer, per shader stage */
430    struct pipe_resource *constbuf[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
431    struct svga_constant_buffer constbufoffsets[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
432    struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_RAW_BUFS];
433    uint64_t enabled_rawbufs[PIPE_SHADER_TYPES];
434 
435    /** Bitmask of enabled constant buffers */
436    unsigned enabled_constbufs[PIPE_SHADER_TYPES];
437 
438    /**
439     * These are used to reduce the number of times we call u_upload_unmap()
440     * while updating the zero-th/default VGPU10 constant buffer.
441     */
442    struct pipe_resource *const0_buffer;
443    struct svga_winsys_surface *const0_handle;
444 
445    /** VGPU10 HW state (used to prevent emitting redundant state) */
446    SVGA3dDepthStencilStateId depth_stencil_id;
447    unsigned stencil_ref;
448    SVGA3dBlendStateId blend_id;
449    float blend_factor[4];
450    unsigned blend_sample_mask;
451    SVGA3dRasterizerStateId rasterizer_id;
452    SVGA3dElementLayoutId layout_id;
453    SVGA3dPrimitiveType topology;
454 
455    /** Vertex buffer state */
456    SVGA3dVertexBuffer_v2 vbuffer_attrs[PIPE_MAX_ATTRIBS];
457    struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
458    unsigned num_vbuffers;
459 
460    struct pipe_resource *ib;  /**< index buffer for drawing */
461    SVGA3dSurfaceFormat ib_format;
462    unsigned ib_offset;
463 
464    unsigned num_samplers[PIPE_SHADER_TYPES];
465    SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
466 
467    unsigned num_sampler_views[PIPE_SHADER_TYPES];
468    struct pipe_sampler_view
469       *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
470 
471    /* used for rebinding */
472    unsigned default_constbuf_size[PIPE_SHADER_TYPES];
473 
474    bool rasterizer_discard; /* set if rasterization is disabled */
475    bool has_backed_views;   /* set if any of the rtv/dsv is a backed surface view */
476 
477    /* Image Views */
478    int uavSpliceIndex;
479    unsigned num_image_views[PIPE_SHADER_TYPES];
480    struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
481 
482    /* Shader Buffers */
483    unsigned num_shader_buffers[PIPE_SHADER_TYPES];
484    struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
485    uint64_t enabled_raw_shaderbufs[PIPE_SHADER_TYPES];
486 
487    /* HW Atomic Buffers */
488    unsigned num_atomic_buffers;
489    struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
490 
491    /* UAV state */
492    unsigned num_uavs;
493    SVGA3dUAViewId uaViewIds[SVGA_MAX_UAVIEWS];
494    struct svga_winsys_surface *uaViews[SVGA_MAX_UAVIEWS];
495 
496    /* Compute UAV state */
497    unsigned num_cs_uavs;
498    SVGA3dUAViewId csUAViewIds[SVGA_MAX_UAVIEWS];
499    struct svga_winsys_surface *csUAViews[SVGA_MAX_UAVIEWS];
500 
501    /* starting uav index for each shader */
502    unsigned uav_start_index[PIPE_SHADER_TYPES];
503 
504    /* starting uav index for HW atomic buffers */
505    unsigned uav_atomic_buf_index;
506 };
507 
508 
509 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
510  */
511 struct svga_sw_state
512 {
513    /* which parts we need */
514    bool need_swvfetch;
515    bool need_pipeline;
516    bool need_swtnl;
517 
518    /* Flag to make sure that need sw is on while
519     * updating state within a swtnl call.
520     */
521    bool in_swtnl_draw;
522 };
523 
524 
525 /* Queue some state updates (like rss) and submit them to hardware in
526  * a single packet.
527  */
528 struct svga_hw_queue;
529 
530 struct svga_query;
531 struct svga_qmem_alloc_entry;
532 
533 enum svga_uav_type
534 {
535    SVGA_IMAGE_VIEW = 0,
536    SVGA_SHADER_BUFFER
537 };
538 
539 struct svga_uav
540 {
541    enum svga_uav_type type;
542    union {
543       struct svga_image_view image_view;
544       struct svga_shader_buffer shader_buffer;
545    } desc;
546    struct pipe_resource *resource;
547    unsigned next_uaView;
548    SVGA3dUAViewId uaViewId;
549    unsigned timestamp[2];
550 };
551 
552 struct svga_cache_uav
553 {
554    unsigned num_uaViews;
555    unsigned next_uaView;
556    struct svga_uav uaViews[SVGA3D_DX11_1_MAX_UAVIEWS];
557 };
558 
559 struct svga_context
560 {
561    struct pipe_context pipe;
562    struct svga_winsys_context *swc;
563    struct blitter_context *blitter;
564    struct u_upload_mgr *const0_upload;
565    struct u_upload_mgr *tex_upload;
566 
567    struct {
568       bool no_swtnl;
569       bool force_swtnl;
570       bool use_min_mipmap;
571 
572       /* incremented for each shader */
573       unsigned shader_id;
574 
575       bool no_line_width;
576       bool force_hw_line_stipple;
577 
578       /** To report perf/conformance/etc issues to the gallium frontend */
579       struct util_debug_callback callback;
580    } debug;
581 
582    struct {
583       struct draw_context *draw;
584       struct vbuf_render *backend;
585       unsigned hw_prim;
586       bool new_vbuf;
587       bool new_vdecl;
588    } swtnl;
589 
590    /* Bitmask of blend state objects IDs */
591    struct util_bitmask *blend_object_id_bm;
592 
593    /* Bitmask of depth/stencil state objects IDs */
594    struct util_bitmask *ds_object_id_bm;
595 
596    /* Bitmask of input element object IDs */
597    struct util_bitmask *input_element_object_id_bm;
598 
599    /* Bitmask of rasterizer object IDs */
600    struct util_bitmask *rast_object_id_bm;
601 
602    /* Bitmask of sampler state objects IDs */
603    struct util_bitmask *sampler_object_id_bm;
604 
605    /* Bitmask of sampler view IDs */
606    struct util_bitmask *sampler_view_id_bm;
607 
608    /* Bitmask of to-free sampler view IDs created for raw buffer srv */
609    struct util_bitmask *sampler_view_to_free_id_bm;
610 
611    /* Bitmask of used shader IDs */
612    struct util_bitmask *shader_id_bm;
613 
614    /* Bitmask of used surface view IDs */
615    struct util_bitmask *surface_view_id_bm;
616 
617    /* Bitmask of used stream output IDs */
618    struct util_bitmask *stream_output_id_bm;
619 
620    /* Bitmask of used query IDs */
621    struct util_bitmask *query_id_bm;
622 
623    /* Bitmask of used uav IDs */
624    struct util_bitmask *uav_id_bm;
625 
626    /* Bitmask of to-free uav IDs */
627    struct util_bitmask *uav_to_free_id_bm;
628 
629    struct {
630       uint64_t dirty[SVGA_STATE_MAX];
631 
632       /** bitmasks of which const buffers are changed */
633       unsigned dirty_constbufs[PIPE_SHADER_TYPES];
634 
635       /** bitmasks of which const buffers to be bound as srv raw buffers */
636       unsigned raw_constbufs[PIPE_SHADER_TYPES];
637 
638       /** bitmasks of which shader buffers to be bound as srv raw buffers */
639       uint64_t raw_shaderbufs[PIPE_SHADER_TYPES];
640 
641       unsigned texture_timestamp;
642       unsigned uav_timestamp[2];
643 
644       struct svga_sw_state          sw;
645       struct svga_hw_draw_state     hw_draw;
646       struct svga_hw_clear_state    hw_clear;
647    } state;
648 
649    struct svga_state curr;      /* state from the gallium frontend */
650    uint64_t dirty;              /* statechanges since last update_state() */
651 
652    union {
653       struct {
654          unsigned rendertargets:1;
655          unsigned texture_samplers:1;
656          unsigned constbufs:1;
657          unsigned vs:1;
658          unsigned fs:1;
659          unsigned gs:1;
660          unsigned tcs:1;
661          unsigned tes:1;
662          unsigned cs:1;
663          unsigned query:1;
664          unsigned images:1;
665          unsigned shaderbufs:1;
666          unsigned atomicbufs:1;
667          unsigned uav:1;
668          unsigned indexbuf:1;
669          unsigned vertexbufs:1;
670       } flags;
671       unsigned val;
672    } rebind;
673 
674    struct svga_hwtnl *hwtnl;
675 
676    /** Queries states */
677    struct svga_winsys_gb_query *gb_query;     /**< gb query object, one per context */
678    unsigned gb_query_len;                     /**< gb query object size */
679    struct util_bitmask *gb_query_alloc_mask;  /**< gb query object allocation mask */
680    struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
681                                               /**< query mem block mapping */
682    struct svga_query *sq[SVGA_QUERY_MAX+12];  /**< queries currently in progress */
683                                               /* The last 12 entries are for streamout
684                                                * queries for stream 0..3
685                                                */
686 
687    /** List of buffers with queued transfers */
688    struct list_head dirty_buffers;
689 
690    /** performance / info queries for HUD */
691    struct {
692       uint64_t num_draw_calls;          /**< SVGA_QUERY_DRAW_CALLS */
693       uint64_t num_fallbacks;           /**< SVGA_QUERY_NUM_FALLBACKS */
694       uint64_t num_flushes;             /**< SVGA_QUERY_NUM_FLUSHES */
695       uint64_t num_validations;         /**< SVGA_QUERY_NUM_VALIDATIONS */
696       uint64_t map_buffer_time;         /**< SVGA_QUERY_MAP_BUFFER_TIME */
697       uint64_t num_buffers_mapped;      /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */
698       uint64_t num_textures_mapped;     /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */
699       uint64_t num_command_buffers;     /**< SVGA_QUERY_NUM_COMMAND_BUFFERS */
700       uint64_t command_buffer_size;     /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
701       uint64_t flush_time;              /**< SVGA_QUERY_FLUSH_TIME */
702       uint64_t surface_write_flushes;   /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
703       uint64_t num_readbacks;           /**< SVGA_QUERY_NUM_READBACKS */
704       uint64_t num_resource_updates;    /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
705       uint64_t num_buffer_uploads;      /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
706       uint64_t num_const_buf_updates;   /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
707       uint64_t num_const_updates;       /**< SVGA_QUERY_NUM_CONST_UPDATES */
708       uint64_t num_shaders;             /**< SVGA_QUERY_NUM_SHADERS */
709 
710       /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
711       uint64_t num_blend_objects;
712       uint64_t num_depthstencil_objects;
713       uint64_t num_rasterizer_objects;
714       uint64_t num_sampler_objects;
715       uint64_t num_samplerview_objects;
716       uint64_t num_vertexelement_objects;
717 
718       uint64_t num_surface_views;       /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
719       uint64_t num_bytes_uploaded;      /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
720       uint64_t num_generate_mipmap;     /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
721       uint64_t shader_mem_used;         /**< SVGA_QUERY_SHADER_MEM_USED */
722 
723       bool uses_time;                /**< os_time_get() calls needed? */
724    } hud;
725 
726    /** The currently bound stream output targets */
727    bool in_streamout;                /* Set if streamout is active */
728    unsigned num_so_targets;
729    struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
730    struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
731    struct svga_stream_output *current_so;
732 
733    /**
734     * The following states are used in the workaround for auto draw with
735     * stream instancing.
736     */
737 
738    /* Last bound SO targets that can be used to get vertex count */
739    struct pipe_stream_output_target *vcount_so_targets[SVGA3D_DX_MAX_SOTARGETS];
740    unsigned vcount_buffer_stream;       /* SO buffer to stream index mask */
741    struct pipe_query *so_queries[4];    /* SO stat queries for each stream */
742 
743    /** A blend state with blending disabled, for falling back to when blending
744     * is illegal (e.g. an integer texture is bound)
745     */
746    struct svga_blend_state *noop_blend;
747 
748    struct {
749       struct pipe_resource *texture;
750       struct svga_pipe_sampler_view *sampler_view;
751       void *sampler;
752    } polygon_stipple;
753 
754    /** Depth stencil state created to disable depth stencil test */
755    struct svga_depth_stencil_state *depthstencil_disable;
756 
757    /** Current conditional rendering predicate */
758    struct {
759       SVGA3dQueryId query_id;
760       bool cond;
761    } pred;
762 
763    bool render_condition;
764    bool disable_rasterizer; /* Set if to disable rasterization */
765    uint8_t patch_vertices;
766 
767    struct {
768       struct svga_tcs_shader *passthrough_tcs;
769       struct svga_vertex_shader *vs;
770       struct svga_tes_shader *tes;
771       unsigned vertices_per_patch;
772       bool passthrough;
773    } tcs;
774 
775    struct svga_cache_uav cache_uav;
776    struct pipe_resource *dummy_resource;
777 };
778 
779 /* A flag for each frontend state object:
780  */
781 #define SVGA_NEW_BLEND               ((uint64_t) 0x1)
782 #define SVGA_NEW_DEPTH_STENCIL_ALPHA ((uint64_t) 0x2)
783 #define SVGA_NEW_RAST                ((uint64_t) 0x4)
784 #define SVGA_NEW_SAMPLER             ((uint64_t) 0x8)
785 #define SVGA_NEW_TEXTURE             ((uint64_t) 0x10)
786 #define SVGA_NEW_VBUFFER             ((uint64_t) 0x20)
787 #define SVGA_NEW_VELEMENT            ((uint64_t) 0x40)
788 #define SVGA_NEW_FS                  ((uint64_t) 0x80)
789 #define SVGA_NEW_VS                  ((uint64_t) 0x100)
790 #define SVGA_NEW_FS_CONST_BUFFER     ((uint64_t) 0x200)
791 #define SVGA_NEW_VS_CONST_BUFFER     ((uint64_t) 0x400)
792 #define SVGA_NEW_FRAME_BUFFER        ((uint64_t) 0x800)
793 #define SVGA_NEW_STIPPLE             ((uint64_t) 0x1000)
794 #define SVGA_NEW_SCISSOR             ((uint64_t) 0x2000)
795 #define SVGA_NEW_BLEND_COLOR         ((uint64_t) 0x4000)
796 #define SVGA_NEW_CLIP                ((uint64_t) 0x8000)
797 #define SVGA_NEW_VIEWPORT            ((uint64_t) 0x10000)
798 #define SVGA_NEW_PRESCALE            ((uint64_t) 0x20000)
799 #define SVGA_NEW_REDUCED_PRIMITIVE   ((uint64_t) 0x40000)
800 #define SVGA_NEW_TEXTURE_BINDING     ((uint64_t) 0x80000)
801 #define SVGA_NEW_NEED_PIPELINE       ((uint64_t) 0x100000)
802 #define SVGA_NEW_NEED_SWVFETCH       ((uint64_t) 0x200000)
803 #define SVGA_NEW_NEED_SWTNL          ((uint64_t) 0x400000)
804 #define SVGA_NEW_FS_VARIANT          ((uint64_t) 0x800000)
805 #define SVGA_NEW_VS_VARIANT          ((uint64_t) 0x1000000)
806 #define SVGA_NEW_TEXTURE_FLAGS       ((uint64_t) 0x4000000)
807 #define SVGA_NEW_STENCIL_REF         ((uint64_t) 0x8000000)
808 #define SVGA_NEW_GS                  ((uint64_t) 0x10000000)
809 #define SVGA_NEW_GS_CONST_BUFFER     ((uint64_t) 0x20000000)
810 #define SVGA_NEW_GS_VARIANT          ((uint64_t) 0x40000000)
811 #define SVGA_NEW_TEXTURE_CONSTS      ((uint64_t) 0x80000000)
812 #define SVGA_NEW_TCS                 ((uint64_t) 0x100000000)
813 #define SVGA_NEW_TES                 ((uint64_t) 0x200000000)
814 #define SVGA_NEW_TCS_VARIANT         ((uint64_t) 0x400000000)
815 #define SVGA_NEW_TES_VARIANT         ((uint64_t) 0x800000000)
816 #define SVGA_NEW_TCS_CONST_BUFFER    ((uint64_t) 0x1000000000)
817 #define SVGA_NEW_TES_CONST_BUFFER    ((uint64_t) 0x2000000000)
818 #define SVGA_NEW_TCS_PARAM           ((uint64_t) 0x4000000000)
819 #define SVGA_NEW_IMAGE_VIEW          ((uint64_t) 0x8000000000)
820 #define SVGA_NEW_SHADER_BUFFER       ((uint64_t) 0x10000000000)
821 #define SVGA_NEW_CS                  ((uint64_t) 0x20000000000)
822 #define SVGA_NEW_CS_VARIANT          ((uint64_t) 0x40000000000)
823 #define SVGA_NEW_CS_CONST_BUFFER     ((uint64_t) 0x80000000000)
824 #define SVGA_NEW_FS_CONSTS           ((uint64_t) 0x100000000000)
825 #define SVGA_NEW_VS_CONSTS           ((uint64_t) 0x200000000000)
826 #define SVGA_NEW_GS_CONSTS           ((uint64_t) 0x400000000000)
827 #define SVGA_NEW_TCS_CONSTS          ((uint64_t) 0x800000000000)
828 #define SVGA_NEW_TES_CONSTS          ((uint64_t) 0x1000000000000)
829 #define SVGA_NEW_CS_CONSTS           ((uint64_t) 0x2000000000000)
830 #define SVGA_NEW_FS_RAW_BUFFER       ((uint64_t) 0x4000000000000)
831 #define SVGA_NEW_VS_RAW_BUFFER       ((uint64_t) 0x8000000000000)
832 #define SVGA_NEW_GS_RAW_BUFFER       ((uint64_t) 0x10000000000000)
833 #define SVGA_NEW_TCS_RAW_BUFFER      ((uint64_t) 0x20000000000000)
834 #define SVGA_NEW_TES_RAW_BUFFER      ((uint64_t) 0x40000000000000)
835 #define SVGA_NEW_CS_RAW_BUFFER       ((uint64_t) 0x80000000000000)
836 #define SVGA_NEW_ALL                 ((uint64_t) 0xFFFFFFFFFFFFFFFF)
837 
838 #define SVGA_NEW_CONST_BUFFER \
839    (SVGA_NEW_FS_CONST_BUFFER | SVGA_NEW_VS_CONST_BUFFER | \
840     SVGA_NEW_GS_CONST_BUFFER | SVGA_NEW_CS_CONST_BUFFER | \
841     SVGA_NEW_TCS_CONST_BUFFER | SVGA_NEW_TES_CONST_BUFFER)
842 
843 
844 /** Program pipelines */
845 enum svga_pipe_type
846 {
847    SVGA_PIPE_GRAPHICS = 0,
848    SVGA_PIPE_COMPUTE  = 1
849 };
850 
851 void svga_init_state_functions( struct svga_context *svga );
852 void svga_init_flush_functions( struct svga_context *svga );
853 void svga_init_string_functions( struct svga_context *svga );
854 void svga_init_blit_functions(struct svga_context *svga);
855 
856 void svga_init_blend_functions( struct svga_context *svga );
857 void svga_init_depth_stencil_functions( struct svga_context *svga );
858 void svga_init_misc_functions( struct svga_context *svga );
859 void svga_init_rasterizer_functions( struct svga_context *svga );
860 void svga_init_sampler_functions( struct svga_context *svga );
861 void svga_init_cs_functions( struct svga_context *svga );
862 void svga_init_fs_functions( struct svga_context *svga );
863 void svga_init_vs_functions( struct svga_context *svga );
864 void svga_init_gs_functions( struct svga_context *svga );
865 void svga_init_ts_functions( struct svga_context *svga );
866 void svga_init_vertex_functions( struct svga_context *svga );
867 void svga_init_constbuffer_functions( struct svga_context *svga );
868 void svga_init_draw_functions( struct svga_context *svga );
869 void svga_init_query_functions( struct svga_context *svga );
870 void svga_init_surface_functions(struct svga_context *svga);
871 void svga_init_stream_output_functions( struct svga_context *svga );
872 void svga_init_clear_functions( struct svga_context *svga );
873 void svga_init_shader_image_functions( struct svga_context *svga );
874 
875 void svga_cleanup_vertex_state( struct svga_context *svga );
876 void svga_cleanup_sampler_state( struct svga_context *svga );
877 void svga_cleanup_tss_binding( struct svga_context *svga );
878 void svga_cleanup_framebuffer( struct svga_context *svga );
879 void svga_cleanup_tcs_state( struct svga_context *svga );
880 
881 void svga_context_flush( struct svga_context *svga,
882                          struct pipe_fence_handle **pfence );
883 
884 void svga_context_finish(struct svga_context *svga);
885 
886 void svga_hwtnl_flush_retry( struct svga_context *svga );
887 void svga_hwtnl_flush_buffer( struct svga_context *svga,
888                               struct pipe_resource *buffer );
889 bool svga_hwtnl_has_pending_prim(struct svga_hwtnl *);
890 
891 void svga_surfaces_flush(struct svga_context *svga);
892 
893 struct pipe_context *
894 svga_context_create(struct pipe_screen *screen,
895                     void *priv, unsigned flags);
896 
897 void svga_toggle_render_condition(struct svga_context *svga,
898                                   bool render_condition_enabled,
899                                   bool on);
900 
901 int svga_define_rasterizer_object(struct svga_context *svga,
902                                   struct svga_rasterizer_state *,
903                                   unsigned samples);
904 
905 enum pipe_error
906 svga_validate_sampler_resources(struct svga_context *svga,
907                                 enum svga_pipe_type);
908 
909 enum pipe_error
910 svga_validate_constant_buffers(struct svga_context *svga,
911                                enum svga_pipe_type);
912 
913 enum pipe_error
914 svga_validate_image_views(struct svga_context *svga,
915                           enum svga_pipe_type);
916 
917 enum pipe_error
918 svga_validate_shader_buffers(struct svga_context *svga,
919                              enum svga_pipe_type);
920 
921 void
922 svga_destroy_rawbuf_srv(struct svga_context *svga);
923 
924 void
925 svga_uav_cache_init(struct svga_context *svga);
926 
927 void
928 svga_destroy_rawbuf_srv(struct svga_context *svga);
929 
930 
931 /***********************************************************************
932  * Inline conversion functions.  These are better-typed than the
933  * macros used previously:
934  */
935 static inline struct svga_context *
svga_context(struct pipe_context * pipe)936 svga_context( struct pipe_context *pipe )
937 {
938    return (struct svga_context *)pipe;
939 }
940 
941 static inline struct svga_winsys_screen *
svga_sws(struct svga_context * svga)942 svga_sws(struct svga_context *svga)
943 {
944    return svga_screen(svga->pipe.screen)->sws;
945 }
946 
947 static inline bool
svga_have_gb_objects(const struct svga_context * svga)948 svga_have_gb_objects(const struct svga_context *svga)
949 {
950    return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
951 }
952 
953 static inline bool
svga_have_gb_dma(const struct svga_context * svga)954 svga_have_gb_dma(const struct svga_context *svga)
955 {
956    return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
957 }
958 
959 static inline bool
svga_have_vgpu10(const struct svga_context * svga)960 svga_have_vgpu10(const struct svga_context *svga)
961 {
962    return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
963 }
964 
965 static inline bool
svga_have_sm4_1(const struct svga_context * svga)966 svga_have_sm4_1(const struct svga_context *svga)
967 {
968    return svga_screen(svga->pipe.screen)->sws->have_sm4_1;
969 }
970 
971 static inline bool
svga_have_sm5(const struct svga_context * svga)972 svga_have_sm5(const struct svga_context *svga)
973 {
974    return svga_screen(svga->pipe.screen)->sws->have_sm5;
975 }
976 
977 static inline bool
svga_have_gl43(const struct svga_context * svga)978 svga_have_gl43(const struct svga_context *svga)
979 {
980    return svga_screen(svga->pipe.screen)->sws->have_gl43;
981 }
982 
983 static inline bool
svga_need_to_rebind_resources(const struct svga_context * svga)984 svga_need_to_rebind_resources(const struct svga_context *svga)
985 {
986    return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
987 }
988 
989 static inline bool
svga_rects_equal(const SVGA3dRect * r1,const SVGA3dRect * r2)990 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
991 {
992    return memcmp(r1, r2, sizeof(*r1)) == 0;
993 }
994 
995 
996 /* A helper function to return TRUE if sampler state mapping is
997  * to be used. Sampler state mapping is used in GL43 context
998  * if the number of sampler states exceeds the SVGA device limit or
999  * the sampler state mapping environment variable is set.
1000  */
1001 static inline bool
svga_use_sampler_state_mapping(const struct svga_context * svga,unsigned num_sampler_states)1002 svga_use_sampler_state_mapping(const struct svga_context *svga,
1003                                unsigned num_sampler_states)
1004 {
1005    return svga_have_gl43(svga) &&
1006           (svga_screen(svga->pipe.screen)->debug.sampler_state_mapping ||
1007            num_sampler_states > SVGA3D_DX_MAX_SAMPLERS);
1008 }
1009 
1010 
1011 static inline void
svga_set_curr_shader_use_samplers_flag(struct svga_context * svga,enum pipe_shader_type shader_type,bool use_samplers)1012 svga_set_curr_shader_use_samplers_flag(struct svga_context *svga,
1013                                        enum pipe_shader_type shader_type,
1014                                        bool use_samplers)
1015 {
1016    svga->curr.use_samplers[shader_type] = use_samplers;
1017 }
1018 
1019 
1020 static inline bool
svga_curr_shader_use_samplers(const struct svga_context * svga,enum pipe_shader_type shader_type)1021 svga_curr_shader_use_samplers(const struct svga_context *svga,
1022 	                      enum pipe_shader_type shader_type)
1023 {
1024    return svga->curr.use_samplers[shader_type];
1025 }
1026 
1027 
1028 /**
1029  * If the Gallium HUD is enabled, this will return the current time.
1030  * Otherwise, just return zero.
1031  */
1032 static inline int64_t
svga_get_time(struct svga_context * svga)1033 svga_get_time(struct svga_context *svga)
1034 {
1035    return svga->hud.uses_time ? os_time_get() : 0;
1036 }
1037 
1038 /*
1039  * The SVGA_TRY_XX family of macros can be used to optionally replace a
1040  * function call with an error value, the purpose is to trigger and test
1041  * retry path handling.
1042  */
1043 #if MESA_DEBUG
1044 
1045 /*
1046  * Optionally replace a function call with a PIPE_ERROR_OUT_OF_MEMORY
1047  * return value
1048  */
1049 #define SVGA_TRY(_func) \
1050    ((SVGA_DEBUG & DEBUG_RETRY) ? PIPE_ERROR_OUT_OF_MEMORY : (_func))
1051 
1052 /* Optionally replace a function call with a NULL return value */
1053 #define SVGA_TRY_PTR(_func) \
1054    ((SVGA_DEBUG & DEBUG_RETRY) ? NULL : (_func))
1055 
1056 /*
1057  * Optionally replace a function call with a NULL return value, and set
1058  * the _retry parameter to TRUE.
1059  */
1060 #define SVGA_TRY_MAP(_func, _retry) \
1061    ((SVGA_DEBUG & DEBUG_RETRY) ? (_retry) = true, NULL : (_func))
1062 #else
1063 
1064 #define SVGA_TRY(_func) (_func)
1065 
1066 #define SVGA_TRY_PTR(_func) (_func)
1067 
1068 #define SVGA_TRY_MAP(_func, _retry) (_func)
1069 #endif
1070 
1071 /**
1072  * Enter retry processing after hitting out-of-command space
1073  */
1074 static inline void
svga_retry_enter(struct svga_context * svga)1075 svga_retry_enter(struct svga_context *svga)
1076 {
1077    /* We shouldn't nest retries, but currently we do. */
1078    if ((SVGA_DEBUG & DEBUG_RETRY) && svga->swc->in_retry) {
1079       debug_printf("WARNING: Recursive retry. Level: %u.\n",
1080                    svga->swc->in_retry);
1081    }
1082    svga->swc->in_retry++;
1083 }
1084 
1085 /**
1086  * Exit retry processing after hitting out-of-command space
1087  */
1088 static inline void
svga_retry_exit(struct svga_context * svga)1089 svga_retry_exit(struct svga_context *svga)
1090 {
1091    assert(svga->swc->in_retry > 0);
1092    svga->swc->in_retry--;
1093 }
1094 
1095 /**
1096  * Perform a function call, and on failure flush the context and retry,
1097  * asserting that the retry succeeded. On return, the boolean argument
1098  * _retried indicates whether the function call was retried or not.
1099  */
1100 #define SVGA_RETRY_CHECK(_svga, _func, _retried)       \
1101    do {                                                \
1102       enum pipe_error ret;                             \
1103                                                        \
1104       ret = SVGA_TRY(_func);                           \
1105       (_retried) = (ret != PIPE_OK);                   \
1106       if (_retried) {                                  \
1107          svga_retry_enter(_svga);                      \
1108          svga_context_flush(_svga, NULL);              \
1109          ret = (_func);                                \
1110          assert(ret == PIPE_OK);                       \
1111          svga_retry_exit(_svga);                       \
1112       }                                                \
1113    } while(0)
1114 
1115 /**
1116  * Perform a function call, and on failure flush the context and retry,
1117  * asserting that the retry succeeded.
1118  */
1119 #define SVGA_RETRY(_svga, _func)                \
1120    do {                                         \
1121       UNUSED bool retried;                      \
1122                                                 \
1123       SVGA_RETRY_CHECK(_svga, _func, retried);  \
1124    } while(0)
1125 
1126 /**
1127  * Perform a function call, and on out-of-memory, flush the context and
1128  * retry. The retry return value is stored in _ret for reuse.
1129  */
1130 #define SVGA_RETRY_OOM(_svga, _ret, _func)              \
1131    do {                                                 \
1132       (_ret) = SVGA_TRY(_func);                         \
1133       if ((_ret) == PIPE_ERROR_OUT_OF_MEMORY) {         \
1134          svga_retry_enter(_svga);                       \
1135          svga_context_flush(_svga, NULL);               \
1136          (_ret) = (_func);                              \
1137          svga_retry_exit(_svga);                        \
1138       }                                                 \
1139    } while (0);
1140 
1141 #endif
1142