| /external/wpa_supplicant_8/src/crypto/ |
| D | milenage.c | 36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f1()
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f2345()
173 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, in milenage_generate()
208 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, in milenage_auts()
235 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) in gsm_milenage()
270 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, in milenage_check()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_isa.c | 546 int opc; in r600_isa_init() local
559 int opc = op->opcode[isa->hw_class]; in r600_isa_init() local
567 int opc = op->opcode[isa->hw_class]; in r600_isa_init() local
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| /external/mesa3d/src/freedreno/ir3/ |
| D | instr-a3xx.h | 38 #define _OPC(cat, opc) (((cat) << NOPC_BITS) | opc) argument
402 #define opc_cat(opc) ((int)((opc) >> NOPC_BITS)) argument
403 #define opc_op(opc) ((unsigned)((opc) & ((1 << NOPC_BITS) - 1))) argument
593 is_sat_compatible(opc_t opc) in is_sat_compatible()
617 is_mad(opc_t opc) in is_mad()
633 is_madsh(opc_t opc) in is_madsh()
645 is_sad(opc_t opc) in is_sad()
657 is_local_atomic(opc_t opc) in is_local_atomic()
678 is_global_a3xx_atomic(opc_t opc) in is_global_a3xx_atomic()
699 is_global_a6xx_atomic(opc_t opc) in is_global_a6xx_atomic()
[all …]
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| D | disasm-a3xx.c | 134 #define OPC(cat, opc, name) [(opc)] = {#name} argument
405 disasm_a3xx_instr_name(opc_t opc) in disasm_a3xx_instr_name()
543 unsigned opc = (val >> 57) & 0x3; in disasm_instr_cb() local
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| D | ir3.c | 614 instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in instr_create()
671 ir3_instr_create_at(struct ir3_cursor cursor, opc_t opc, int ndst, int nsrc) in ir3_instr_create_at()
682 ir3_build_instr(struct ir3_builder *builder, opc_t opc, int ndst, int nsrc) in ir3_build_instr()
704 ir3_instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in ir3_instr_create()
710 ir3_instr_create_at_end(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in ir3_instr_create_at_end()
1538 ir3_supports_rpt(struct ir3_compiler *compiler, unsigned opc) in ir3_supports_rpt()
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| D | ir3_lower_subgroups.c | 79 binop(struct ir3_block *block, opc_t opc, struct ir3_register *dst, in binop()
97 triop(struct ir3_block *block, opc_t opc, struct ir3_register *dst, in triop()
118 do_reduce(struct ir3_block *block, reduce_op_t opc, in do_reduce()
215 struct ir3_block *fallthrough, unsigned opc, unsigned flags, in link_blocks_branch()
240 struct ir3_block *after_block, unsigned opc, unsigned flags, in create_if()
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| D | ir3_cf.c | 77 opc_t opc = conv_src->opc; in all_uses_safe_conv() local
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| D | ir3.h | 367 opc_t opc; member
1287 cat3_half_opc(opc_t opc) in cat3_half_opc()
1306 cat3_full_opc(opc_t opc) in cat3_full_opc()
1325 cat4_half_opc(opc_t opc) in cat4_half_opc()
1340 cat4_full_opc(opc_t opc) in cat4_full_opc()
1599 ir3_cat2_int(opc_t opc) in ir3_cat2_int()
1642 ir3_cat2_absneg(opc_t opc) in ir3_cat2_absneg()
1703 ir3_cat3_absneg(opc_t opc, unsigned src_n) in ir3_cat3_absneg()
1863 ir3_try_swap_signedness(opc_t opc, bool *can_swap) in ir3_try_swap_signedness()
2557 #define __INSTR0(flag, name, opc) \ argument
[all …]
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| D | ir3_rpt.c | 86 supports_imm_r(unsigned opc) in supports_imm_r()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 43 #define OPCODE_GAP(opc) { .opcode = opc }, argument
77 #define OPCODE_GAP(opc) "UNK" #opc, argument
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| /external/mesa3d/src/panfrost/compiler/valhall/ |
| D | disasm.py | 286 opc = ins.opcode variable
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| /external/mesa3d/src/freedreno/afuc/ |
| D | isa.h | 15 static inline struct afuc_instr *__instruction_create(afuc_opc opc) in __instruction_create()
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| D | parser.y | 56 new_instr(afuc_opc opc) in new_instr()
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| D | asm.c | 81 next_instr(afuc_opc opc) in next_instr()
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| D | emu.c | 39 emu_alu(struct emu *emu, afuc_opc opc, uint32_t src1, uint32_t src2) in emu_alu()
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| /external/mesa3d/src/freedreno/ir2/ |
| D | disasm-a2xx.c | 126 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} argument
442 #define INSTR(opc, name, fxn) [opc] = {name, fxn} argument
561 #define INSTR(opc, fxn) [opc] = {#opc, fxn} argument
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| D | instr-a2xx.h | 203 instr_cf_opc_t opc : 4; member
212 instr_cf_opc_t opc : 4; member
225 instr_cf_opc_t opc : 4; member
234 instr_cf_opc_t opc : 4; member
244 instr_cf_opc_t opc : 4; member
301 instr_fetch_opc_t opc : 5; member
335 instr_fetch_opc_t opc : 5; member
368 instr_fetch_opc_t opc : 5; member
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| /external/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_emit_nvc0.cpp | 394 CodeEmitterNVC0::emitForm_A(const Instruction *i, uint64_t opc) in emitForm_A()
439 CodeEmitterNVC0::emitForm_B(const Instruction *i, uint64_t opc) in emitForm_B()
468 CodeEmitterNVC0::emitForm_S(const Instruction *i, uint32_t opc, bool pred) in emitForm_S()
1874 uint32_t opc; in emitSTORE() local
1921 uint32_t opc; in emitLOAD() local
2057 uint64_t opc; in emitMOV() local
2265 uint64_t opc; in emitSUCalc() local
2520 uint64_t opc = 0x4; in emitVSHL() local
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| /external/autotest/client/cros/cellular/ |
| D | prologix_scpi_driver_test_noautorun.py | 185 def _get_idns_and_verify(self, instruments, opc=False): argument
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| /external/pcre/src/sljit/ |
| D | sljitNativeLOONGARCH_64.c | 97 #define OPC_I26(opc) ((sljit_ins)(opc) << 26) argument
98 #define OPC_1RI21(opc) ((sljit_ins)(opc) << 26) argument
99 #define OPC_2RI16(opc) ((sljit_ins)(opc) << 26) argument
100 #define OPC_2RI14(opc) ((sljit_ins)(opc) << 24) argument
101 #define OPC_2RI12(opc) ((sljit_ins)(opc) << 22) argument
102 #define OPC_2RI8(opc) ((sljit_ins)(opc) << 18) argument
103 #define OPC_4R(opc) ((sljit_ins)(opc) << 20) argument
104 #define OPC_3R(opc) ((sljit_ins)(opc) << 15) argument
105 #define OPC_2R(opc) ((sljit_ins)(opc) << 10) argument
106 #define OPC_1RI20(opc) ((sljit_ins)(opc) << 25) argument
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 704 int opc = MI.getOpcode(); in isIndirectControlFlowNotComingBack() local
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackend.cpp | 431 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 in adjustFixupValue() local
446 unsigned opc = 0; in adjustFixupValue() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | ConstantsContext.h | 271 CompareConstantExpr(Type *ty, Instruction::OtherOps opc, in CompareConstantExpr()
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| /external/sg3_utils/include/ |
| D | freebsd_nvme_ioctl.h | 50 uint16_t opc : 8; /* opcode */ member
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| /external/llvm/lib/IR/ |
| D | ConstantsContext.h | 265 CompareConstantExpr(Type *ty, Instruction::OtherOps opc, in CompareConstantExpr()
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