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Searched defs:operand (Results 1 – 7 of 7) sorted by relevance

/art/disassembler/
Ddisassembler_arm.cc101 DisassemblerStream& operator<<(const MemOperand& operand) override { in operator <<()
115 DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) override { in operator <<()
/art/compiler/utils/arm/
Dassembler_arm_vixl.h152 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { in Add()
/art/compiler/utils/x86_64/
Dassembler_x86_64.cc3644 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { in shll()
3649 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { in shlq()
3664 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { in shrl()
3669 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { in shrq()
3679 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { in sarl()
3689 void X86_64Assembler::sarq(CpuRegister operand, CpuRegister shifter) { in sarq()
3699 void X86_64Assembler::roll(CpuRegister operand, CpuRegister shifter) { in roll()
3709 void X86_64Assembler::rorl(CpuRegister operand, CpuRegister shifter) { in rorl()
3719 void X86_64Assembler::rolq(CpuRegister operand, CpuRegister shifter) { in rolq()
3729 void X86_64Assembler::rorq(CpuRegister operand, CpuRegister shifter) { in rorq()
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/art/compiler/utils/x86/
Dassembler_x86.cc3416 void X86Assembler::shll(Register operand, Register shifter) { in shll()
3436 void X86Assembler::shrl(Register operand, Register shifter) { in shrl()
3456 void X86Assembler::sarl(Register operand, Register shifter) { in sarl()
3512 void X86Assembler::roll(Register operand, Register shifter) { in roll()
3522 void X86Assembler::rorl(Register operand, Register shifter) { in rorl()
3908 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) { in EmitOperand()
3938 const Operand& operand, in EmitComplex()
3995 const Operand& operand, in EmitGenericShift()
4011 const Operand& operand, in EmitGenericShift()
4118 X86ManagedRegister operand, in EmitVexPrefixByteOne()
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/art/compiler/optimizing/
Dloop_optimization.cc94 /*out*/ HInstruction** operand) { in IsSignExtensionAndGet()
159 /*out*/ HInstruction** operand) { in IsZeroExtensionAndGet()
Dinstruction_simplifier.cc1956 static HInstruction* CheckSignedToUnsignedCompareConversion(HInstruction* operand, in CheckSignedToUnsignedCompareConversion()
Dcode_generator_arm_vixl.cc1776 Operand operand(0); in GenerateConditionIntegralOrNonPrimitive() local