| /external/XNNPACK/test/ |
| D | unpooling-operator-tester.h | 32 inline UnpoolingOperatorTester& padding(uint32_t padding_height, uint32_t padding_width) { in padding()
46 inline UnpoolingOperatorTester& padding_width(uint32_t padding_width) { in padding_width() argument
177 const size_t padding_width = padding_left() + padding_right(); in output_width() local
253 const size_t padding_width = padding_left() + padding_right(); in next_output_width() local
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| D | argmax-pooling-operator-tester.h | 47 inline ArgmaxPoolingOperatorTester& padding(uint32_t padding_height, uint32_t padding_width) { in padding()
63 inline ArgmaxPoolingOperatorTester& padding_width(uint32_t padding_width) { in padding_width() function
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| D | conv-hwc-microkernel-tester.h | 56 inline ConvHWCMicrokernelTester& padding_width(uint32_t padding_width) { in padding_width() function
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| D | conv-hwc2chw-microkernel-tester.h | 58 inline ConvHWC2CHWMicrokernelTester& padding_width(uint32_t padding_width) { in padding_width() argument
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| D | average-pooling-operator-tester.h | 53 inline AveragePoolingOperatorTester& padding(uint32_t padding_height, uint32_t padding_width) { in padding()
69 inline AveragePoolingOperatorTester& padding_width(uint32_t padding_width) { in padding_width() function
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| D | max-pooling-operator-tester.h | 52 inline MaxPoolingOperatorTester& padding(uint32_t padding_height, uint32_t padding_width) { in padding()
68 inline MaxPoolingOperatorTester& padding_width(uint32_t padding_width) { in padding_width() function
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| D | deconvolution-operator-tester.h | 61 inline DeconvolutionOperatorTester& padding_width(uint32_t padding_width) { in padding_width() argument
67 inline uint32_t padding_width() const { in padding_width() function
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| D | convolution-operator-tester.h | 61 inline ConvolutionOperatorTester& padding(uint32_t padding_height, uint32_t padding_width) { in padding()
77 inline ConvolutionOperatorTester& padding_width(uint32_t padding_width) { in padding_width() argument
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| /external/XNNPACK/bench/ |
| D | deconvolution.cc | 36 const size_t padding_width = state.range(6); in xnnpack_deconvolution_qu8() local
157 const size_t padding_width = state.range(6); in xnnpack_deconvolution_f32() local
275 const size_t padding_width = state.range(6); in tflite_deconvolution_f32() local
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| D | convolution.cc | 41 const size_t padding_width = state.range(6); in xnnpack_convolution_qu8() local
161 const size_t padding_width = state.range(6); in xnnpack_convolution_qs8() local
284 const size_t padding_width = state.range(6); in xnnpack_convolution_f16() local
400 const size_t padding_width = state.range(6); in xnnpack_convolution_f32() local
515 const size_t padding_width = state.range(6); in tflite_convolution_f32() local
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| D | f32-im2col-gemm.cc | 44 const size_t padding_width = state.range(5); in Im2ColGEMMBenchmark() local
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| D | f16-dwconv.cc | 50 const size_t padding_width = state.range(5); in f16_dwconv() local
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| D | f16-igemm.cc | 47 const size_t padding_width = state.range(5); in f16_igemm() local
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| D | f16-dwconv2d-chw.cc | 43 const size_t padding_width = state.range(5); in f16_dwconv2d_chw() local
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| D | f32-dwconv.cc | 43 const size_t padding_width = state.range(5); in f32_dwconv() local
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| /external/pytorch/aten/src/ATen/native/ |
| D | NaiveConvolutionTranspose3d.cpp | 40 int padding_width, in slow_conv_transpose3d_shape_check()
220 int64_t padding_width = padding[2]; in slow_conv_transpose3d_out_cpu_template() local
434 int64_t padding_width = padding[2]; in slow_conv_transpose3d_backward_out_cpu_template() local
639 int64_t padding_width = padding[2]; in slow_conv_transpose3d_acc_grad_parameters_cpu() local
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| /external/tensorflow/tensorflow/lite/delegates/gpu/common/ |
| D | operations.cc | 456 int32_t padding_width = CalculateSamePadding<Axis::WIDTH>(input, attr); in MakeSamePadding() local
467 int32_t padding_width = CalculateSamePadding<Axis::WIDTH>(input, attr); in MakeSamePadding() local
482 int32_t padding_width = CalculateSamePadding<Axis::WIDTH>(input, attr); in MakeSamePadding() local
494 int32_t padding_width = CalculateSamePadding<Axis::WIDTH>(input, attr); in MakeSamePadding() local
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| /external/pytorch/aten/src/ATen/native/cuda/ |
| D | NaiveConvolutionTranspose3d.cu | 40 int padding_width, in slow_conv_transpose3d_shape_check()
216 int64_t padding_width = padding[2]; in slow_conv_transpose3d_out_cuda_template() local
440 int64_t padding_width = padding[2]; in slow_conv_transpose3d_backward_out_cuda_template() local
648 int64_t padding_width = padding[2]; in slow_conv_transpose3d_acc_grad_parameters_cuda() local
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| /external/XNNPACK/src/operators/ |
| D | argmax-pooling-nhwc.c | 204 const uint32_t padding_width = argmax_pooling_op->output_width * pooling_width - input_width; in xnn_setup_argmax_pooling2d_nhwc_f32() local
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| /external/tensorflow/tensorflow/python/ops/ragged/ |
| D | string_ngrams_op_test.py | 327 padding_width=None, argument
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| D | ragged_string_ops.py | 681 padding_width=None, argument
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| /external/XNNPACK/src/subgraph/ |
| D | convolution-2d.c | 534 const uint32_t padding_width = (kernel_width - 1) * dilation_width; in xnn_define_convolution_2d() local
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| D | depthwise-convolution-2d.c | 527 const uint32_t padding_width = (kernel_width - 1) * dilation_width; in xnn_define_depthwise_convolution_2d() local
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | radeon_vcn_enc.c | 238 uint32_t padding_width = 0; in radeon_vcn_enc_h264_get_session_param() local
557 uint32_t padding_width = 0; in radeon_vcn_enc_hevc_get_session_param() local
810 uint32_t padding_width = 0; in radeon_vcn_enc_av1_get_session_param() local
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| D | radeon_uvd_enc_1_1.c | 78 uint32_t padding_width = 0; in radeon_uvd_enc_session_init_hevc() local
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