1 /************************************************************************** 2 * 3 * Copyright 2009 Younes Manton. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef PIPE_VIDEO_STATE_H 29 #define PIPE_VIDEO_STATE_H 30 31 #include "pipe/p_defines.h" 32 #include "util/format/u_formats.h" 33 #include "pipe/p_state.h" 34 #include "pipe/p_screen.h" 35 #include "util/u_hash_table.h" 36 #include "util/u_inlines.h" 37 #include "util/u_rect.h" 38 #include "util/u_dynarray.h" 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 #define PIPE_H264_MAX_NUM_LIST_REF 32 45 #define PIPE_H264_MAX_DPB_SIZE 17 46 #define PIPE_H265_MAX_NUM_LIST_REF 15 47 #define PIPE_H265_MAX_DPB_SIZE 16 48 #define PIPE_H265_MAX_SLICES 128 49 #define PIPE_H264_MAX_REFERENCES 16 50 #define PIPE_H265_MAX_REFERENCES 15 51 #define PIPE_AV1_MAX_REFERENCES 8 52 #define PIPE_DEFAULT_FRAME_RATE_DEN 1 53 #define PIPE_DEFAULT_FRAME_RATE_NUM 30 54 #define PIPE_DEFAULT_INTRA_IDR_PERIOD 30 55 #define PIPE_H2645_EXTENDED_SAR 255 56 #define PIPE_ENC_ROI_REGION_NUM_MAX 32 57 #define PIPE_H2645_LIST_REF_INVALID_ENTRY 0xff 58 #define PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS 32 59 #define PIPE_H265_MAX_LONG_TERM_PICS 16 60 #define PIPE_H265_MAX_DELTA_POC 48 61 #define PIPE_H265_MAX_NUM_LIST_REF 15 62 #define PIPE_H265_MAX_ST_REF_PIC_SETS 65 63 #define PIPE_H265_MAX_SUB_LAYERS 7 64 #define PIPE_AV1_MAX_DPB_SIZE 8 65 #define PIPE_AV1_REFS_PER_FRAME 7 66 67 /* 68 * see table 6-12 in the spec 69 */ 70 enum pipe_mpeg12_picture_coding_type 71 { 72 PIPE_MPEG12_PICTURE_CODING_TYPE_I = 0x01, 73 PIPE_MPEG12_PICTURE_CODING_TYPE_P = 0x02, 74 PIPE_MPEG12_PICTURE_CODING_TYPE_B = 0x03, 75 PIPE_MPEG12_PICTURE_CODING_TYPE_D = 0x04 76 }; 77 78 /* 79 * see table 6-14 in the spec 80 */ 81 enum pipe_mpeg12_picture_structure 82 { 83 PIPE_MPEG12_PICTURE_STRUCTURE_RESERVED = 0x00, 84 PIPE_MPEG12_PICTURE_STRUCTURE_FIELD_TOP = 0x01, 85 PIPE_MPEG12_PICTURE_STRUCTURE_FIELD_BOTTOM = 0x02, 86 PIPE_MPEG12_PICTURE_STRUCTURE_FRAME = 0x03 87 }; 88 89 /* 90 * flags for macroblock_type, see section 6.3.17.1 in the spec 91 */ 92 enum pipe_mpeg12_macroblock_type 93 { 94 PIPE_MPEG12_MB_TYPE_QUANT = 0x01, 95 PIPE_MPEG12_MB_TYPE_MOTION_FORWARD = 0x02, 96 PIPE_MPEG12_MB_TYPE_MOTION_BACKWARD = 0x04, 97 PIPE_MPEG12_MB_TYPE_PATTERN = 0x08, 98 PIPE_MPEG12_MB_TYPE_INTRA = 0x10 99 }; 100 101 /* 102 * flags for motion_type, see table 6-17 and 6-18 in the spec 103 */ 104 enum pipe_mpeg12_motion_type 105 { 106 PIPE_MPEG12_MO_TYPE_RESERVED = 0x00, 107 PIPE_MPEG12_MO_TYPE_FIELD = 0x01, 108 PIPE_MPEG12_MO_TYPE_FRAME = 0x02, 109 PIPE_MPEG12_MO_TYPE_16x8 = 0x02, 110 PIPE_MPEG12_MO_TYPE_DUAL_PRIME = 0x03 111 }; 112 113 /* 114 * see section 6.3.17.1 and table 6-19 in the spec 115 */ 116 enum pipe_mpeg12_dct_type 117 { 118 PIPE_MPEG12_DCT_TYPE_FRAME = 0, 119 PIPE_MPEG12_DCT_TYPE_FIELD = 1 120 }; 121 122 enum pipe_mpeg12_field_select 123 { 124 PIPE_MPEG12_FS_FIRST_FORWARD = 0x01, 125 PIPE_MPEG12_FS_FIRST_BACKWARD = 0x02, 126 PIPE_MPEG12_FS_SECOND_FORWARD = 0x04, 127 PIPE_MPEG12_FS_SECOND_BACKWARD = 0x08 128 }; 129 130 enum pipe_h264_nal_unit_type 131 { 132 PIPE_H264_NAL_SLICE = 1, 133 PIPE_H264_NAL_IDR_SLICE= 5, 134 PIPE_H264_NAL_SPS = 7, 135 PIPE_H264_NAL_PPS = 8, 136 PIPE_H264_NAL_AUD = 9, 137 PIPE_H264_NAL_PREFIX = 14, 138 }; 139 140 enum pipe_h264_slice_type 141 { 142 PIPE_H264_SLICE_TYPE_P = 0x0, 143 PIPE_H264_SLICE_TYPE_B = 0x1, 144 PIPE_H264_SLICE_TYPE_I = 0x2, 145 PIPE_H264_SLICE_TYPE_SP = 0x3, 146 PIPE_H264_SLICE_TYPE_SI = 0x4 147 }; 148 149 enum pipe_h265_nal_unit_type 150 { 151 PIPE_H265_NAL_TRAIL_N = 0, 152 PIPE_H265_NAL_TRAIL_R = 1, 153 PIPE_H265_NAL_TSA_N = 2, 154 PIPE_H265_NAL_TSA_R = 3, 155 PIPE_H265_NAL_BLA_W_LP = 16, 156 PIPE_H265_NAL_IDR_W_RADL = 19, 157 PIPE_H265_NAL_IDR_N_LP = 20, 158 PIPE_H265_NAL_CRA_NUT = 21, 159 PIPE_H265_NAL_RSV_IRAP_VCL23 = 23, 160 PIPE_H265_NAL_VPS = 32, 161 PIPE_H265_NAL_SPS = 33, 162 PIPE_H265_NAL_PPS = 34, 163 PIPE_H265_NAL_AUD = 35, 164 PIPE_H265_NAL_PREFIX_SEI = 39, 165 }; 166 167 enum pipe_h265_slice_type 168 { 169 /* Values match Table 7-7 in HEVC spec 170 for Name association of slice_type */ 171 PIPE_H265_SLICE_TYPE_B = 0x0, 172 PIPE_H265_SLICE_TYPE_P = 0x1, 173 PIPE_H265_SLICE_TYPE_I = 0x2, 174 }; 175 176 /* To be used on each encoding feature bit field */ 177 enum pipe_enc_feature 178 { 179 PIPE_ENC_FEATURE_NOT_SUPPORTED = 0x0, 180 PIPE_ENC_FEATURE_SUPPORTED = 0x1, 181 PIPE_ENC_FEATURE_REQUIRED = 0x2, 182 }; 183 184 /* Same enum for h264/h265 */ 185 enum pipe_h2645_enc_picture_type 186 { 187 PIPE_H2645_ENC_PICTURE_TYPE_P = 0x00, 188 PIPE_H2645_ENC_PICTURE_TYPE_B = 0x01, 189 PIPE_H2645_ENC_PICTURE_TYPE_I = 0x02, 190 PIPE_H2645_ENC_PICTURE_TYPE_IDR = 0x03, 191 PIPE_H2645_ENC_PICTURE_TYPE_SKIP = 0x04 192 }; 193 194 enum pipe_av1_enc_frame_type 195 { 196 PIPE_AV1_ENC_FRAME_TYPE_KEY = 0x00, 197 PIPE_AV1_ENC_FRAME_TYPE_INTER = 0x01, 198 PIPE_AV1_ENC_FRAME_TYPE_INTRA_ONLY = 0x02, 199 PIPE_AV1_ENC_FRAME_TYPE_SWITCH = 0x03, 200 PIPE_AV1_ENC_FRAME_TYPE_SHOW_EXISTING = 0x04 201 }; 202 203 enum pipe_h2645_enc_rate_control_method 204 { 205 PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE = 0x00, 206 PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP = 0x01, 207 PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP = 0x02, 208 PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT = 0x03, 209 PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE = 0x04, 210 PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE = 0x05 211 }; 212 213 enum pipe_slice_buffer_placement_type 214 { 215 /* whole slice is in the buffer */ 216 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_WHOLE = 0x0, 217 /* The beginning of the slice is in the buffer but the end is not */ 218 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_BEGIN = 0x1, 219 /* Neither beginning nor end of the slice is in the buffer */ 220 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_MIDDLE = 0x2, 221 /* end of the slice is in the buffer */ 222 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_END = 0x3, 223 }; 224 225 struct pipe_picture_desc 226 { 227 enum pipe_video_profile profile; 228 enum pipe_video_entrypoint entry_point; 229 bool protected_playback; 230 uint8_t *decrypt_key; 231 uint32_t key_size; 232 enum pipe_format input_format; 233 bool input_full_range; 234 enum pipe_format output_format; 235 /* Flush flags for pipe_video_codec::end_frame */ 236 unsigned flush_flags; 237 /* A fence for pipe_video_codec::end_frame to signal job completion */ 238 struct pipe_fence_handle **fence; 239 }; 240 241 struct pipe_quant_matrix 242 { 243 enum pipe_video_format codec; 244 }; 245 246 struct pipe_macroblock 247 { 248 enum pipe_video_format codec; 249 }; 250 251 struct pipe_mpeg12_picture_desc 252 { 253 struct pipe_picture_desc base; 254 255 unsigned picture_coding_type; 256 unsigned picture_structure; 257 unsigned frame_pred_frame_dct; 258 unsigned q_scale_type; 259 unsigned alternate_scan; 260 unsigned intra_vlc_format; 261 unsigned concealment_motion_vectors; 262 unsigned intra_dc_precision; 263 unsigned f_code[2][2]; 264 unsigned top_field_first; 265 unsigned full_pel_forward_vector; 266 unsigned full_pel_backward_vector; 267 unsigned num_slices; 268 269 const uint8_t *intra_matrix; 270 const uint8_t *non_intra_matrix; 271 272 struct pipe_video_buffer *ref[2]; 273 }; 274 275 struct pipe_mpeg12_macroblock 276 { 277 struct pipe_macroblock base; 278 279 /* see section 6.3.17 in the spec */ 280 unsigned short x, y; 281 282 /* see section 6.3.17.1 in the spec */ 283 unsigned char macroblock_type; 284 285 union { 286 struct { 287 /* see table 6-17 in the spec */ 288 unsigned int frame_motion_type:2; 289 290 /* see table 6-18 in the spec */ 291 unsigned int field_motion_type:2; 292 293 /* see table 6-19 in the spec */ 294 unsigned int dct_type:1; 295 } bits; 296 unsigned int value; 297 } macroblock_modes; 298 299 /* see section 6.3.17.2 in the spec */ 300 unsigned char motion_vertical_field_select; 301 302 /* see Table 7-7 in the spec */ 303 short PMV[2][2][2]; 304 305 /* see figure 6.10-12 in the spec */ 306 unsigned short coded_block_pattern; 307 308 /* see figure 6.10-12 in the spec */ 309 short *blocks; 310 311 /* Number of skipped macroblocks after this macroblock */ 312 unsigned short num_skipped_macroblocks; 313 }; 314 315 struct pipe_mpeg4_picture_desc 316 { 317 struct pipe_picture_desc base; 318 319 int32_t trd[2]; 320 int32_t trb[2]; 321 uint16_t vop_time_increment_resolution; 322 uint8_t vop_coding_type; 323 uint8_t vop_fcode_forward; 324 uint8_t vop_fcode_backward; 325 uint8_t resync_marker_disable; 326 uint8_t interlaced; 327 uint8_t quant_type; 328 uint8_t quarter_sample; 329 uint8_t short_video_header; 330 uint8_t rounding_control; 331 uint8_t alternate_vertical_scan_flag; 332 uint8_t top_field_first; 333 334 const uint8_t *intra_matrix; 335 const uint8_t *non_intra_matrix; 336 337 struct pipe_video_buffer *ref[2]; 338 }; 339 340 struct pipe_vc1_picture_desc 341 { 342 struct pipe_picture_desc base; 343 344 uint32_t slice_count; 345 uint8_t picture_type; 346 uint8_t frame_coding_mode; 347 uint8_t is_first_field; 348 uint8_t postprocflag; 349 uint8_t pulldown; 350 uint8_t interlace; 351 uint8_t tfcntrflag; 352 uint8_t finterpflag; 353 uint8_t psf; 354 uint8_t dquant; 355 uint8_t panscan_flag; 356 uint8_t refdist_flag; 357 uint8_t quantizer; 358 uint8_t extended_mv; 359 uint8_t extended_dmv; 360 uint8_t overlap; 361 uint8_t vstransform; 362 uint8_t loopfilter; 363 uint8_t fastuvmc; 364 uint8_t range_mapy_flag; 365 uint8_t range_mapy; 366 uint8_t range_mapuv_flag; 367 uint8_t range_mapuv; 368 uint8_t multires; 369 uint8_t syncmarker; 370 uint8_t rangered; 371 uint8_t maxbframes; 372 uint8_t deblockEnable; 373 uint8_t pquant; 374 375 struct pipe_video_buffer *ref[2]; 376 }; 377 378 struct pipe_h264_sps 379 { 380 uint8_t level_idc; 381 uint8_t chroma_format_idc; 382 uint8_t separate_colour_plane_flag; 383 uint8_t bit_depth_luma_minus8; 384 uint8_t bit_depth_chroma_minus8; 385 uint8_t seq_scaling_matrix_present_flag; 386 uint8_t ScalingList4x4[6][16]; 387 uint8_t ScalingList8x8[6][64]; 388 uint8_t log2_max_frame_num_minus4; 389 uint8_t pic_order_cnt_type; 390 uint8_t log2_max_pic_order_cnt_lsb_minus4; 391 uint8_t delta_pic_order_always_zero_flag; 392 int32_t offset_for_non_ref_pic; 393 int32_t offset_for_top_to_bottom_field; 394 uint8_t num_ref_frames_in_pic_order_cnt_cycle; 395 int32_t offset_for_ref_frame[256]; 396 uint8_t max_num_ref_frames; 397 uint8_t frame_mbs_only_flag; 398 uint8_t mb_adaptive_frame_field_flag; 399 uint8_t direct_8x8_inference_flag; 400 uint8_t MinLumaBiPredSize8x8; 401 uint32_t pic_width_in_mbs_minus1; 402 uint32_t pic_height_in_mbs_minus1; 403 }; 404 405 struct pipe_h264_pps 406 { 407 struct pipe_h264_sps *sps; 408 409 uint8_t entropy_coding_mode_flag; 410 uint8_t bottom_field_pic_order_in_frame_present_flag; 411 uint8_t num_slice_groups_minus1; 412 uint8_t slice_group_map_type; 413 uint8_t slice_group_change_rate_minus1; 414 uint8_t num_ref_idx_l0_default_active_minus1; 415 uint8_t num_ref_idx_l1_default_active_minus1; 416 uint8_t weighted_pred_flag; 417 uint8_t weighted_bipred_idc; 418 int8_t pic_init_qp_minus26; 419 int8_t pic_init_qs_minus26; 420 int8_t chroma_qp_index_offset; 421 uint8_t deblocking_filter_control_present_flag; 422 uint8_t constrained_intra_pred_flag; 423 uint8_t redundant_pic_cnt_present_flag; 424 uint8_t ScalingList4x4[6][16]; 425 uint8_t ScalingList8x8[6][64]; 426 uint8_t transform_8x8_mode_flag; 427 int8_t second_chroma_qp_index_offset; 428 }; 429 430 struct pipe_h264_picture_desc 431 { 432 struct pipe_picture_desc base; 433 434 struct pipe_h264_pps *pps; 435 436 /* slice header */ 437 uint32_t frame_num; 438 uint8_t field_pic_flag; 439 uint8_t bottom_field_flag; 440 uint8_t num_ref_idx_l0_active_minus1; 441 uint8_t num_ref_idx_l1_active_minus1; 442 443 uint32_t slice_count; 444 int32_t field_order_cnt[2]; 445 bool is_reference; 446 uint8_t num_ref_frames; 447 448 bool is_long_term[16]; 449 bool top_is_reference[16]; 450 bool bottom_is_reference[16]; 451 uint32_t field_order_cnt_list[16][2]; 452 uint32_t frame_num_list[16]; 453 454 struct pipe_video_buffer *ref[16]; 455 456 struct 457 { 458 bool slice_info_present; 459 uint8_t slice_type[128]; 460 uint32_t slice_data_size[128]; 461 uint32_t slice_data_offset[128]; 462 enum pipe_slice_buffer_placement_type slice_data_flag[128]; 463 } slice_parameter; 464 }; 465 466 struct pipe_enc_quality_modes 467 { 468 unsigned int level; 469 unsigned int preset_mode; 470 unsigned int pre_encode_mode; 471 unsigned int vbaq_mode; 472 }; 473 474 /* 475 * intra refresh supports row or column only, it doens't support 476 * row and column mixed, if mixed it will pick up column mode. 477 * Also the assumption is the first row/column since the offset 478 * is zero, and it marks the start of intra-refresh, it will need 479 * to have headers at this point. 480 */ 481 struct pipe_enc_intra_refresh 482 { 483 unsigned int mode; 484 unsigned int region_size; 485 unsigned int offset; 486 unsigned int need_sequence_header; 487 }; 488 489 /* 490 * In AVC, unit is MB, HEVC (CTB) and AV1(SB) 491 */ 492 enum 493 { 494 INTRA_REFRESH_MODE_NONE, 495 INTRA_REFRESH_MODE_UNIT_ROWS, 496 INTRA_REFRESH_MODE_UNIT_COLUMNS, 497 }; 498 499 /* All the values are in pixels, driver converts it into 500 * different units for different codecs, for example: h264 501 * is in 16x16 block, hevc/av1 is in 64x64 block. 502 * x, y means the location of region start, width/height defines 503 * the region size; the qp value carries the qp_delta. 504 */ 505 struct pipe_enc_region_in_roi 506 { 507 bool valid; 508 int32_t qp_value; 509 unsigned int x, y; 510 unsigned int width, height; 511 }; 512 /* It does not support prioirty only qp_delta. 513 * The priority is implied by the region sequence number. 514 * Region 0 is most significant one, and region 1 is less 515 * significant, and lesser significant when region number 516 * grows. It allows region overlapping, and lower 517 * priority region would be overwritten by the higher one. 518 */ 519 struct pipe_enc_roi 520 { 521 unsigned int num; 522 struct pipe_enc_region_in_roi region[PIPE_ENC_ROI_REGION_NUM_MAX]; 523 }; 524 525 struct pipe_enc_raw_header 526 { 527 uint8_t type; /* nal_unit_type or obu_type */ 528 bool is_slice; /* slice or frame header */ 529 uint32_t size; 530 uint8_t *buffer; 531 }; 532 533 struct pipe_h264_enc_rate_control 534 { 535 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 536 unsigned target_bitrate; 537 unsigned peak_bitrate; 538 unsigned frame_rate_num; 539 unsigned frame_rate_den; 540 unsigned vbv_buffer_size; 541 unsigned vbv_buf_lv; 542 unsigned vbv_buf_initial_size; 543 bool app_requested_hrd_buffer; 544 unsigned fill_data_enable; 545 unsigned skip_frame_enable; 546 unsigned enforce_hrd; 547 unsigned max_au_size; 548 unsigned max_qp; 549 unsigned min_qp; 550 bool app_requested_qp_range; 551 552 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 553 unsigned vbr_quality_factor; 554 }; 555 556 struct pipe_h264_enc_motion_estimation 557 { 558 unsigned motion_est_quarter_pixel; 559 unsigned enc_disable_sub_mode; 560 unsigned lsmvert; 561 unsigned enc_en_ime_overw_dis_subm; 562 unsigned enc_ime_overw_dis_subm_no; 563 unsigned enc_ime2_search_range_x; 564 unsigned enc_ime2_search_range_y; 565 }; 566 567 struct pipe_h264_enc_pic_control 568 { 569 unsigned enc_cabac_enable; 570 unsigned enc_cabac_init_idc; 571 struct { 572 uint32_t entropy_coding_mode_flag : 1; 573 uint32_t weighted_pred_flag : 1; 574 uint32_t deblocking_filter_control_present_flag : 1; 575 uint32_t constrained_intra_pred_flag : 1; 576 uint32_t redundant_pic_cnt_present_flag : 1; 577 uint32_t transform_8x8_mode_flag : 1; 578 }; 579 uint8_t nal_ref_idc; 580 uint8_t nal_unit_type; 581 uint8_t num_ref_idx_l0_default_active_minus1; 582 uint8_t num_ref_idx_l1_default_active_minus1; 583 uint8_t weighted_bipred_idc; 584 int8_t pic_init_qp_minus26; 585 int8_t pic_init_qs_minus26; 586 int8_t chroma_qp_index_offset; 587 int8_t second_chroma_qp_index_offset; 588 uint8_t temporal_id; 589 }; 590 591 struct pipe_h264_enc_dbk_param 592 { 593 unsigned disable_deblocking_filter_idc; 594 signed alpha_c0_offset_div2; 595 signed beta_offset_div2; 596 }; 597 598 struct h264_slice_descriptor 599 { 600 /** Starting MB address for this slice. */ 601 uint32_t macroblock_address; 602 /** Number of macroblocks in this slice. */ 603 uint32_t num_macroblocks; 604 /** slice type. */ 605 enum pipe_h264_slice_type slice_type; 606 }; 607 608 struct h265_slice_descriptor 609 { 610 /** Starting CTU address for this slice. */ 611 uint32_t slice_segment_address; 612 /** Number of CTUs in this slice. */ 613 uint32_t num_ctu_in_slice; 614 /** slice type. */ 615 enum pipe_h265_slice_type slice_type; 616 }; 617 618 struct pipe_enc_hdr_cll { 619 uint16_t max_cll; 620 uint16_t max_fall; 621 }; 622 623 struct pipe_enc_hdr_mdcv { 624 uint16_t primary_chromaticity_x[3]; 625 uint16_t primary_chromaticity_y[3]; 626 uint16_t white_point_chromaticity_x; 627 uint16_t white_point_chromaticity_y; 628 uint32_t luminance_max; 629 uint32_t luminance_min; 630 }; 631 632 typedef struct pipe_h264_enc_hrd_params 633 { 634 uint32_t cpb_cnt_minus1; 635 uint32_t bit_rate_scale; 636 uint32_t cpb_size_scale; 637 uint32_t bit_rate_value_minus1[32]; 638 uint32_t cpb_size_value_minus1[32]; 639 uint32_t cbr_flag[32]; 640 uint32_t initial_cpb_removal_delay_length_minus1; 641 uint32_t cpb_removal_delay_length_minus1; 642 uint32_t dpb_output_delay_length_minus1; 643 uint32_t time_offset_length; 644 } pipe_h264_enc_hrd_params; 645 646 struct pipe_h264_enc_seq_param 647 { 648 struct { 649 uint32_t enc_frame_cropping_flag : 1; 650 uint32_t vui_parameters_present_flag : 1; 651 uint32_t video_full_range_flag : 1; 652 uint32_t direct_8x8_inference_flag : 1; 653 uint32_t gaps_in_frame_num_value_allowed_flag : 1; 654 }; 655 unsigned profile_idc; 656 unsigned enc_constraint_set_flags; 657 unsigned level_idc; 658 unsigned bit_depth_luma_minus8; 659 unsigned bit_depth_chroma_minus8; 660 unsigned enc_frame_crop_left_offset; 661 unsigned enc_frame_crop_right_offset; 662 unsigned enc_frame_crop_top_offset; 663 unsigned enc_frame_crop_bottom_offset; 664 unsigned pic_order_cnt_type; 665 unsigned log2_max_frame_num_minus4; 666 unsigned log2_max_pic_order_cnt_lsb_minus4; 667 unsigned num_temporal_layers; 668 struct { 669 uint32_t aspect_ratio_info_present_flag: 1; 670 uint32_t timing_info_present_flag: 1; 671 uint32_t video_signal_type_present_flag: 1; 672 uint32_t colour_description_present_flag: 1; 673 uint32_t chroma_loc_info_present_flag: 1; 674 uint32_t overscan_info_present_flag: 1; 675 uint32_t overscan_appropriate_flag: 1; 676 uint32_t fixed_frame_rate_flag: 1; 677 uint32_t nal_hrd_parameters_present_flag: 1; 678 uint32_t vcl_hrd_parameters_present_flag: 1; 679 uint32_t low_delay_hrd_flag: 1; 680 uint32_t pic_struct_present_flag: 1; 681 uint32_t bitstream_restriction_flag: 1; 682 uint32_t motion_vectors_over_pic_boundaries_flag: 1; 683 } vui_flags; 684 uint32_t aspect_ratio_idc; 685 uint32_t sar_width; 686 uint32_t sar_height; 687 uint32_t num_units_in_tick; 688 uint32_t time_scale; 689 uint32_t video_format; 690 uint32_t colour_primaries; 691 uint32_t transfer_characteristics; 692 uint32_t matrix_coefficients; 693 uint32_t chroma_sample_loc_type_top_field; 694 uint32_t chroma_sample_loc_type_bottom_field; 695 uint32_t max_num_reorder_frames; 696 pipe_h264_enc_hrd_params nal_hrd_parameters; 697 pipe_h264_enc_hrd_params vcl_hrd_parameters; 698 uint32_t max_bytes_per_pic_denom; 699 uint32_t max_bits_per_mb_denom; 700 uint32_t log2_max_mv_length_vertical; 701 uint32_t log2_max_mv_length_horizontal; 702 uint32_t max_dec_frame_buffering; 703 uint32_t max_num_ref_frames; 704 uint32_t pic_width_in_mbs_minus1; 705 uint32_t pic_height_in_map_units_minus1; 706 }; 707 708 struct pipe_h264_ref_list_mod_entry 709 { 710 uint8_t modification_of_pic_nums_idc; 711 uint32_t abs_diff_pic_num_minus1; 712 uint32_t long_term_pic_num; 713 }; 714 715 struct pipe_h264_ref_pic_marking_entry 716 { 717 uint8_t memory_management_control_operation; 718 uint32_t difference_of_pic_nums_minus1; 719 uint32_t long_term_pic_num; 720 uint32_t long_term_frame_idx; 721 uint32_t max_long_term_frame_idx_plus1; 722 }; 723 724 struct pipe_h264_enc_slice_param 725 { 726 struct { 727 uint32_t direct_spatial_mv_pred_flag : 1; 728 uint32_t num_ref_idx_active_override_flag : 1; 729 uint32_t ref_pic_list_modification_flag_l0 : 1; 730 uint32_t ref_pic_list_modification_flag_l1 : 1; 731 uint32_t no_output_of_prior_pics_flag : 1; 732 uint32_t long_term_reference_flag : 1; 733 uint32_t adaptive_ref_pic_marking_mode_flag : 1; 734 }; 735 uint8_t slice_type; 736 uint8_t colour_plane_id; 737 uint32_t frame_num; 738 uint32_t idr_pic_id; 739 uint32_t pic_order_cnt_lsb; 740 uint8_t redundant_pic_cnt; 741 uint8_t num_ref_idx_l0_active_minus1; 742 uint8_t num_ref_idx_l1_active_minus1; 743 uint8_t num_ref_list0_mod_operations; 744 struct pipe_h264_ref_list_mod_entry ref_list0_mod_operations[PIPE_H264_MAX_NUM_LIST_REF]; 745 uint8_t num_ref_list1_mod_operations; 746 struct pipe_h264_ref_list_mod_entry ref_list1_mod_operations[PIPE_H264_MAX_NUM_LIST_REF]; 747 uint8_t num_ref_pic_marking_operations; 748 struct pipe_h264_ref_pic_marking_entry ref_pic_marking_operations[PIPE_H264_MAX_NUM_LIST_REF]; 749 uint8_t cabac_init_idc; 750 int32_t slice_qp_delta; 751 uint8_t disable_deblocking_filter_idc; 752 int32_t slice_alpha_c0_offset_div2; 753 int32_t slice_beta_offset_div2; 754 }; 755 756 struct pipe_h264_enc_dpb_entry 757 { 758 uint32_t id; 759 uint32_t frame_idx; 760 uint32_t pic_order_cnt; 761 uint32_t temporal_id; 762 bool is_ltr; 763 struct pipe_video_buffer *buffer; 764 bool evict; 765 enum pipe_h2645_enc_picture_type picture_type; 766 }; 767 768 struct pipe_h264_enc_picture_desc 769 { 770 struct pipe_picture_desc base; 771 772 struct pipe_h264_enc_seq_param seq; 773 struct pipe_h264_enc_slice_param slice; 774 struct pipe_h264_enc_pic_control pic_ctrl; 775 struct pipe_h264_enc_rate_control rate_ctrl[4]; 776 777 struct pipe_h264_enc_motion_estimation motion_est; 778 struct pipe_h264_enc_dbk_param dbk; 779 780 unsigned intra_idr_period; 781 unsigned ip_period; 782 783 unsigned init_qp; 784 unsigned quant_i_frames; 785 unsigned quant_p_frames; 786 unsigned quant_b_frames; 787 788 enum pipe_h2645_enc_picture_type picture_type; 789 unsigned frame_num; 790 unsigned frame_num_cnt; 791 unsigned p_remain; 792 unsigned i_remain; 793 unsigned idr_pic_id; 794 unsigned gop_cnt; 795 unsigned pic_order_cnt; 796 unsigned num_ref_idx_l0_active_minus1; 797 unsigned num_ref_idx_l1_active_minus1; 798 unsigned ref_idx_l0_list[PIPE_H264_MAX_NUM_LIST_REF]; 799 bool l0_is_long_term[PIPE_H264_MAX_NUM_LIST_REF]; 800 unsigned ref_idx_l1_list[PIPE_H264_MAX_NUM_LIST_REF]; 801 bool l1_is_long_term[PIPE_H264_MAX_NUM_LIST_REF]; 802 unsigned gop_size; 803 struct pipe_enc_quality_modes quality_modes; 804 struct pipe_enc_intra_refresh intra_refresh; 805 struct pipe_enc_roi roi; 806 807 bool not_referenced; 808 bool is_ltr; 809 unsigned ltr_index; 810 bool enable_vui; 811 struct hash_table *frame_idx; 812 813 enum pipe_video_slice_mode slice_mode; 814 815 /* Use with PIPE_VIDEO_SLICE_MODE_BLOCKS */ 816 unsigned num_slice_descriptors; 817 struct h264_slice_descriptor slices_descriptors[128]; 818 819 /* Use with PIPE_VIDEO_SLICE_MODE_MAX_SLICE_SIZE */ 820 unsigned max_slice_bytes; 821 822 enum pipe_video_feedback_metadata_type requested_metadata; 823 824 struct pipe_h264_enc_dpb_entry dpb[PIPE_H264_MAX_DPB_SIZE]; 825 uint8_t dpb_size; 826 uint8_t dpb_curr_pic; /* index in dpb */ 827 uint8_t ref_list0[PIPE_H264_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 828 uint8_t ref_list1[PIPE_H264_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 829 830 struct util_dynarray raw_headers; /* struct pipe_enc_raw_header */ 831 }; 832 833 struct pipe_h265_st_ref_pic_set 834 { 835 struct { 836 uint32_t inter_ref_pic_set_prediction_flag : 1; 837 }; 838 uint32_t delta_idx_minus1; 839 uint8_t delta_rps_sign; 840 uint16_t abs_delta_rps_minus1; 841 uint8_t used_by_curr_pic_flag[PIPE_H265_MAX_DPB_SIZE]; 842 uint8_t use_delta_flag[PIPE_H265_MAX_DPB_SIZE]; 843 uint8_t num_negative_pics; 844 uint8_t num_positive_pics; 845 uint16_t delta_poc_s0_minus1[PIPE_H265_MAX_DPB_SIZE]; 846 uint8_t used_by_curr_pic_s0_flag[PIPE_H265_MAX_DPB_SIZE]; 847 uint16_t delta_poc_s1_minus1[PIPE_H265_MAX_DPB_SIZE]; 848 uint8_t used_by_curr_pic_s1_flag[PIPE_H265_MAX_DPB_SIZE]; 849 }; 850 851 struct pipe_h265_ref_pic_lists_modification 852 { 853 struct { 854 uint32_t ref_pic_list_modification_flag_l0 : 1; 855 uint32_t ref_pic_list_modification_flag_l1 : 1; 856 }; 857 uint8_t list_entry_l0[PIPE_H265_MAX_NUM_LIST_REF]; 858 uint8_t list_entry_l1[PIPE_H265_MAX_NUM_LIST_REF]; 859 }; 860 861 struct pipe_h265_enc_sublayer_hrd_params 862 { 863 uint32_t bit_rate_value_minus1[32]; 864 uint32_t cpb_size_value_minus1[32]; 865 uint32_t cpb_size_du_value_minus1[32]; 866 uint32_t bit_rate_du_value_minus1[32]; 867 uint32_t cbr_flag[32]; 868 }; 869 870 struct pipe_h265_enc_hrd_params 871 { 872 uint32_t nal_hrd_parameters_present_flag; 873 uint32_t vcl_hrd_parameters_present_flag; 874 uint32_t sub_pic_hrd_params_present_flag; 875 uint32_t tick_divisor_minus2; 876 uint32_t du_cpb_removal_delay_increment_length_minus1; 877 uint32_t sub_pic_cpb_params_in_pic_timing_sei_flag; 878 uint32_t dpb_output_delay_du_length_minus1; 879 uint32_t bit_rate_scale; 880 uint32_t cpb_rate_scale; 881 uint32_t cpb_size_du_scale; 882 uint32_t initial_cpb_removal_delay_length_minus1; 883 uint32_t au_cpb_removal_delay_length_minus1; 884 uint32_t dpb_output_delay_length_minus1; 885 uint32_t fixed_pic_rate_general_flag[PIPE_H265_MAX_SUB_LAYERS]; 886 uint32_t fixed_pic_rate_within_cvs_flag[PIPE_H265_MAX_SUB_LAYERS]; 887 uint32_t elemental_duration_in_tc_minus1[PIPE_H265_MAX_SUB_LAYERS]; 888 uint32_t low_delay_hrd_flag[PIPE_H265_MAX_SUB_LAYERS]; 889 uint32_t cpb_cnt_minus1[PIPE_H265_MAX_SUB_LAYERS]; 890 struct pipe_h265_enc_sublayer_hrd_params nal_hrd_parameters[PIPE_H265_MAX_SUB_LAYERS]; 891 struct pipe_h265_enc_sublayer_hrd_params vlc_hrd_parameters[PIPE_H265_MAX_SUB_LAYERS]; 892 }; 893 894 struct pipe_h265_profile_tier 895 { 896 struct { 897 uint32_t general_tier_flag : 1; 898 uint32_t general_progressive_source_flag : 1; 899 uint32_t general_interlaced_source_flag : 1; 900 uint32_t general_non_packed_constraint_flag : 1; 901 uint32_t general_frame_only_constraint_flag : 1; 902 }; 903 uint8_t general_profile_space; 904 uint8_t general_profile_idc; 905 uint32_t general_profile_compatibility_flag; 906 }; 907 908 struct pipe_h265_profile_tier_level 909 { 910 uint8_t general_level_idc; 911 uint8_t sub_layer_profile_present_flag[PIPE_H265_MAX_SUB_LAYERS]; 912 uint8_t sub_layer_level_present_flag[PIPE_H265_MAX_SUB_LAYERS]; 913 uint8_t sub_layer_level_idc[PIPE_H265_MAX_SUB_LAYERS]; 914 struct pipe_h265_profile_tier profile_tier; 915 struct pipe_h265_profile_tier sub_layer_profile_tier[PIPE_H265_MAX_SUB_LAYERS]; 916 }; 917 918 struct pipe_h265_enc_vid_param 919 { 920 struct { 921 uint32_t vps_base_layer_internal_flag : 1; 922 uint32_t vps_base_layer_available_flag : 1; 923 uint32_t vps_temporal_id_nesting_flag : 1; 924 uint32_t vps_sub_layer_ordering_info_present_flag : 1; 925 uint32_t vps_timing_info_present_flag : 1; 926 uint32_t vps_poc_proportional_to_timing_flag : 1; 927 }; 928 uint8_t vps_max_layers_minus1; 929 uint8_t vps_max_sub_layers_minus1; 930 uint8_t vps_max_dec_pic_buffering_minus1[PIPE_H265_MAX_SUB_LAYERS]; 931 uint8_t vps_max_num_reorder_pics[PIPE_H265_MAX_SUB_LAYERS]; 932 uint32_t vps_max_latency_increase_plus1[PIPE_H265_MAX_SUB_LAYERS]; 933 uint8_t vps_max_layer_id; 934 uint32_t vps_num_layer_sets_minus1; 935 uint32_t vps_num_units_in_tick; 936 uint32_t vps_time_scale; 937 uint32_t vps_num_ticks_poc_diff_one_minus1; 938 struct pipe_h265_profile_tier_level profile_tier_level; 939 }; 940 941 struct pipe_h265_enc_seq_param 942 { 943 struct { 944 uint32_t sps_temporal_id_nesting_flag : 1; 945 uint32_t strong_intra_smoothing_enabled_flag : 1; 946 uint32_t amp_enabled_flag : 1; 947 uint32_t sample_adaptive_offset_enabled_flag : 1; 948 uint32_t pcm_enabled_flag : 1; 949 uint32_t sps_temporal_mvp_enabled_flag : 1; 950 uint32_t conformance_window_flag : 1; 951 uint32_t vui_parameters_present_flag : 1; 952 uint32_t video_full_range_flag : 1; 953 uint32_t long_term_ref_pics_present_flag : 1; 954 uint32_t sps_sub_layer_ordering_info_present_flag : 1; 955 }; 956 uint8_t general_profile_idc; 957 uint8_t general_level_idc; 958 uint8_t general_tier_flag; 959 uint32_t intra_period; 960 uint32_t ip_period; 961 uint16_t pic_width_in_luma_samples; 962 uint16_t pic_height_in_luma_samples; 963 uint32_t chroma_format_idc; 964 uint32_t bit_depth_luma_minus8; 965 uint32_t bit_depth_chroma_minus8; 966 uint8_t log2_max_pic_order_cnt_lsb_minus4; 967 uint8_t log2_min_luma_coding_block_size_minus3; 968 uint8_t log2_diff_max_min_luma_coding_block_size; 969 uint8_t log2_min_transform_block_size_minus2; 970 uint8_t log2_diff_max_min_transform_block_size; 971 uint8_t max_transform_hierarchy_depth_inter; 972 uint8_t max_transform_hierarchy_depth_intra; 973 uint16_t conf_win_left_offset; 974 uint16_t conf_win_right_offset; 975 uint16_t conf_win_top_offset; 976 uint16_t conf_win_bottom_offset; 977 struct { 978 uint32_t aspect_ratio_info_present_flag: 1; 979 uint32_t timing_info_present_flag: 1; 980 uint32_t video_signal_type_present_flag: 1; 981 uint32_t colour_description_present_flag: 1; 982 uint32_t chroma_loc_info_present_flag: 1; 983 uint32_t overscan_info_present_flag: 1; 984 uint32_t overscan_appropriate_flag: 1; 985 uint32_t neutral_chroma_indication_flag: 1; 986 uint32_t field_seq_flag: 1; 987 uint32_t frame_field_info_present_flag: 1; 988 uint32_t default_display_window_flag: 1; 989 uint32_t poc_proportional_to_timing_flag: 1; 990 uint32_t hrd_parameters_present_flag: 1; 991 uint32_t bitstream_restriction_flag: 1; 992 uint32_t tiles_fixed_structure_flag: 1; 993 uint32_t motion_vectors_over_pic_boundaries_flag: 1; 994 uint32_t restricted_ref_pic_lists_flag: 1; 995 } vui_flags; 996 uint32_t aspect_ratio_idc; 997 uint32_t sar_width; 998 uint32_t sar_height; 999 uint32_t num_units_in_tick; 1000 uint32_t time_scale; 1001 uint32_t video_format; 1002 uint32_t colour_primaries; 1003 uint32_t transfer_characteristics; 1004 uint32_t matrix_coefficients; 1005 uint32_t chroma_sample_loc_type_top_field; 1006 uint32_t chroma_sample_loc_type_bottom_field; 1007 uint32_t def_disp_win_left_offset; 1008 uint32_t def_disp_win_right_offset; 1009 uint32_t def_disp_win_top_offset; 1010 uint32_t def_disp_win_bottom_offset; 1011 uint32_t num_ticks_poc_diff_one_minus1; 1012 uint32_t min_spatial_segmentation_idc; 1013 uint32_t max_bytes_per_pic_denom; 1014 uint32_t max_bits_per_min_cu_denom; 1015 uint32_t log2_max_mv_length_horizontal; 1016 uint32_t log2_max_mv_length_vertical; 1017 uint32_t num_temporal_layers; 1018 uint32_t num_short_term_ref_pic_sets; 1019 uint32_t num_long_term_ref_pics_sps; 1020 uint32_t lt_ref_pic_poc_lsb_sps[PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS]; 1021 uint8_t used_by_curr_pic_lt_sps_flag[PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS]; 1022 uint8_t sps_max_sub_layers_minus1; 1023 uint8_t sps_max_dec_pic_buffering_minus1[PIPE_H265_MAX_SUB_LAYERS]; 1024 uint8_t sps_max_num_reorder_pics[PIPE_H265_MAX_SUB_LAYERS]; 1025 uint32_t sps_max_latency_increase_plus1[PIPE_H265_MAX_SUB_LAYERS]; 1026 struct pipe_h265_profile_tier_level profile_tier_level; 1027 struct pipe_h265_enc_hrd_params hrd_parameters; 1028 struct pipe_h265_st_ref_pic_set st_ref_pic_set[PIPE_H265_MAX_ST_REF_PIC_SETS]; 1029 struct { 1030 uint32_t sps_range_extension_flag; 1031 uint32_t transform_skip_rotation_enabled_flag: 1; 1032 uint32_t transform_skip_context_enabled_flag: 1; 1033 uint32_t implicit_rdpcm_enabled_flag: 1; 1034 uint32_t explicit_rdpcm_enabled_flag: 1; 1035 uint32_t extended_precision_processing_flag: 1; 1036 uint32_t intra_smoothing_disabled_flag: 1; 1037 uint32_t high_precision_offsets_enabled_flag: 1; 1038 uint32_t persistent_rice_adaptation_enabled_flag: 1; 1039 uint32_t cabac_bypass_alignment_enabled_flag: 1; 1040 } sps_range_extension; 1041 uint8_t separate_colour_plane_flag; 1042 }; 1043 1044 struct pipe_h265_enc_pic_param 1045 { 1046 struct { 1047 uint32_t dependent_slice_segments_enabled_flag : 1; 1048 uint32_t output_flag_present_flag : 1; 1049 uint32_t sign_data_hiding_enabled_flag : 1; 1050 uint32_t cabac_init_present_flag : 1; 1051 uint32_t constrained_intra_pred_flag : 1; 1052 uint32_t transform_skip_enabled_flag : 1; 1053 uint32_t cu_qp_delta_enabled_flag : 1; 1054 uint32_t weighted_pred_flag : 1; 1055 uint32_t weighted_bipred_flag : 1; 1056 uint32_t transquant_bypass_enabled_flag : 1; 1057 uint32_t entropy_coding_sync_enabled_flag : 1; 1058 uint32_t pps_slice_chroma_qp_offsets_present_flag : 1; 1059 uint32_t pps_loop_filter_across_slices_enabled_flag : 1; 1060 uint32_t deblocking_filter_control_present_flag : 1; 1061 uint32_t deblocking_filter_override_enabled_flag : 1; 1062 uint32_t pps_deblocking_filter_disabled_flag : 1; 1063 uint32_t lists_modification_present_flag : 1; 1064 }; 1065 uint8_t log2_parallel_merge_level_minus2; 1066 uint8_t nal_unit_type; 1067 uint8_t temporal_id; 1068 uint8_t num_extra_slice_header_bits; 1069 uint8_t num_ref_idx_l0_default_active_minus1; 1070 uint8_t num_ref_idx_l1_default_active_minus1; 1071 int8_t init_qp_minus26; 1072 uint8_t diff_cu_qp_delta_depth; 1073 int8_t pps_cb_qp_offset; 1074 int8_t pps_cr_qp_offset; 1075 int8_t pps_beta_offset_div2; 1076 int8_t pps_tc_offset_div2; 1077 struct { 1078 uint8_t pps_range_extension_flag; 1079 uint32_t log2_max_transform_skip_block_size_minus2; 1080 uint32_t cross_component_prediction_enabled_flag: 1; 1081 uint32_t chroma_qp_offset_list_enabled_flag: 1; 1082 uint32_t diff_cu_chroma_qp_offset_depth; 1083 uint32_t chroma_qp_offset_list_len_minus1; 1084 int32_t cb_qp_offset_list[6]; 1085 int32_t cr_qp_offset_list[6]; 1086 uint32_t log2_sao_offset_scale_luma; 1087 uint32_t log2_sao_offset_scale_chroma; 1088 } pps_range_extension; 1089 }; 1090 1091 struct pipe_h265_enc_slice_param 1092 { 1093 struct { 1094 uint32_t no_output_of_prior_pics_flag : 1; 1095 uint32_t dependent_slice_segment_flag : 1; 1096 uint32_t pic_output_flag : 1; 1097 uint32_t short_term_ref_pic_set_sps_flag : 1; 1098 uint32_t slice_sao_luma_flag : 1; 1099 uint32_t slice_sao_chroma_flag : 1; 1100 uint32_t slice_temporal_mvp_enabled_flag : 1; 1101 uint32_t num_ref_idx_active_override_flag : 1; 1102 uint32_t mvd_l1_zero_flag : 1; 1103 uint32_t cabac_init_flag : 1; 1104 uint32_t collocated_from_l0_flag : 1; 1105 uint32_t cu_chroma_qp_offset_enabled_flag : 1; 1106 uint32_t deblocking_filter_override_flag : 1; 1107 uint32_t slice_deblocking_filter_disabled_flag : 1; 1108 uint32_t slice_loop_filter_across_slices_enabled_flag : 1; 1109 }; 1110 uint8_t slice_type; 1111 uint32_t slice_pic_order_cnt_lsb; 1112 uint8_t colour_plane_id; 1113 uint8_t short_term_ref_pic_set_idx; 1114 uint8_t num_long_term_sps; 1115 uint8_t num_long_term_pics; 1116 uint8_t lt_idx_sps[PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS]; 1117 uint8_t poc_lsb_lt[PIPE_H265_MAX_LONG_TERM_PICS]; 1118 uint8_t used_by_curr_pic_lt_flag[PIPE_H265_MAX_LONG_TERM_PICS]; 1119 uint8_t delta_poc_msb_present_flag[PIPE_H265_MAX_DELTA_POC]; 1120 uint8_t delta_poc_msb_cycle_lt[PIPE_H265_MAX_DELTA_POC]; 1121 uint8_t num_ref_idx_l0_active_minus1; 1122 uint8_t num_ref_idx_l1_active_minus1; 1123 uint8_t collocated_ref_idx; 1124 uint8_t max_num_merge_cand; 1125 int8_t slice_qp_delta; 1126 int8_t slice_cb_qp_offset; 1127 int8_t slice_cr_qp_offset; 1128 int8_t slice_beta_offset_div2; 1129 int8_t slice_tc_offset_div2; 1130 struct pipe_h265_ref_pic_lists_modification ref_pic_lists_modification; 1131 }; 1132 1133 struct pipe_h265_enc_rate_control 1134 { 1135 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 1136 unsigned target_bitrate; 1137 unsigned peak_bitrate; 1138 unsigned frame_rate_num; 1139 unsigned frame_rate_den; 1140 unsigned init_qp; 1141 unsigned quant_i_frames; 1142 unsigned quant_p_frames; 1143 unsigned quant_b_frames; 1144 unsigned vbv_buffer_size; 1145 unsigned vbv_buf_lv; 1146 unsigned vbv_buf_initial_size; 1147 bool app_requested_hrd_buffer; 1148 unsigned fill_data_enable; 1149 unsigned skip_frame_enable; 1150 unsigned enforce_hrd; 1151 unsigned max_au_size; 1152 unsigned max_qp; 1153 unsigned min_qp; 1154 bool app_requested_qp_range; 1155 1156 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 1157 unsigned vbr_quality_factor; 1158 }; 1159 1160 struct pipe_h265_enc_dpb_entry 1161 { 1162 uint32_t id; 1163 uint32_t pic_order_cnt; 1164 uint32_t temporal_id; 1165 bool is_ltr; 1166 struct pipe_video_buffer *buffer; 1167 bool evict; 1168 }; 1169 1170 struct pipe_h265_enc_picture_desc 1171 { 1172 struct pipe_picture_desc base; 1173 1174 struct pipe_h265_enc_vid_param vid; 1175 struct pipe_h265_enc_seq_param seq; 1176 struct pipe_h265_enc_pic_param pic; 1177 struct pipe_h265_enc_slice_param slice; 1178 struct pipe_h265_enc_rate_control rc[4]; 1179 1180 enum pipe_h2645_enc_picture_type picture_type; 1181 unsigned decoded_curr_pic; 1182 unsigned reference_frames[16]; 1183 unsigned frame_num; 1184 unsigned pic_order_cnt; 1185 unsigned pic_order_cnt_type; 1186 struct pipe_enc_quality_modes quality_modes; 1187 struct pipe_enc_intra_refresh intra_refresh; 1188 struct pipe_enc_roi roi; 1189 unsigned num_ref_idx_l0_active_minus1; 1190 unsigned num_ref_idx_l1_active_minus1; 1191 unsigned ref_idx_l0_list[PIPE_H265_MAX_NUM_LIST_REF]; 1192 unsigned ref_idx_l1_list[PIPE_H265_MAX_NUM_LIST_REF]; 1193 bool not_referenced; 1194 struct hash_table *frame_idx; 1195 1196 enum pipe_video_slice_mode slice_mode; 1197 1198 /* Use with PIPE_VIDEO_SLICE_MODE_BLOCKS */ 1199 unsigned num_slice_descriptors; 1200 struct h265_slice_descriptor slices_descriptors[128]; 1201 1202 /* Use with PIPE_VIDEO_SLICE_MODE_MAX_SLICE_SIZE */ 1203 unsigned max_slice_bytes; 1204 enum pipe_video_feedback_metadata_type requested_metadata; 1205 1206 struct pipe_enc_hdr_cll metadata_hdr_cll; 1207 struct pipe_enc_hdr_mdcv metadata_hdr_mdcv; 1208 1209 struct pipe_h265_enc_dpb_entry dpb[PIPE_H265_MAX_DPB_SIZE]; 1210 uint8_t dpb_size; 1211 uint8_t dpb_curr_pic; /* index in dpb */ 1212 uint8_t ref_list0[PIPE_H265_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 1213 uint8_t ref_list1[PIPE_H265_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 1214 1215 struct util_dynarray raw_headers; /* struct pipe_enc_raw_header */ 1216 }; 1217 1218 struct pipe_av1_enc_rate_control 1219 { 1220 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 1221 unsigned target_bitrate; 1222 unsigned peak_bitrate; 1223 unsigned frame_rate_num; 1224 unsigned frame_rate_den; 1225 unsigned vbv_buffer_size; 1226 unsigned vbv_buf_lv; 1227 unsigned vbv_buf_initial_size; 1228 bool app_requested_hrd_buffer; 1229 unsigned fill_data_enable; 1230 unsigned skip_frame_enable; 1231 unsigned enforce_hrd; 1232 unsigned max_au_size; 1233 unsigned qp; /* Initial QP */ 1234 unsigned qp_inter; 1235 unsigned max_qp; 1236 unsigned min_qp; 1237 bool app_requested_qp_range; 1238 bool app_requested_initial_qp; 1239 1240 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 1241 unsigned vbr_quality_factor; 1242 }; 1243 1244 struct pipe_av1_enc_decoder_model_info 1245 { 1246 uint32_t buffer_delay_length_minus1; 1247 uint32_t num_units_in_decoding_tick; 1248 uint32_t buffer_removal_time_length_minus1; 1249 uint32_t frame_presentation_time_length_minus1; 1250 }; 1251 1252 struct pipe_av1_enc_color_description 1253 { 1254 uint32_t color_primaries; 1255 uint32_t transfer_characteristics; 1256 uint32_t matrix_coefficients; 1257 uint32_t color_range; 1258 uint32_t chroma_sample_position; 1259 }; 1260 struct pipe_av1_enc_seq_param 1261 { 1262 uint32_t profile; 1263 uint32_t level; 1264 uint32_t tier; 1265 uint32_t num_temporal_layers; 1266 uint32_t intra_period; 1267 uint32_t ip_period; 1268 uint32_t bit_depth_minus8; 1269 uint32_t pic_width_in_luma_samples; 1270 uint32_t pic_height_in_luma_samples; 1271 struct 1272 { 1273 uint32_t use_128x128_superblock:1; 1274 uint32_t enable_filter_intra :1; 1275 uint32_t enable_intra_edge_filter :1; 1276 uint32_t enable_interintra_compound :1; 1277 uint32_t enable_masked_compound :1; 1278 uint32_t enable_warped_motion :1; 1279 uint32_t enable_dual_filter :1; 1280 uint32_t enable_cdef:1; 1281 uint32_t enable_restoration:1; 1282 uint32_t enable_superres:1; 1283 uint32_t enable_order_hint:1; 1284 uint32_t enable_jnt_comp:1; 1285 uint32_t color_description_present_flag:1; 1286 uint32_t enable_ref_frame_mvs:1; 1287 uint32_t frame_id_number_present_flag:1; 1288 uint32_t disable_screen_content_tools:1; 1289 uint32_t timing_info_present_flag:1; 1290 uint32_t equal_picture_interval:1; 1291 uint32_t decoder_model_info_present_flag:1; 1292 uint32_t force_screen_content_tools:2; 1293 uint32_t force_integer_mv:2; 1294 uint32_t initial_display_delay_present_flag:1; 1295 uint32_t choose_integer_mv:1; 1296 uint32_t still_picture:1; 1297 uint32_t reduced_still_picture_header:1; 1298 } seq_bits; 1299 1300 /* timing info params */ 1301 uint32_t num_units_in_display_tick; 1302 uint32_t time_scale; 1303 uint32_t num_tick_per_picture_minus1; 1304 uint32_t delta_frame_id_length; 1305 uint32_t additional_frame_id_length; 1306 uint32_t order_hint_bits; 1307 struct pipe_av1_enc_decoder_model_info decoder_model_info; 1308 struct pipe_av1_enc_color_description color_config; 1309 uint16_t frame_width_bits_minus1; 1310 uint16_t frame_height_bits_minus1; 1311 uint16_t operating_point_idc[32]; 1312 uint8_t seq_level_idx[32]; 1313 uint8_t seq_tier[32]; 1314 uint8_t decoder_model_present_for_this_op[32]; 1315 uint32_t decoder_buffer_delay[32]; 1316 uint32_t encoder_buffer_delay[32]; 1317 uint8_t low_delay_mode_flag[32]; 1318 uint8_t initial_display_delay_present_for_this_op[32]; 1319 uint8_t initial_display_delay_minus_1[32]; 1320 }; 1321 1322 struct pipe_av1_tile_group { 1323 uint8_t tile_group_start; 1324 uint8_t tile_group_end; 1325 }; 1326 1327 struct pipe_av1_enc_dpb_entry 1328 { 1329 uint32_t id; 1330 uint32_t order_hint; 1331 struct pipe_video_buffer *buffer; 1332 }; 1333 1334 struct pipe_av1_enc_picture_desc 1335 { 1336 struct pipe_picture_desc base; 1337 enum pipe_av1_enc_frame_type frame_type; 1338 struct pipe_av1_enc_seq_param seq; 1339 struct pipe_av1_enc_rate_control rc[4]; 1340 struct { 1341 uint32_t obu_extension_flag:1; 1342 uint32_t enable_frame_obu:1; 1343 uint32_t error_resilient_mode:1; 1344 uint32_t disable_cdf_update:1; 1345 uint32_t frame_size_override_flag:1; 1346 uint32_t allow_screen_content_tools:1; 1347 uint32_t allow_intrabc:1; 1348 uint32_t force_integer_mv:1; 1349 uint32_t disable_frame_end_update_cdf:1; 1350 uint32_t palette_mode_enable:1; 1351 uint32_t allow_high_precision_mv:1; 1352 uint32_t use_ref_frame_mvs; 1353 uint32_t show_existing_frame:1; 1354 uint32_t show_frame:1; 1355 uint32_t showable_frame:1; 1356 uint32_t enable_render_size:1; 1357 uint32_t use_superres:1; 1358 uint32_t reduced_tx_set:1; 1359 uint32_t skip_mode_present:1; 1360 uint32_t long_term_reference:1; 1361 uint32_t uniform_tile_spacing:1; 1362 uint32_t frame_refs_short_signaling:1; 1363 uint32_t is_motion_mode_switchable:1; 1364 }; 1365 struct pipe_enc_quality_modes quality_modes; 1366 struct pipe_enc_intra_refresh intra_refresh; 1367 struct pipe_enc_roi roi; 1368 uint32_t tile_rows; 1369 uint32_t tile_cols; 1370 unsigned num_tile_groups; 1371 struct pipe_av1_tile_group tile_groups[256]; 1372 uint32_t context_update_tile_id; 1373 uint16_t width_in_sbs_minus_1[63]; 1374 uint16_t height_in_sbs_minus_1[63]; 1375 uint32_t frame_num; 1376 uint32_t last_key_frame_num; 1377 uint32_t number_of_skips; 1378 uint32_t temporal_id; 1379 uint32_t spatial_id; 1380 uint16_t frame_width; 1381 uint16_t frame_height; 1382 uint16_t frame_width_sb; 1383 uint16_t frame_height_sb; 1384 uint16_t upscaled_width; 1385 uint16_t render_width_minus_1; 1386 uint16_t render_height_minus_1; 1387 uint32_t interpolation_filter; 1388 uint8_t tx_mode; 1389 uint8_t compound_reference_mode; 1390 uint32_t order_hint; 1391 uint8_t superres_scale_denominator; 1392 uint32_t primary_ref_frame; 1393 uint8_t refresh_frame_flags; 1394 uint8_t ref_frame_idx[7]; 1395 uint32_t delta_frame_id_minus_1[7]; 1396 uint32_t frame_presentation_time; 1397 uint32_t current_frame_id; 1398 uint32_t ref_order_hint[8]; 1399 uint8_t last_frame_idx; 1400 uint8_t gold_frame_idx; 1401 1402 struct { 1403 uint8_t cdef_damping_minus_3; 1404 uint8_t cdef_bits; 1405 uint8_t cdef_y_strengths[8]; 1406 uint8_t cdef_uv_strengths[8]; 1407 } cdef; 1408 1409 struct { 1410 uint8_t yframe_restoration_type; 1411 uint8_t cbframe_restoration_type; 1412 uint8_t crframe_restoration_type; 1413 uint8_t lr_unit_shift; 1414 uint8_t lr_uv_shift; 1415 } restoration; 1416 1417 struct { 1418 uint8_t filter_level[2]; 1419 uint8_t filter_level_u; 1420 uint8_t filter_level_v; 1421 uint8_t sharpness_level; 1422 uint8_t mode_ref_delta_enabled; 1423 uint8_t mode_ref_delta_update; 1424 int8_t ref_deltas[8]; 1425 int8_t mode_deltas[2]; 1426 uint8_t delta_lf_present; 1427 uint8_t delta_lf_res; 1428 uint8_t delta_lf_multi; 1429 } loop_filter; 1430 1431 struct { 1432 uint8_t base_qindex; 1433 int8_t y_dc_delta_q; 1434 int8_t u_dc_delta_q; 1435 int8_t u_ac_delta_q; 1436 int8_t v_dc_delta_q; 1437 int8_t v_ac_delta_q; 1438 uint8_t min_base_qindex; 1439 uint8_t max_base_qindex; 1440 uint8_t using_qmatrix; 1441 uint8_t qm_y; 1442 uint8_t qm_u; 1443 uint8_t qm_v; 1444 uint8_t delta_q_present; 1445 uint8_t delta_q_res; 1446 } quantization; 1447 1448 struct { 1449 uint8_t obu_extension_flag; 1450 uint8_t obu_has_size_field; 1451 uint8_t temporal_id; 1452 uint8_t spatial_id; 1453 } tg_obu_header; 1454 1455 enum pipe_video_feedback_metadata_type requested_metadata; 1456 1457 union { 1458 struct { 1459 uint32_t hdr_cll:1; 1460 uint32_t hdr_mdcv:1; 1461 }; 1462 uint32_t value; 1463 } metadata_flags; 1464 1465 struct pipe_enc_hdr_cll metadata_hdr_cll; 1466 struct pipe_enc_hdr_mdcv metadata_hdr_mdcv; 1467 1468 struct pipe_av1_enc_dpb_entry dpb[PIPE_AV1_MAX_DPB_SIZE + 1]; 1469 uint8_t dpb_size; 1470 uint8_t dpb_curr_pic; /* index in dpb */ 1471 uint8_t dpb_ref_frame_idx[PIPE_AV1_REFS_PER_FRAME]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 1472 uint8_t ref_list0[PIPE_AV1_REFS_PER_FRAME]; /* index in dpb_ref_frame_idx, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 1473 uint8_t ref_list1[PIPE_AV1_REFS_PER_FRAME]; /* index in dpb_ref_frame_idx, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 1474 1475 struct util_dynarray raw_headers; /* struct pipe_enc_raw_header */ 1476 }; 1477 1478 struct pipe_h265_sps 1479 { 1480 uint8_t chroma_format_idc; 1481 uint8_t separate_colour_plane_flag; 1482 uint32_t pic_width_in_luma_samples; 1483 uint32_t pic_height_in_luma_samples; 1484 uint8_t bit_depth_luma_minus8; 1485 uint8_t bit_depth_chroma_minus8; 1486 uint8_t log2_max_pic_order_cnt_lsb_minus4; 1487 uint8_t sps_max_dec_pic_buffering_minus1; 1488 uint8_t log2_min_luma_coding_block_size_minus3; 1489 uint8_t log2_diff_max_min_luma_coding_block_size; 1490 uint8_t log2_min_transform_block_size_minus2; 1491 uint8_t log2_diff_max_min_transform_block_size; 1492 uint8_t max_transform_hierarchy_depth_inter; 1493 uint8_t max_transform_hierarchy_depth_intra; 1494 uint8_t scaling_list_enabled_flag; 1495 uint8_t ScalingList4x4[6][16]; 1496 uint8_t ScalingList8x8[6][64]; 1497 uint8_t ScalingList16x16[6][64]; 1498 uint8_t ScalingList32x32[2][64]; 1499 uint8_t ScalingListDCCoeff16x16[6]; 1500 uint8_t ScalingListDCCoeff32x32[2]; 1501 uint8_t amp_enabled_flag; 1502 uint8_t sample_adaptive_offset_enabled_flag; 1503 uint8_t pcm_enabled_flag; 1504 uint8_t pcm_sample_bit_depth_luma_minus1; 1505 uint8_t pcm_sample_bit_depth_chroma_minus1; 1506 uint8_t log2_min_pcm_luma_coding_block_size_minus3; 1507 uint8_t log2_diff_max_min_pcm_luma_coding_block_size; 1508 uint8_t pcm_loop_filter_disabled_flag; 1509 uint8_t num_short_term_ref_pic_sets; 1510 uint8_t long_term_ref_pics_present_flag; 1511 uint8_t num_long_term_ref_pics_sps; 1512 uint8_t sps_temporal_mvp_enabled_flag; 1513 uint8_t strong_intra_smoothing_enabled_flag; 1514 uint8_t no_pic_reordering_flag; 1515 uint8_t no_bi_pred_flag; 1516 }; 1517 1518 struct pipe_h265_pps 1519 { 1520 struct pipe_h265_sps *sps; 1521 1522 uint8_t dependent_slice_segments_enabled_flag; 1523 uint8_t output_flag_present_flag; 1524 uint8_t num_extra_slice_header_bits; 1525 uint8_t sign_data_hiding_enabled_flag; 1526 uint8_t cabac_init_present_flag; 1527 uint8_t num_ref_idx_l0_default_active_minus1; 1528 uint8_t num_ref_idx_l1_default_active_minus1; 1529 int8_t init_qp_minus26; 1530 uint8_t constrained_intra_pred_flag; 1531 uint8_t transform_skip_enabled_flag; 1532 uint8_t cu_qp_delta_enabled_flag; 1533 uint8_t diff_cu_qp_delta_depth; 1534 int8_t pps_cb_qp_offset; 1535 int8_t pps_cr_qp_offset; 1536 uint8_t pps_slice_chroma_qp_offsets_present_flag; 1537 uint8_t weighted_pred_flag; 1538 uint8_t weighted_bipred_flag; 1539 uint8_t transquant_bypass_enabled_flag; 1540 uint8_t tiles_enabled_flag; 1541 uint8_t entropy_coding_sync_enabled_flag; 1542 uint8_t num_tile_columns_minus1; 1543 uint8_t num_tile_rows_minus1; 1544 uint8_t uniform_spacing_flag; 1545 uint16_t column_width_minus1[20]; 1546 uint16_t row_height_minus1[22]; 1547 uint8_t loop_filter_across_tiles_enabled_flag; 1548 uint8_t pps_loop_filter_across_slices_enabled_flag; 1549 uint8_t deblocking_filter_control_present_flag; 1550 uint8_t deblocking_filter_override_enabled_flag; 1551 uint8_t pps_deblocking_filter_disabled_flag; 1552 int8_t pps_beta_offset_div2; 1553 int8_t pps_tc_offset_div2; 1554 uint8_t lists_modification_present_flag; 1555 uint8_t log2_parallel_merge_level_minus2; 1556 uint8_t slice_segment_header_extension_present_flag; 1557 uint16_t st_rps_bits; 1558 }; 1559 1560 struct pipe_h265_picture_desc 1561 { 1562 struct pipe_picture_desc base; 1563 1564 struct pipe_h265_pps *pps; 1565 1566 uint8_t IDRPicFlag; 1567 uint8_t RAPPicFlag; 1568 /* 1569 When the current picture is an IRAP picture, IntraPicFlag shall be equal to 1. 1570 When the current picture is not an IRAP picture, the host software decoder is 1571 not required to determine whether all slices of the current picture are I slices 1572 – i.e. it may simply set IntraPicFlag to 0 in this case.... 1573 1574 Some frontends have IntraPicFlag defined (ie. VAPictureParameterBufferHEVC) 1575 and some others like VDPAU/OMX can derive it from RAPPicFlag 1576 */ 1577 uint8_t IntraPicFlag; 1578 uint8_t CurrRpsIdx; 1579 uint32_t NumPocTotalCurr; 1580 uint32_t NumDeltaPocsOfRefRpsIdx; 1581 uint32_t NumShortTermPictureSliceHeaderBits; 1582 uint32_t NumLongTermPictureSliceHeaderBits; 1583 1584 int32_t CurrPicOrderCntVal; 1585 struct pipe_video_buffer *ref[16]; 1586 int32_t PicOrderCntVal[16]; 1587 uint8_t IsLongTerm[16]; 1588 uint8_t NumPocStCurrBefore; 1589 uint8_t NumPocStCurrAfter; 1590 uint8_t NumPocLtCurr; 1591 uint8_t RefPicSetStCurrBefore[8]; 1592 uint8_t RefPicSetStCurrAfter[8]; 1593 uint8_t RefPicSetLtCurr[8]; 1594 uint8_t RefPicList[PIPE_H265_MAX_SLICES][2][15]; 1595 bool UseRefPicList; 1596 bool UseStRpsBits; 1597 1598 struct 1599 { 1600 bool slice_info_present; 1601 uint32_t slice_count; 1602 uint32_t slice_data_size[PIPE_H265_MAX_SLICES]; 1603 uint32_t slice_data_offset[PIPE_H265_MAX_SLICES]; 1604 enum pipe_slice_buffer_placement_type slice_data_flag[PIPE_H265_MAX_SLICES]; 1605 } slice_parameter; 1606 }; 1607 1608 struct pipe_mjpeg_picture_desc 1609 { 1610 struct pipe_picture_desc base; 1611 1612 struct 1613 { 1614 uint16_t picture_width; 1615 uint16_t picture_height; 1616 1617 struct { 1618 uint8_t component_id; 1619 uint8_t h_sampling_factor; 1620 uint8_t v_sampling_factor; 1621 uint8_t quantiser_table_selector; 1622 } components[255]; 1623 1624 uint8_t num_components; 1625 uint16_t crop_x; 1626 uint16_t crop_y; 1627 uint16_t crop_width; 1628 uint16_t crop_height; 1629 uint32_t sampling_factor; 1630 } picture_parameter; 1631 1632 struct 1633 { 1634 uint8_t load_quantiser_table[4]; 1635 uint8_t quantiser_table[4][64]; 1636 } quantization_table; 1637 1638 struct 1639 { 1640 uint8_t load_huffman_table[2]; 1641 1642 struct { 1643 uint8_t num_dc_codes[16]; 1644 uint8_t dc_values[12]; 1645 uint8_t num_ac_codes[16]; 1646 uint8_t ac_values[162]; 1647 uint8_t pad[2]; 1648 } table[2]; 1649 } huffman_table; 1650 1651 struct 1652 { 1653 unsigned slice_data_size; 1654 unsigned slice_data_offset; 1655 unsigned slice_data_flag; 1656 unsigned slice_horizontal_position; 1657 unsigned slice_vertical_position; 1658 1659 struct { 1660 uint8_t component_selector; 1661 uint8_t dc_table_selector; 1662 uint8_t ac_table_selector; 1663 } components[4]; 1664 1665 uint8_t num_components; 1666 1667 uint16_t restart_interval; 1668 unsigned num_mcus; 1669 } slice_parameter; 1670 }; 1671 1672 struct vp9_segment_parameter 1673 { 1674 struct { 1675 uint16_t segment_reference_enabled:1; 1676 uint16_t segment_reference:2; 1677 uint16_t segment_reference_skipped:1; 1678 } segment_flags; 1679 1680 bool alt_quant_enabled; 1681 int16_t alt_quant; 1682 1683 bool alt_lf_enabled; 1684 int16_t alt_lf; 1685 1686 uint8_t filter_level[4][2]; 1687 1688 int16_t luma_ac_quant_scale; 1689 int16_t luma_dc_quant_scale; 1690 1691 int16_t chroma_ac_quant_scale; 1692 int16_t chroma_dc_quant_scale; 1693 }; 1694 1695 struct pipe_vp9_picture_desc 1696 { 1697 struct pipe_picture_desc base; 1698 1699 struct pipe_video_buffer *ref[16]; 1700 1701 struct { 1702 uint16_t frame_width; 1703 uint16_t frame_height; 1704 uint16_t prev_frame_width; 1705 uint16_t prev_frame_height; 1706 1707 struct { 1708 uint32_t subsampling_x:1; 1709 uint32_t subsampling_y:1; 1710 uint32_t frame_type:1; 1711 uint32_t show_frame:1; 1712 uint32_t prev_show_frame:1; 1713 uint32_t error_resilient_mode:1; 1714 uint32_t intra_only:1; 1715 uint32_t allow_high_precision_mv:1; 1716 uint32_t mcomp_filter_type:3; 1717 uint32_t frame_parallel_decoding_mode:1; 1718 uint32_t reset_frame_context:2; 1719 uint32_t refresh_frame_context:1; 1720 uint32_t frame_context_idx:2; 1721 uint32_t segmentation_enabled:1; 1722 uint32_t segmentation_temporal_update:1; 1723 uint32_t segmentation_update_map:1; 1724 uint32_t last_ref_frame:3; 1725 uint32_t last_ref_frame_sign_bias:1; 1726 uint32_t golden_ref_frame:3; 1727 uint32_t golden_ref_frame_sign_bias:1; 1728 uint32_t alt_ref_frame:3; 1729 uint32_t alt_ref_frame_sign_bias:1; 1730 uint32_t lossless_flag:1; 1731 } pic_fields; 1732 1733 uint8_t filter_level; 1734 uint8_t sharpness_level; 1735 1736 uint8_t log2_tile_rows; 1737 uint8_t log2_tile_columns; 1738 1739 uint8_t frame_header_length_in_bytes; 1740 1741 uint16_t first_partition_size; 1742 1743 uint8_t mb_segment_tree_probs[7]; 1744 uint8_t segment_pred_probs[3]; 1745 1746 uint8_t profile; 1747 1748 uint8_t bit_depth; 1749 1750 bool mode_ref_delta_enabled; 1751 bool mode_ref_delta_update; 1752 1753 uint8_t base_qindex; 1754 int8_t y_dc_delta_q; 1755 int8_t uv_ac_delta_q; 1756 int8_t uv_dc_delta_q; 1757 uint8_t abs_delta; 1758 uint8_t ref_deltas[4]; 1759 uint8_t mode_deltas[2]; 1760 } picture_parameter; 1761 1762 struct { 1763 bool slice_info_present; 1764 uint32_t slice_count; 1765 uint32_t slice_data_size[128]; 1766 uint32_t slice_data_offset[128]; 1767 enum pipe_slice_buffer_placement_type slice_data_flag[128]; 1768 struct vp9_segment_parameter seg_param[8]; 1769 } slice_parameter; 1770 }; 1771 1772 struct pipe_av1_picture_desc 1773 { 1774 struct pipe_picture_desc base; 1775 1776 struct pipe_video_buffer *ref[16]; 1777 struct pipe_video_buffer *film_grain_target; 1778 struct { 1779 uint8_t profile; 1780 uint8_t order_hint_bits_minus_1; 1781 uint8_t bit_depth_idx; 1782 1783 struct { 1784 uint32_t use_128x128_superblock:1; 1785 uint32_t enable_filter_intra:1; 1786 uint32_t enable_intra_edge_filter:1; 1787 uint32_t enable_interintra_compound:1; 1788 uint32_t enable_masked_compound:1; 1789 uint32_t enable_dual_filter:1; 1790 uint32_t enable_order_hint:1; 1791 uint32_t enable_jnt_comp:1; 1792 uint32_t enable_cdef:1; 1793 uint32_t mono_chrome:1; 1794 uint32_t ref_frame_mvs:1; 1795 uint32_t film_grain_params_present:1; 1796 uint32_t subsampling_x:1; 1797 uint32_t subsampling_y:1; 1798 } seq_info_fields; 1799 1800 uint32_t current_frame_id; 1801 1802 uint16_t frame_width; 1803 uint16_t frame_height; 1804 uint16_t max_width; 1805 uint16_t max_height; 1806 1807 uint8_t ref_frame_idx[7]; 1808 uint8_t primary_ref_frame; 1809 uint8_t order_hint; 1810 1811 struct { 1812 struct { 1813 uint32_t enabled:1; 1814 uint32_t update_map:1; 1815 uint32_t update_data:1; 1816 uint32_t temporal_update:1; 1817 } segment_info_fields; 1818 1819 int16_t feature_data[8][8]; 1820 uint8_t feature_mask[8]; 1821 } seg_info; 1822 1823 struct { 1824 struct { 1825 uint32_t apply_grain:1; 1826 uint32_t chroma_scaling_from_luma:1; 1827 uint32_t grain_scaling_minus_8:2; 1828 uint32_t ar_coeff_lag:2; 1829 uint32_t ar_coeff_shift_minus_6:2; 1830 uint32_t grain_scale_shift:2; 1831 uint32_t overlap_flag:1; 1832 uint32_t clip_to_restricted_range:1; 1833 } film_grain_info_fields; 1834 1835 uint16_t grain_seed; 1836 uint8_t num_y_points; 1837 uint8_t point_y_value[14]; 1838 uint8_t point_y_scaling[14]; 1839 uint8_t num_cb_points; 1840 uint8_t point_cb_value[10]; 1841 uint8_t point_cb_scaling[10]; 1842 uint8_t num_cr_points; 1843 uint8_t point_cr_value[10]; 1844 uint8_t point_cr_scaling[10]; 1845 int8_t ar_coeffs_y[24]; 1846 int8_t ar_coeffs_cb[25]; 1847 int8_t ar_coeffs_cr[25]; 1848 uint8_t cb_mult; 1849 uint8_t cb_luma_mult; 1850 uint16_t cb_offset; 1851 uint8_t cr_mult; 1852 uint8_t cr_luma_mult; 1853 uint16_t cr_offset; 1854 } film_grain_info; 1855 1856 uint8_t tile_cols; 1857 uint8_t tile_rows; 1858 uint32_t tile_col_start_sb[65]; 1859 uint32_t tile_row_start_sb[65]; 1860 uint16_t width_in_sbs[64]; 1861 uint16_t height_in_sbs[64]; 1862 uint16_t context_update_tile_id; 1863 1864 struct { 1865 uint32_t frame_type:2; 1866 uint32_t show_frame:1; 1867 uint32_t showable_frame:1; 1868 uint32_t error_resilient_mode:1; 1869 uint32_t disable_cdf_update:1; 1870 uint32_t allow_screen_content_tools:1; 1871 uint32_t force_integer_mv:1; 1872 uint32_t allow_intrabc:1; 1873 uint32_t use_superres:1; 1874 uint32_t allow_high_precision_mv:1; 1875 uint32_t is_motion_mode_switchable:1; 1876 uint32_t use_ref_frame_mvs:1; 1877 uint32_t disable_frame_end_update_cdf:1; 1878 uint32_t uniform_tile_spacing_flag:1; 1879 uint32_t allow_warped_motion:1; 1880 uint32_t large_scale_tile:1; 1881 } pic_info_fields; 1882 1883 uint8_t superres_scale_denominator; 1884 1885 uint8_t interp_filter; 1886 uint8_t filter_level[2]; 1887 uint8_t filter_level_u; 1888 uint8_t filter_level_v; 1889 struct { 1890 uint8_t sharpness_level:3; 1891 uint8_t mode_ref_delta_enabled:1; 1892 uint8_t mode_ref_delta_update:1; 1893 } loop_filter_info_fields; 1894 1895 int8_t ref_deltas[8]; 1896 int8_t mode_deltas[2]; 1897 1898 uint8_t base_qindex; 1899 int8_t y_dc_delta_q; 1900 int8_t u_dc_delta_q; 1901 int8_t u_ac_delta_q; 1902 int8_t v_dc_delta_q; 1903 int8_t v_ac_delta_q; 1904 1905 struct { 1906 uint16_t using_qmatrix:1; 1907 uint16_t qm_y:4; 1908 uint16_t qm_u:4; 1909 uint16_t qm_v:4; 1910 } qmatrix_fields; 1911 1912 struct { 1913 uint32_t delta_q_present_flag:1; 1914 uint32_t log2_delta_q_res:2; 1915 uint32_t delta_lf_present_flag:1; 1916 uint32_t log2_delta_lf_res:2; 1917 uint32_t delta_lf_multi:1; 1918 uint32_t tx_mode:2; 1919 uint32_t reference_select:1; 1920 uint32_t reduced_tx_set_used:1; 1921 uint32_t skip_mode_present:1; 1922 } mode_control_fields; 1923 1924 uint8_t cdef_damping_minus_3; 1925 uint8_t cdef_bits; 1926 uint8_t cdef_y_strengths[8]; 1927 uint8_t cdef_uv_strengths[8]; 1928 1929 struct { 1930 uint16_t yframe_restoration_type:2; 1931 uint16_t cbframe_restoration_type:2; 1932 uint16_t crframe_restoration_type:2; 1933 uint16_t lr_unit_shift:2; 1934 uint16_t lr_uv_shift:1; 1935 } loop_restoration_fields; 1936 1937 uint16_t lr_unit_size[3]; 1938 1939 struct { 1940 uint32_t wmtype; 1941 uint8_t invalid; 1942 int32_t wmmat[8]; 1943 } wm[7]; 1944 1945 uint32_t refresh_frame_flags; 1946 uint8_t matrix_coefficients; 1947 } picture_parameter; 1948 1949 struct { 1950 uint32_t slice_data_size[256]; 1951 uint32_t slice_data_offset[256]; 1952 uint16_t slice_data_row[256]; 1953 uint16_t slice_data_col[256]; 1954 uint8_t slice_data_anchor_frame_idx[256]; 1955 uint16_t slice_count; 1956 } slice_parameter; 1957 }; 1958 1959 struct pipe_vpp_blend 1960 { 1961 enum pipe_video_vpp_blend_mode mode; 1962 /* To be used with PIPE_VIDEO_VPP_BLEND_MODE_GLOBAL_ALPHA */ 1963 float global_alpha; 1964 }; 1965 1966 struct pipe_vpp_desc 1967 { 1968 struct pipe_picture_desc base; 1969 struct u_rect src_region; 1970 struct u_rect dst_region; 1971 enum pipe_video_vpp_orientation orientation; 1972 struct pipe_vpp_blend blend; 1973 1974 /* Fence to wait on for the src surface */ 1975 struct pipe_fence_handle *src_surface_fence; 1976 1977 uint32_t background_color; 1978 enum pipe_video_vpp_color_standard_type in_colors_standard; 1979 enum pipe_video_vpp_color_range in_color_range; 1980 enum pipe_video_vpp_chroma_siting in_chroma_siting; 1981 enum pipe_video_vpp_color_standard_type out_colors_standard; 1982 enum pipe_video_vpp_color_range out_color_range; 1983 enum pipe_video_vpp_chroma_siting out_chroma_siting; 1984 1985 enum pipe_video_vpp_color_primaries in_color_primaries; 1986 enum pipe_video_vpp_transfer_characteristic in_transfer_characteristics; 1987 enum pipe_video_vpp_matrix_coefficients in_matrix_coefficients; 1988 1989 enum pipe_video_vpp_color_primaries out_color_primaries; 1990 enum pipe_video_vpp_transfer_characteristic out_transfer_characteristics; 1991 enum pipe_video_vpp_matrix_coefficients out_matrix_coefficients; 1992 }; 1993 1994 1995 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_PREDICTION_DIRECTION */ 1996 enum pipe_h265_enc_pred_direction 1997 { 1998 /* No restrictions*/ 1999 PIPE_H265_PRED_DIRECTION_ALL = 0x0, 2000 /* P Frame*/ 2001 PIPE_H265_PRED_DIRECTION_PREVIOUS = 0x1, 2002 /* Same reference lists for B Frame*/ 2003 PIPE_H265_PRED_DIRECTION_FUTURE = 0x2, 2004 /* Low delay B frames */ 2005 PIPE_H265_PRED_DIRECTION_BI_NOT_EMPTY = 0x4, 2006 }; 2007 2008 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_FEATURE_FLAGS 2009 the config_supported bit is used to differenciate a supported 2010 config with all bits as zero and unsupported by driver with value=0 2011 */ 2012 union pipe_h265_enc_cap_features { 2013 struct { 2014 /** Separate colour planes. 2015 * 2016 * Allows setting separate_colour_plane_flag in the SPS. 2017 */ 2018 uint32_t separate_colour_planes : 2; 2019 /** Scaling lists. 2020 * 2021 * Allows scaling_list() elements to be present in both the SPS 2022 * and the PPS. The decoded form of the scaling lists must also 2023 * be supplied in a VAQMatrixBufferHEVC buffer when scaling lists 2024 * are enabled. 2025 */ 2026 uint32_t scaling_lists : 2; 2027 /** Asymmetric motion partitions. 2028 * 2029 * Allows setting amp_enabled_flag in the SPS. 2030 */ 2031 uint32_t amp : 2; 2032 /** Sample adaptive offset filter. 2033 * 2034 * Allows setting slice_sao_luma_flag and slice_sao_chroma_flag 2035 * in slice headers. 2036 */ 2037 uint32_t sao : 2; 2038 /** PCM sample blocks. 2039 * 2040 * Allows setting pcm_enabled_flag in the SPS. When enabled 2041 * PCM parameters must be supplied with the sequence parameters, 2042 * including block sizes which may be further constrained as 2043 * noted in the VAConfigAttribEncHEVCBlockSizes attribute. 2044 */ 2045 uint32_t pcm : 2; 2046 /** Temporal motion vector Prediction. 2047 * 2048 * Allows setting slice_temporal_mvp_enabled_flag in slice 2049 * headers. 2050 */ 2051 uint32_t temporal_mvp : 2; 2052 /** Strong intra smoothing. 2053 * 2054 * Allows setting strong_intra_smoothing_enabled_flag in the SPS. 2055 */ 2056 uint32_t strong_intra_smoothing : 2; 2057 /** Dependent slices. 2058 * 2059 * Allows setting dependent_slice_segment_flag in slice headers. 2060 */ 2061 uint32_t dependent_slices : 2; 2062 /** Sign data hiding. 2063 * 2064 * Allows setting sign_data_hiding_enable_flag in the PPS. 2065 */ 2066 uint32_t sign_data_hiding : 2; 2067 /** Constrained intra prediction. 2068 * 2069 * Allows setting constrained_intra_pred_flag in the PPS. 2070 */ 2071 uint32_t constrained_intra_pred : 2; 2072 /** Transform skipping. 2073 * 2074 * Allows setting transform_skip_enabled_flag in the PPS. 2075 */ 2076 uint32_t transform_skip : 2; 2077 /** QP delta within coding units. 2078 * 2079 * Allows setting cu_qp_delta_enabled_flag in the PPS. 2080 */ 2081 uint32_t cu_qp_delta : 2; 2082 /** Weighted prediction. 2083 * 2084 * Allows setting weighted_pred_flag and weighted_bipred_flag in 2085 * the PPS. The pred_weight_table() data must be supplied with 2086 * every slice header when weighted prediction is enabled. 2087 */ 2088 uint32_t weighted_prediction : 2; 2089 /** Transform and quantisation bypass. 2090 * 2091 * Allows setting transquant_bypass_enabled_flag in the PPS. 2092 */ 2093 uint32_t transquant_bypass : 2; 2094 /** Deblocking filter disable. 2095 * 2096 * Allows setting slice_deblocking_filter_disabled_flag. 2097 */ 2098 uint32_t deblocking_filter_disable : 2; 2099 /** Flag indicating this is a supported configuration 2100 * 2101 * It could be possible all the bits above are set to zero 2102 * and this is a valid configuration, so we distinguish 2103 * between get_video_param returning 0 for no support 2104 * and this case with this bit flag. 2105 */ 2106 uint32_t config_supported : 1; 2107 } bits; 2108 uint32_t value; 2109 }; 2110 2111 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_BLOCK_SIZES 2112 the config_supported bit is used to differenciate a supported 2113 config with all bits as zero and unsupported by driver with value=0 */ 2114 union pipe_h265_enc_cap_block_sizes { 2115 struct { 2116 /** Largest supported size of coding tree blocks. 2117 * 2118 * CtbLog2SizeY must not be larger than this. 2119 */ 2120 uint32_t log2_max_coding_tree_block_size_minus3 : 2; 2121 /** Smallest supported size of coding tree blocks. 2122 * 2123 * CtbLog2SizeY must not be smaller than this. 2124 * 2125 * This may be the same as the maximum size, indicating that only 2126 * one CTB size is supported. 2127 */ 2128 uint32_t log2_min_coding_tree_block_size_minus3 : 2; 2129 2130 /** Smallest supported size of luma coding blocks. 2131 * 2132 * MinCbLog2SizeY must not be smaller than this. 2133 */ 2134 uint32_t log2_min_luma_coding_block_size_minus3 : 2; 2135 2136 /** Largest supported size of luma transform blocks. 2137 * 2138 * MaxTbLog2SizeY must not be larger than this. 2139 */ 2140 uint32_t log2_max_luma_transform_block_size_minus2 : 2; 2141 /** Smallest supported size of luma transform blocks. 2142 * 2143 * MinTbLog2SizeY must not be smaller than this. 2144 */ 2145 uint32_t log2_min_luma_transform_block_size_minus2 : 2; 2146 2147 /** Largest supported transform hierarchy depth in inter 2148 * coding units. 2149 * 2150 * max_transform_hierarchy_depth_inter must not be larger 2151 * than this. 2152 */ 2153 uint32_t max_max_transform_hierarchy_depth_inter : 2; 2154 /** Smallest supported transform hierarchy depth in inter 2155 * coding units. 2156 * 2157 * max_transform_hierarchy_depth_inter must not be smaller 2158 * than this. 2159 */ 2160 uint32_t min_max_transform_hierarchy_depth_inter : 2; 2161 2162 /** Largest supported transform hierarchy depth in intra 2163 * coding units. 2164 * 2165 * max_transform_hierarchy_depth_intra must not be larger 2166 * than this. 2167 */ 2168 uint32_t max_max_transform_hierarchy_depth_intra : 2; 2169 /** Smallest supported transform hierarchy depth in intra 2170 * coding units. 2171 * 2172 * max_transform_hierarchy_depth_intra must not be smaller 2173 * than this. 2174 */ 2175 uint32_t min_max_transform_hierarchy_depth_intra : 2; 2176 2177 /** Largest supported size of PCM coding blocks. 2178 * 2179 * Log2MaxIpcmCbSizeY must not be larger than this. 2180 */ 2181 uint32_t log2_max_pcm_coding_block_size_minus3 : 2; 2182 /** Smallest supported size of PCM coding blocks. 2183 * 2184 * Log2MinIpcmCbSizeY must not be smaller than this. 2185 */ 2186 uint32_t log2_min_pcm_coding_block_size_minus3 : 2; 2187 /** Flag indicating this is a supported configuration 2188 * 2189 * It could be possible all the bits above are set to zero 2190 * and this is a valid configuration, so we distinguish 2191 * between get_video_param returning 0 for no support 2192 * and this case with this bit flag. 2193 */ 2194 uint32_t config_supported : 1; 2195 } bits; 2196 uint32_t value; 2197 }; 2198 2199 union pipe_av1_enc_cap_features { 2200 struct { 2201 /** 2202 * Use 128x128 superblock. 2203 * 2204 * Allows setting use_128x128_superblock in the SPS. 2205 */ 2206 uint32_t support_128x128_superblock : 2; 2207 /** 2208 * Intra filter. 2209 * Allows setting enable_filter_intra in the SPS. 2210 */ 2211 uint32_t support_filter_intra : 2; 2212 /** 2213 * Intra edge filter. 2214 * Allows setting enable_intra_edge_filter in the SPS. 2215 */ 2216 uint32_t support_intra_edge_filter : 2; 2217 /** 2218 * Interintra compound. 2219 * Allows setting enable_interintra_compound in the SPS. 2220 */ 2221 uint32_t support_interintra_compound : 2; 2222 /** 2223 * Masked compound. 2224 * Allows setting enable_masked_compound in the SPS. 2225 */ 2226 uint32_t support_masked_compound : 2; 2227 /** 2228 * Warped motion. 2229 * Allows setting enable_warped_motion in the SPS. 2230 */ 2231 uint32_t support_warped_motion : 2; 2232 /** 2233 * Palette mode. 2234 * Allows setting palette_mode in the PPS. 2235 */ 2236 uint32_t support_palette_mode : 2; 2237 /** 2238 * Dual filter. 2239 * Allows setting enable_dual_filter in the SPS. 2240 */ 2241 uint32_t support_dual_filter : 2; 2242 /** 2243 * Jnt compound. 2244 * Allows setting enable_jnt_comp in the SPS. 2245 */ 2246 uint32_t support_jnt_comp : 2; 2247 /** 2248 * Refrence frame mvs. 2249 * Allows setting enable_ref_frame_mvs in the SPS. 2250 */ 2251 uint32_t support_ref_frame_mvs : 2; 2252 /** 2253 * Super resolution. 2254 * Allows setting enable_superres in the SPS. 2255 */ 2256 uint32_t support_superres : 2; 2257 /** 2258 * Restoration. 2259 * Allows setting enable_restoration in the SPS. 2260 */ 2261 uint32_t support_restoration : 2; 2262 /** 2263 * Allow intraBC. 2264 * Allows setting allow_intrabc in the PPS. 2265 */ 2266 uint32_t support_allow_intrabc : 2; 2267 /** 2268 * Cdef channel strength. 2269 * Allows setting cdef_y_strengths and cdef_uv_strengths in PPS. 2270 */ 2271 uint32_t support_cdef_channel_strength : 2; 2272 /** Reserved bits for future, must be zero. */ 2273 uint32_t reserved : 4; 2274 } bits; 2275 uint32_t value; 2276 }; 2277 2278 union pipe_av1_enc_cap_features_ext1 { 2279 struct { 2280 /** 2281 * Fields indicate which types of interpolation filter are supported. 2282 * (interpolation_filter & 0x01) == 1: eight_tap filter is supported, 0: not. 2283 * (interpolation_filter & 0x02) == 1: eight_tap_smooth filter is supported, 0: not. 2284 * (interpolation_filter & 0x04) == 1: eight_sharp filter is supported, 0: not. 2285 * (interpolation_filter & 0x08) == 1: bilinear filter is supported, 0: not. 2286 * (interpolation_filter & 0x10) == 1: switchable filter is supported, 0: not. 2287 */ 2288 uint32_t interpolation_filter : 5; 2289 /** 2290 * Min segmentId block size accepted. 2291 * Application need to send seg_id_block_size in PPS equal or larger than this value. 2292 */ 2293 uint32_t min_segid_block_size_accepted : 8; 2294 /** 2295 * Type of segment feature supported. 2296 * (segment_feature_support & 0x01) == 1: SEG_LVL_ALT_Q is supported, 0: not. 2297 * (segment_feature_support & 0x02) == 1: SEG_LVL_ALT_LF_Y_V is supported, 0: not. 2298 * (segment_feature_support & 0x04) == 1: SEG_LVL_ALT_LF_Y_H is supported, 0: not. 2299 * (segment_feature_support & 0x08) == 1: SEG_LVL_ALT_LF_U is supported, 0: not. 2300 * (segment_feature_support & 0x10) == 1: SEG_LVL_ALT_LF_V is supported, 0: not. 2301 * (segment_feature_support & 0x20) == 1: SEG_LVL_REF_FRAME is supported, 0: not. 2302 * (segment_feature_support & 0x40) == 1: SEG_LVL_SKIP is supported, 0: not. 2303 * (segment_feature_support & 0x80) == 1: SEG_LVL_GLOBALMV is supported, 0: not. 2304 */ 2305 uint32_t segment_feature_support : 8; 2306 /** Reserved bits for future, must be zero. */ 2307 uint32_t reserved : 11; 2308 } bits; 2309 uint32_t value; 2310 }; 2311 2312 union pipe_av1_enc_cap_features_ext2 { 2313 struct { 2314 /** 2315 * Tile size bytes minus1. 2316 * Specify the number of bytes needed to code tile size supported. 2317 * This value need to be set in frame header obu. 2318 */ 2319 uint32_t tile_size_bytes_minus1 : 2; 2320 /** 2321 * Tile size bytes minus1. 2322 * Specify the fixed number of bytes needed to code syntax obu_size. 2323 */ 2324 uint32_t obu_size_bytes_minus1 : 2; 2325 /** 2326 * tx_mode supported. 2327 * (tx_mode_support & 0x01) == 1: ONLY_4X4 is supported, 0: not. 2328 * (tx_mode_support & 0x02) == 1: TX_MODE_LARGEST is supported, 0: not. 2329 * (tx_mode_support & 0x04) == 1: TX_MODE_SELECT is supported, 0: not. 2330 */ 2331 uint32_t tx_mode_support : 3; 2332 /** 2333 * Max tile num minus1. 2334 * Specify the max number of tile supported by driver. 2335 */ 2336 uint32_t max_tile_num_minus1 : 13; 2337 /** Reserved bits for future, must be zero. */ 2338 uint32_t reserved : 12; 2339 } bits; 2340 uint32_t value; 2341 }; 2342 2343 struct codec_unit_location_t 2344 { 2345 uint64_t offset; 2346 uint64_t size; 2347 enum codec_unit_location_flags flags; 2348 }; 2349 2350 struct pipe_enc_feedback_metadata 2351 { 2352 /* 2353 * Driver writes the metadata types present in this struct 2354 */ 2355 enum pipe_video_feedback_metadata_type present_metadata; 2356 2357 /* 2358 * Driver writes the result of encoding the associated frame. 2359 * Requires PIPE_VIDEO_FEEDBACK_METADATA_TYPE_ENCODE_RESULT 2360 */ 2361 enum pipe_video_feedback_encode_result_flags encode_result; 2362 2363 /* 2364 * Driver fills in with coded headers information 2365 * and a number codec_unit_metadata_count of valid entries 2366 * Requires PIPE_VIDEO_FEEDBACK_METADATA_TYPE_CODEC_UNIT_LOCATION 2367 */ 2368 struct codec_unit_location_t codec_unit_metadata[256]; 2369 unsigned codec_unit_metadata_count; 2370 2371 /* 2372 * Driver writes the average QP used to encode this frame 2373 */ 2374 unsigned int average_frame_qp; 2375 }; 2376 2377 union pipe_enc_cap_roi { 2378 struct { 2379 /** 2380 * The number of ROI regions supported, 0 if ROI is not supported 2381 */ 2382 uint32_t num_roi_regions : 8; 2383 /** 2384 * A flag indicates whether ROI priority is supported 2385 * 2386 * roi_rc_priority_support equal to 1 specifies the underlying driver supports 2387 * ROI priority when VAConfigAttribRateControl != VA_RC_CQP, user can use roi_value 2388 * in #VAEncROI to set ROI priority. roi_rc_priority_support equal to 0 specifies 2389 * the underlying driver doesn't support ROI priority. 2390 * 2391 * User should ignore roi_rc_priority_support when VAConfigAttribRateControl == VA_RC_CQP 2392 * because ROI delta QP is always required when VAConfigAttribRateControl == VA_RC_CQP. 2393 */ 2394 uint32_t roi_rc_priority_support : 1; 2395 /** 2396 * A flag indicates whether ROI delta QP is supported 2397 * 2398 * roi_rc_qp_delta_support equal to 1 specifies the underlying driver supports 2399 * ROI delta QP when VAConfigAttribRateControl != VA_RC_CQP, user can use roi_value 2400 * in #VAEncROI to set ROI delta QP. roi_rc_qp_delta_support equal to 0 specifies 2401 * the underlying driver doesn't support ROI delta QP. 2402 * 2403 * User should ignore roi_rc_qp_delta_support when VAConfigAttribRateControl == VA_RC_CQP 2404 * because ROI delta QP is always required when VAConfigAttribRateControl == VA_RC_CQP. 2405 */ 2406 uint32_t roi_rc_qp_delta_support : 1; 2407 uint32_t reserved : 22; 2408 2409 } bits; 2410 uint32_t value; 2411 }; 2412 2413 union pipe_enc_cap_surface_alignment { 2414 struct { 2415 /** 2416 * log2_width_alignment 2417 */ 2418 uint32_t log2_width_alignment : 4; 2419 /** 2420 * log2_height_alignment 2421 */ 2422 uint32_t log2_height_alignment : 4; 2423 uint32_t reserved : 24; 2424 } bits; 2425 uint32_t value; 2426 }; 2427 2428 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_RANGE_EXTENSION_SUPPORT */ 2429 union pipe_h265_enc_cap_range_extension { 2430 struct { 2431 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with diff_cu_chroma_qp_offset_depth. 2432 * Codec valid range for support for diff_cu_chroma_qp_offset_depth is [0, 3]. 2433 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2434 * supported_diff_cu_chroma_qp_offset_depth_values |= (1 << value) 2435 */ 2436 uint32_t supported_diff_cu_chroma_qp_offset_depth_values: 4; 2437 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with log2_sao_offset_scale_luma. 2438 * Codec valid range for support for log2_sao_offset_scale_luma is [0, 6]. 2439 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2440 * supported_log2_sao_offset_scale_luma_values |= (1 << value) 2441 */ 2442 uint32_t supported_log2_sao_offset_scale_luma_values: 7; 2443 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with log2_sao_offset_scale_chroma. 2444 * Codec valid range for support for log2_sao_offset_scale_chroma is [0, 6]. 2445 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2446 * supported_log2_sao_offset_scale_chroma_values |= (1 << value) 2447 */ 2448 uint32_t supported_log2_sao_offset_scale_chroma_values: 7; 2449 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with log2_max_transform_skip_block_size_minus2. 2450 * Codec valid range for support for log2_max_transform_skip_block_size_minus2 is [0, 3]. 2451 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2452 * supported_log2_max_transform_skip_block_size_minus2_values |= (1 << value) 2453 */ 2454 uint32_t supported_log2_max_transform_skip_block_size_minus2_values: 6; 2455 /* Driver output.The minimum value allowed to be configured when encoding with chroma_qp_offset_list_len_minus1. 2456 * Codec valid range for support for chroma_qp_offset_list_len_minus1 is [0, 5]. 2457 */ 2458 uint32_t min_chroma_qp_offset_list_len_minus1_values: 3; 2459 /* Driver output.The maximum value allowed to be configured when encoding with chroma_qp_offset_list_len_minus1. 2460 * Codec valid range for support for chroma_qp_offset_list_len_minus1 is [0, 5]. 2461 */ 2462 uint32_t max_chroma_qp_offset_list_len_minus1_values: 3; 2463 } bits; 2464 uint32_t value; 2465 }; 2466 2467 union pipe_h265_enc_cap_range_extension_flags { 2468 struct { 2469 /* 2470 * Driver Output. Indicates pipe_enc_feature values for setting transform_skip_rotation_enabled_flag 2471 */ 2472 uint32_t supports_transform_skip_rotation_enabled_flag: 2; 2473 /* 2474 * Driver Output. Indicates pipe_enc_feature values for setting transform_skip_context_enabled_flag 2475 */ 2476 uint32_t supports_transform_skip_context_enabled_flag: 2; 2477 /* 2478 * Driver Output. Indicates pipe_enc_feature values for setting implicit_rdpcm_enabled_flag 2479 */ 2480 uint32_t supports_implicit_rdpcm_enabled_flag: 2; 2481 /* 2482 * Driver Output. Indicates pipe_enc_feature values for setting explicit_rdpcm_enabled_flag 2483 */ 2484 uint32_t supports_explicit_rdpcm_enabled_flag: 2; 2485 /* 2486 * Driver Output. Indicates pipe_enc_feature values for setting extended_precision_processing_flag 2487 */ 2488 uint32_t supports_extended_precision_processing_flag: 2; 2489 /* 2490 * Driver Output. Indicates pipe_enc_feature values for setting intra_smoothing_disabled_flag 2491 */ 2492 uint32_t supports_intra_smoothing_disabled_flag: 2; 2493 /* 2494 * Driver Output. Indicates pipe_enc_feature values for setting high_precision_offsets_enabled_flag 2495 */ 2496 uint32_t supports_high_precision_offsets_enabled_flag: 2; 2497 /* 2498 * Driver Output. Indicates pipe_enc_feature values for setting persistent_rice_adaptation_enabled_flag 2499 */ 2500 uint32_t supports_persistent_rice_adaptation_enabled_flag: 2; 2501 /* 2502 * Driver Output. Indicates pipe_enc_feature values for setting cabac_bypass_alignment_enabled_flag 2503 */ 2504 uint32_t supports_cabac_bypass_alignment_enabled_flag: 2; 2505 /* 2506 * Driver Output. Indicates pipe_enc_feature values for setting cross_component_prediction_enabled_flag 2507 */ 2508 uint32_t supports_cross_component_prediction_enabled_flag: 2; 2509 /* 2510 * Driver Output. Indicates pipe_enc_feature values for setting chroma_qp_offset_list_enabled_flag 2511 */ 2512 uint32_t supports_chroma_qp_offset_list_enabled_flag: 2; 2513 } bits; 2514 uint32_t value; 2515 }; 2516 2517 #ifdef __cplusplus 2518 } 2519 #endif 2520 2521 #endif /* PIPE_VIDEO_STATE_H */ 2522