| D | si_build_pm4.h | 60 #define radeon_set_reg_seq(reg, num, idx, prefix_name, packet, reset_filter_cam) do { \ argument
66 #define radeon_set_reg(reg, idx, value, prefix_name, packet) do { \ argument
71 #define radeon_opt_set_reg(reg, reg_enum, idx, value, prefix_name, packet) do { \ argument
82 #define radeon_opt_set_reg2(reg, reg_enum, v1, v2, prefix_name, packet) do { \ argument
98 #define radeon_opt_set_reg3(reg, reg_enum, v1, v2, v3, prefix_name, packet) do { \ argument
117 #define radeon_opt_set_reg4(reg, reg_enum, v1, v2, v3, v4, prefix_name, packet) do { \ argument
139 #define radeon_opt_set_reg5(reg, reg_enum, v1, v2, v3, v4, v5, prefix_name, packet) do { \ argument
164 #define radeon_opt_set_reg6(reg, reg_enum, v1, v2, v3, v4, v5, v6, prefix_name, packet) do { \ argument
192 #define radeon_opt_set_regn(reg, values, saved_values, num, prefix_name, packet) do { \ argument
303 #define gfx11_push_reg(reg, value, prefix_name, buffer, reg_count) do { \ argument
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