| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64.h | 401 void FMAddS(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FMAddS()
404 void FMAddD(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FMAddD()
407 void FMSubS(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FMSubS()
410 void FMSubD(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FMSubD()
413 void FNMSubS(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FNMSubS()
416 void FNMSubD(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FNMSubD()
419 void FNMAddS(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FNMAddS()
422 void FNMAddD(FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3) { in FNMAddD()
451 void FAddS(FRegister rd, FRegister rs1, FRegister rs2) { in FAddS()
454 void FAddD(FRegister rd, FRegister rs1, FRegister rs2) { in FAddD()
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| D | assembler_riscv64.cc | 70 void Riscv64Assembler::Lui(XRegister rd, uint32_t imm20) { in Lui()
81 void Riscv64Assembler::Auipc(XRegister rd, uint32_t imm20) { in Auipc()
87 void Riscv64Assembler::Jal(XRegister rd, int32_t offset) { in Jal()
99 void Riscv64Assembler::Jalr(XRegister rd, XRegister rs1, int32_t offset) { in Jalr()
161 void Riscv64Assembler::Lb(XRegister rd, XRegister rs1, int32_t offset) { in Lb()
166 void Riscv64Assembler::Lh(XRegister rd, XRegister rs1, int32_t offset) { in Lh()
179 void Riscv64Assembler::Lw(XRegister rd, XRegister rs1, int32_t offset) { in Lw()
195 void Riscv64Assembler::Ld(XRegister rd, XRegister rs1, int32_t offset) { in Ld()
211 void Riscv64Assembler::Lbu(XRegister rd, XRegister rs1, int32_t offset) { in Lbu()
224 void Riscv64Assembler::Lhu(XRegister rd, XRegister rs1, int32_t offset) { in Lhu()
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| D | assembler_riscv64_test.cc | 366 std::string rd = GetRegisterName(reg); in TestLoadConst64() local
833 return [=](XRegister rd, const std::string& target) { in GetPrintJalRd()
840 return [=](XRegister rd, const std::string& target) { in GetPrintCallRd()
982 for (XRegister rd : GetRegisters()) { in TestAddConst() local
1110 for (XRegister rd : GetRegisters()) { in TestLoadStoreArbitraryOffset() local
1134 for (FRegister rd : GetFPRegisters()) { in TestFPLoadStoreArbitraryOffset() local
1147 auto print_load = [&](const std::string& load, XRegister rd, const std::string& label) { in TestLoadLiteral()
1164 auto print_fp_load = [&](const std::string& load, FRegister rd, const std::string& label) { in TestLoadLiteral()
8315 [&](XRegister rd, int64_t value) { __ Li(rd, value); }); in TEST_F()
8637 "Csrr", "csrr {reg}, {csr}", [&](uint32_t csr, XRegister rd) { __ Csrr(rd, csr); }); in TEST_F()
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| /art/compiler/utils/arm/ |
| D | assembler_arm_vixl.h | 140 void Rrx(vixl32::Register rd, vixl32::Register rn) { in Rrx()
145 void Mul(vixl32::Register rd, vixl32::Register rn, vixl32::Register rm) { in Mul()
152 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { in Add()
169 void Vmov(vixl32::DRegister rd, double imm) { in Vmov()
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| D | assembler_arm_vixl.cc | 97 void ArmVIXLAssembler::LoadImmediate(vixl32::Register rd, int32_t value) { in LoadImmediate()
411 void ArmVIXLAssembler::AddConstant(vixl32::Register rd, int32_t value) { in AddConstant()
416 void ArmVIXLAssembler::AddConstant(vixl32::Register rd, in AddConstant()
431 void ArmVIXLAssembler::AddConstantInIt(vixl32::Register rd, in AddConstantInIt()
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| /art/disassembler/ |
| D | disassembler_riscv64.cc | 389 uint32_t rd = GetRd(insn32); in Print32Jal() local
411 uint32_t rd = GetRd(insn32); in Print32Jalr() local
636 const char* rd = nullptr; in Print32FLoad() local
712 uint32_t rd = GetRd(insn32); in Print32BinOpImm() local
783 uint32_t rd = GetRd(insn32); in Print32BinOp() local
866 uint32_t rd = GetRd(insn32); in Print32Atomic() local
884 uint32_t rd = GetRd(insn32); in Print32FpOp() local
1045 const char* rd = nullptr; in Print32RVVOp() local
1502 uint32_t rd = GetRd(insn32); in Print32Zicsr() local
1741 uint32_t rd = GetRs1_16(insn16); in Dump16() local
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| /art/compiler/optimizing/ |
| D | code_generator_riscv64.cc | 788 Reg rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FpBinOp()
799 FRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FAdd()
804 FRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FSub()
809 FRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FDiv()
814 FRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FMul()
819 FRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FMin()
824 FRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FMax()
829 XRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FEq()
834 XRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FLt()
839 XRegister rd, FRegister rs1, FRegister rs2, DataType::Type type) { in FLe()
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| D | intrinsics_riscv64.cc | 290 EmitMemoryPeek(invoke, [&](XRegister rd, XRegister rs1) { __ Lb(rd, rs1, 0); }); in VisitMemoryPeekByte()
299 EmitMemoryPeek(invoke, [&](XRegister rd, XRegister rs1) { __ Lw(rd, rs1, 0); }); in VisitMemoryPeekIntNative()
308 EmitMemoryPeek(invoke, [&](XRegister rd, XRegister rs1) { __ Ld(rd, rs1, 0); }); in VisitMemoryPeekLongNative()
317 EmitMemoryPeek(invoke, [&](XRegister rd, XRegister rs1) { __ Lh(rd, rs1, 0); }); in VisitMemoryPeekShortNative()
379 Location rd, in GenerateReverseBytes()
523 EmitIntegralUnOp(invoke, [&](XRegister rd, XRegister rs1) { __ Cpopw(rd, rs1); }); in VisitIntegerBitCount()
532 EmitIntegralUnOp(invoke, [&](XRegister rd, XRegister rs1) { __ Cpop(rd, rs1); }); in VisitLongBitCount()
541 EmitIntegralUnOp(invoke, [&](XRegister rd, XRegister rs1) { in VisitIntegerHighestOneBit()
558 EmitIntegralUnOp(invoke, [&](XRegister rd, XRegister rs1) { in VisitLongHighestOneBit()
575 EmitIntegralUnOp(invoke, [&](XRegister rd, XRegister rs1) { in VisitIntegerLowestOneBit()
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| D | code_generator_arm_vixl.cc | 122 EmitAdrCode(ArmVIXLMacroAssembler* assembler, vixl32::Register rd, vixl32::Label* label) in EmitAdrCode()
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| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.cc | 117 void Arm64JNIMacroAssembler::AddConstant(XRegister rd, int32_t value, Condition cond) { in AddConstant()
121 void Arm64JNIMacroAssembler::AddConstant(XRegister rd, in AddConstant()
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| /art/libartbase/base/ |
| D | mem_map_test.cc | 42 std::random_device rd; in RandomData() local
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64_test.cc | 59 std::random_device rd; in TEST() local
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