1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 **************************************************************************/
8
9 #include "radeon_uvd.h"
10
11 #include "pipe/p_video_codec.h"
12 #include "radeon_video.h"
13 #include "radeonsi/si_pipe.h"
14 #include "util/u_memory.h"
15 #include "util/u_video.h"
16 #include "vl/vl_defines.h"
17 #include "vl/vl_mpeg12_decoder.h"
18 #include <sys/types.h>
19
20 #include <assert.h>
21 #include <errno.h>
22 #include <stdio.h>
23 #include <unistd.h>
24
25 #define NUM_BUFFERS 4
26
27 #define NUM_MPEG2_REFS 6
28 #define NUM_H264_REFS 17
29 #define NUM_VC1_REFS 5
30
31 #define FB_BUFFER_OFFSET 0x1000
32 #define FB_BUFFER_SIZE 2048
33 #define FB_BUFFER_SIZE_TONGA (2048 * 64)
34 #define IT_SCALING_TABLE_SIZE 992
35 #define UVD_SESSION_CONTEXT_SIZE (128 * 1024)
36
37 /* UVD decoder representation */
38 struct ruvd_decoder {
39 struct pipe_video_codec base;
40
41 ruvd_set_dtb set_dtb;
42
43 unsigned stream_handle;
44 unsigned stream_type;
45 unsigned frame_number;
46
47 struct pipe_screen *screen;
48 struct radeon_winsys *ws;
49 struct radeon_cmdbuf cs;
50
51 unsigned cur_buffer;
52
53 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
54 struct ruvd_msg *msg;
55 uint32_t *fb;
56 unsigned fb_size;
57 uint8_t *it;
58
59 struct rvid_buffer bs_buffers[NUM_BUFFERS];
60 void *bs_ptr;
61 unsigned bs_size;
62
63 struct rvid_buffer dpb;
64 bool use_legacy;
65 struct rvid_buffer ctx;
66 struct rvid_buffer sessionctx;
67 struct {
68 unsigned data0;
69 unsigned data1;
70 unsigned cmd;
71 unsigned cntl;
72 } reg;
73
74 void *render_pic_list[16];
75 };
76
77 /* flush IB to the hardware */
flush(struct ruvd_decoder * dec,unsigned flags,struct pipe_fence_handle ** fence)78 static int flush(struct ruvd_decoder *dec, unsigned flags, struct pipe_fence_handle **fence)
79 {
80 return dec->ws->cs_flush(&dec->cs, flags, fence);
81 }
82
ruvd_dec_fence_wait(struct pipe_video_codec * decoder,struct pipe_fence_handle * fence,uint64_t timeout)83 static int ruvd_dec_fence_wait(struct pipe_video_codec *decoder,
84 struct pipe_fence_handle *fence,
85 uint64_t timeout)
86 {
87 struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
88 return dec->ws->fence_wait(dec->ws, fence, timeout);
89 }
90
ruvd_dec_destroy_fence(struct pipe_video_codec * decoder,struct pipe_fence_handle * fence)91 static void ruvd_dec_destroy_fence(struct pipe_video_codec *decoder,
92 struct pipe_fence_handle *fence)
93 {
94 struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
95
96 dec->ws->fence_reference(dec->ws, &fence, NULL);
97 }
98
99 /* add a new set register command to the IB */
set_reg(struct ruvd_decoder * dec,unsigned reg,uint32_t val)100 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
101 {
102 radeon_emit(&dec->cs, RUVD_PKT0(reg >> 2, 0));
103 radeon_emit(&dec->cs, val);
104 }
105
106 /* send a command to the VCPU through the GPCOM registers */
send_cmd(struct ruvd_decoder * dec,unsigned cmd,struct pb_buffer_lean * buf,uint32_t off,unsigned usage,enum radeon_bo_domain domain)107 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd, struct pb_buffer_lean *buf, uint32_t off,
108 unsigned usage, enum radeon_bo_domain domain)
109 {
110 int reloc_idx;
111
112 reloc_idx = dec->ws->cs_add_buffer(&dec->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, domain);
113 if (!dec->use_legacy) {
114 uint64_t addr;
115 addr = dec->ws->buffer_get_virtual_address(buf);
116 addr = addr + off;
117 set_reg(dec, dec->reg.data0, addr);
118 set_reg(dec, dec->reg.data1, addr >> 32);
119 } else {
120 off += dec->ws->buffer_get_reloc_offset(buf);
121 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
122 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
123 }
124 set_reg(dec, dec->reg.cmd, cmd << 1);
125 }
126
127 /* do the codec needs an IT buffer ?*/
have_it(struct ruvd_decoder * dec)128 static bool have_it(struct ruvd_decoder *dec)
129 {
130 return dec->stream_type == RUVD_CODEC_H264_PERF || dec->stream_type == RUVD_CODEC_H265;
131 }
132
133 /* map the next available message/feedback/itscaling buffer */
map_msg_fb_it_buf(struct ruvd_decoder * dec)134 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
135 {
136 struct rvid_buffer *buf;
137 uint8_t *ptr;
138
139 /* grab the current message/feedback buffer */
140 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
141
142 /* and map it for CPU access */
143 ptr =
144 dec->ws->buffer_map(dec->ws, buf->res->buf, &dec->cs, PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
145
146 /* calc buffer offsets */
147 dec->msg = (struct ruvd_msg *)ptr;
148 memset(dec->msg, 0, sizeof(*dec->msg));
149
150 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
151 if (have_it(dec))
152 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + dec->fb_size);
153 }
154
155 /* unmap and send a message command to the VCPU */
send_msg_buf(struct ruvd_decoder * dec)156 static void send_msg_buf(struct ruvd_decoder *dec)
157 {
158 struct rvid_buffer *buf;
159
160 /* ignore the request if message/feedback buffer isn't mapped */
161 if (!dec->msg || !dec->fb)
162 return;
163
164 /* grab the current message buffer */
165 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
166
167 /* unmap the buffer */
168 dec->ws->buffer_unmap(dec->ws, buf->res->buf);
169 dec->msg = NULL;
170 dec->fb = NULL;
171 dec->it = NULL;
172
173 if (dec->sessionctx.res)
174 send_cmd(dec, RUVD_CMD_SESSION_CONTEXT_BUFFER, dec->sessionctx.res->buf, 0,
175 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
176
177 /* and send it to the hardware */
178 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
179 }
180
181 /* cycle to the next set of buffers */
next_buffer(struct ruvd_decoder * dec)182 static void next_buffer(struct ruvd_decoder *dec)
183 {
184 ++dec->cur_buffer;
185 dec->cur_buffer %= NUM_BUFFERS;
186 }
187
188 /* convert the profile into something UVD understands */
profile2stream_type(struct ruvd_decoder * dec,unsigned family)189 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
190 {
191 switch (u_reduce_video_profile(dec->base.profile)) {
192 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
193 return (family >= CHIP_TONGA) ? RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
194
195 case PIPE_VIDEO_FORMAT_VC1:
196 return RUVD_CODEC_VC1;
197
198 case PIPE_VIDEO_FORMAT_MPEG12:
199 return RUVD_CODEC_MPEG2;
200
201 case PIPE_VIDEO_FORMAT_MPEG4:
202 return RUVD_CODEC_MPEG4;
203
204 case PIPE_VIDEO_FORMAT_HEVC:
205 return RUVD_CODEC_H265;
206
207 case PIPE_VIDEO_FORMAT_JPEG:
208 return RUVD_CODEC_MJPEG;
209
210 default:
211 assert(0);
212 return 0;
213 }
214 }
215
calc_ctx_size_h264_perf(struct ruvd_decoder * dec)216 static unsigned calc_ctx_size_h264_perf(struct ruvd_decoder *dec)
217 {
218 unsigned width_in_mb, height_in_mb, ctx_size;
219 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
220 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
221
222 unsigned max_references = dec->base.max_references + 1;
223
224 // picture width & height in 16 pixel units
225 width_in_mb = width / VL_MACROBLOCK_WIDTH;
226 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
227
228 if (!dec->use_legacy) {
229 unsigned fs_in_mb = width_in_mb * height_in_mb;
230 unsigned num_dpb_buffer_lean;
231 switch (dec->base.level) {
232 case 30:
233 num_dpb_buffer_lean = 8100 / fs_in_mb;
234 break;
235 case 31:
236 num_dpb_buffer_lean = 18000 / fs_in_mb;
237 break;
238 case 32:
239 num_dpb_buffer_lean = 20480 / fs_in_mb;
240 break;
241 case 41:
242 num_dpb_buffer_lean = 32768 / fs_in_mb;
243 break;
244 case 42:
245 num_dpb_buffer_lean = 34816 / fs_in_mb;
246 break;
247 case 50:
248 num_dpb_buffer_lean = 110400 / fs_in_mb;
249 break;
250 case 51:
251 num_dpb_buffer_lean = 184320 / fs_in_mb;
252 break;
253 default:
254 num_dpb_buffer_lean = 184320 / fs_in_mb;
255 break;
256 }
257 num_dpb_buffer_lean++;
258 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer_lean), max_references);
259 ctx_size = max_references * align(width_in_mb * height_in_mb * 192, 256);
260 } else {
261 // the firmware seems to always assume a minimum of ref frames
262 max_references = MAX2(NUM_H264_REFS, max_references);
263 // macroblock context buffer
264 ctx_size = align(width_in_mb * height_in_mb * max_references * 192, 256);
265 }
266
267 return ctx_size;
268 }
269
calc_ctx_size_h265_main(struct ruvd_decoder * dec)270 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
271 {
272 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
273 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
274
275 unsigned max_references = dec->base.max_references + 1;
276
277 if (dec->base.width * dec->base.height >= 4096 * 2000)
278 max_references = MAX2(max_references, 8);
279 else
280 max_references = MAX2(max_references, 17);
281
282 width = align(width, 16);
283 height = align(height, 16);
284 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
285 }
286
calc_ctx_size_h265_main10(struct ruvd_decoder * dec,struct pipe_h265_picture_desc * pic)287 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec,
288 struct pipe_h265_picture_desc *pic)
289 {
290 unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
291 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
292 unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
293
294 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
295 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
296 unsigned coeff_10bit =
297 (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
298
299 unsigned max_references = dec->base.max_references + 1;
300
301 if (dec->base.width * dec->base.height >= 4096 * 2000)
302 max_references = MAX2(max_references, 8);
303 else
304 max_references = MAX2(max_references, 17);
305
306 log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
307 pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
308
309 width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
310 height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
311
312 num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
313 context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
314 max_mb_address = (unsigned)ceil(height * 8 / 2048.0);
315
316 cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
317 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
318
319 return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
320 }
321
get_db_pitch_alignment(struct ruvd_decoder * dec)322 static unsigned get_db_pitch_alignment(struct ruvd_decoder *dec)
323 {
324 if (((struct si_screen *)dec->screen)->info.family < CHIP_VEGA10)
325 return 16;
326 else
327 return 32;
328 }
329
330 /* calculate size of reference picture buffer */
calc_dpb_size(struct ruvd_decoder * dec)331 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
332 {
333 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
334
335 // always align them to MB size for dpb calculation
336 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
337 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
338
339 // always one more for currently decoded picture
340 unsigned max_references = dec->base.max_references + 1;
341
342 // aligned size of a single frame
343 image_size = align(width, get_db_pitch_alignment(dec)) * height;
344 image_size += image_size / 2;
345 image_size = align(image_size, 1024);
346
347 // picture width & height in 16 pixel units
348 width_in_mb = width / VL_MACROBLOCK_WIDTH;
349 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
350
351 switch (u_reduce_video_profile(dec->base.profile)) {
352 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
353 if (!dec->use_legacy) {
354 unsigned fs_in_mb = width_in_mb * height_in_mb;
355 unsigned alignment = 64, num_dpb_buffer_lean;
356
357 if (dec->stream_type == RUVD_CODEC_H264_PERF)
358 alignment = 256;
359 switch (dec->base.level) {
360 case 30:
361 num_dpb_buffer_lean = 8100 / fs_in_mb;
362 break;
363 case 31:
364 num_dpb_buffer_lean = 18000 / fs_in_mb;
365 break;
366 case 32:
367 num_dpb_buffer_lean = 20480 / fs_in_mb;
368 break;
369 case 41:
370 num_dpb_buffer_lean = 32768 / fs_in_mb;
371 break;
372 case 42:
373 num_dpb_buffer_lean = 34816 / fs_in_mb;
374 break;
375 case 50:
376 num_dpb_buffer_lean = 110400 / fs_in_mb;
377 break;
378 case 51:
379 num_dpb_buffer_lean = 184320 / fs_in_mb;
380 break;
381 default:
382 num_dpb_buffer_lean = 184320 / fs_in_mb;
383 break;
384 }
385 num_dpb_buffer_lean++;
386 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer_lean), max_references);
387 dpb_size = image_size * max_references;
388 if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
389 (((struct si_screen *)dec->screen)->info.family < CHIP_POLARIS10)) {
390 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
391 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
392 }
393 } else {
394 // the firmware seems to always assume a minimum of ref frames
395 max_references = MAX2(NUM_H264_REFS, max_references);
396 // reference picture buffer
397 dpb_size = image_size * max_references;
398 if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
399 (((struct si_screen *)dec->screen)->info.family < CHIP_POLARIS10)) {
400 // macroblock context buffer
401 dpb_size += width_in_mb * height_in_mb * max_references * 192;
402 // IT surface buffer
403 dpb_size += width_in_mb * height_in_mb * 32;
404 }
405 }
406 break;
407 }
408
409 case PIPE_VIDEO_FORMAT_HEVC:
410 if (dec->base.width * dec->base.height >= 4096 * 2000)
411 max_references = MAX2(max_references, 8);
412 else
413 max_references = MAX2(max_references, 17);
414
415 width = align(width, 16);
416 height = align(height, 16);
417 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
418 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) *
419 max_references;
420 else
421 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) *
422 max_references;
423 break;
424
425 case PIPE_VIDEO_FORMAT_VC1:
426 // the firmware seems to always assume a minimum of ref frames
427 max_references = MAX2(NUM_VC1_REFS, max_references);
428
429 // reference picture buffer
430 dpb_size = image_size * max_references;
431
432 // CONTEXT_BUFFER
433 dpb_size += width_in_mb * height_in_mb * 128;
434
435 // IT surface buffer
436 dpb_size += width_in_mb * 64;
437
438 // DB surface buffer
439 dpb_size += width_in_mb * 128;
440
441 // BP
442 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
443 break;
444
445 case PIPE_VIDEO_FORMAT_MPEG12:
446 // reference picture buffer, must be big enough for all frames
447 dpb_size = image_size * NUM_MPEG2_REFS;
448 break;
449
450 case PIPE_VIDEO_FORMAT_MPEG4:
451 // reference picture buffer
452 dpb_size = image_size * max_references;
453
454 // CM
455 dpb_size += width_in_mb * height_in_mb * 64;
456
457 // IT surface buffer
458 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
459
460 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
461 break;
462
463 case PIPE_VIDEO_FORMAT_JPEG:
464 dpb_size = 0;
465 break;
466
467 default:
468 // something is missing here
469 assert(0);
470
471 // at least use a sane default value
472 dpb_size = 32 * 1024 * 1024;
473 break;
474 }
475 return dpb_size;
476 }
477
478 /* free associated data in the video buffer callback */
ruvd_destroy_associated_data(void * data)479 static void ruvd_destroy_associated_data(void *data)
480 {
481 /* NOOP, since we only use an intptr */
482 }
483
484 /* get h264 specific message bits */
get_h264_msg(struct ruvd_decoder * dec,struct pipe_h264_picture_desc * pic)485 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
486 {
487 struct ruvd_h264 result;
488
489 memset(&result, 0, sizeof(result));
490 switch (pic->base.profile) {
491 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
492 case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE:
493 result.profile = RUVD_H264_PROFILE_BASELINE;
494 break;
495
496 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
497 result.profile = RUVD_H264_PROFILE_MAIN;
498 break;
499
500 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
501 result.profile = RUVD_H264_PROFILE_HIGH;
502 break;
503
504 default:
505 assert(0);
506 break;
507 }
508
509 result.level = dec->base.level;
510
511 result.sps_info_flags = 0;
512 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
513 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
514 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
515 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
516
517 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
518 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
519 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
520 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
521 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
522
523 switch (dec->base.chroma_format) {
524 case PIPE_VIDEO_CHROMA_FORMAT_NONE:
525 /* TODO: assert? */
526 break;
527 case PIPE_VIDEO_CHROMA_FORMAT_400:
528 result.chroma_format = 0;
529 break;
530 case PIPE_VIDEO_CHROMA_FORMAT_420:
531 result.chroma_format = 1;
532 break;
533 case PIPE_VIDEO_CHROMA_FORMAT_422:
534 result.chroma_format = 2;
535 break;
536 case PIPE_VIDEO_CHROMA_FORMAT_444:
537 result.chroma_format = 3;
538 break;
539 case PIPE_VIDEO_CHROMA_FORMAT_440:
540 result.chroma_format = 4;
541 break;
542 }
543
544 result.pps_info_flags = 0;
545 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
546 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
547 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
548 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
549 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
550 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
551 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
552 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
553
554 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
555 result.slice_group_map_type = pic->pps->slice_group_map_type;
556 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
557 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
558 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
559 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
560
561 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6 * 16);
562 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2 * 64);
563
564 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
565 memcpy(dec->it, result.scaling_list_4x4, 6 * 16);
566 memcpy((dec->it + 96), result.scaling_list_8x8, 2 * 64);
567 }
568
569 result.num_ref_frames = pic->num_ref_frames;
570
571 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
572 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
573
574 result.frame_num = pic->frame_num;
575 memcpy(result.frame_num_list, pic->frame_num_list, 4 * 16);
576 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
577 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
578 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4 * 16 * 2);
579
580 result.decoded_pic_idx = pic->frame_num;
581
582 return result;
583 }
584
585 /* get h265 specific message bits */
get_h265_msg(struct ruvd_decoder * dec,struct pipe_video_buffer * target,struct pipe_h265_picture_desc * pic)586 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
587 struct pipe_h265_picture_desc *pic)
588 {
589 struct ruvd_h265 result;
590 unsigned i, j;
591
592 memset(&result, 0, sizeof(result));
593
594 result.sps_info_flags = 0;
595 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
596 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
597 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
598 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
599 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
600 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
601 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
602 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
603 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
604 if (((struct si_screen *)dec->screen)->info.family == CHIP_CARRIZO)
605 result.sps_info_flags |= 1 << 9;
606 if (pic->UseRefPicList == true)
607 result.sps_info_flags |= 1 << 10;
608
609 result.chroma_format = pic->pps->sps->chroma_format_idc;
610 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
611 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
612 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
613 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
614 result.log2_min_luma_coding_block_size_minus3 =
615 pic->pps->sps->log2_min_luma_coding_block_size_minus3;
616 result.log2_diff_max_min_luma_coding_block_size =
617 pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
618 result.log2_min_transform_block_size_minus2 =
619 pic->pps->sps->log2_min_transform_block_size_minus2;
620 result.log2_diff_max_min_transform_block_size =
621 pic->pps->sps->log2_diff_max_min_transform_block_size;
622 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
623 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
624 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
625 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
626 result.log2_min_pcm_luma_coding_block_size_minus3 =
627 pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
628 result.log2_diff_max_min_pcm_luma_coding_block_size =
629 pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
630 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
631
632 result.pps_info_flags = 0;
633 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
634 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
635 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
636 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
637 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
638 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
639 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
640 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
641 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
642 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
643 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
644 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
645 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
646 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
647 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
648 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
649 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
650 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
651 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
652 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
653 // result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
654
655 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
656 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
657 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
658 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
659 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
660 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
661 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
662 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
663 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
664 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
665 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
666 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
667 result.init_qp_minus26 = pic->pps->init_qp_minus26;
668
669 for (i = 0; i < 19; ++i)
670 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
671
672 for (i = 0; i < 21; ++i)
673 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
674
675 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
676 result.curr_poc = pic->CurrPicOrderCntVal;
677
678 for (i = 0; i < 16; i++) {
679 for (j = 0; (pic->ref[j] != NULL) && (j < 16); j++) {
680 if (dec->render_pic_list[i] == pic->ref[j])
681 break;
682 if (j == 15)
683 dec->render_pic_list[i] = NULL;
684 else if (pic->ref[j + 1] == NULL)
685 dec->render_pic_list[i] = NULL;
686 }
687 }
688 for (i = 0; i < 16; i++) {
689 if (dec->render_pic_list[i] == NULL) {
690 dec->render_pic_list[i] = target;
691 result.curr_idx = i;
692 break;
693 }
694 }
695
696 vl_video_buffer_set_associated_data(target, &dec->base, (void *)(uintptr_t)result.curr_idx,
697 &ruvd_destroy_associated_data);
698
699 for (i = 0; i < 16; ++i) {
700 struct pipe_video_buffer *ref = pic->ref[i];
701 uintptr_t ref_pic = 0;
702
703 result.poc_list[i] = pic->PicOrderCntVal[i];
704
705 if (ref)
706 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
707 else
708 ref_pic = 0x7F;
709 result.ref_pic_list[i] = ref_pic;
710 }
711
712 for (i = 0; i < 8; ++i) {
713 result.ref_pic_set_st_curr_before[i] = 0xFF;
714 result.ref_pic_set_st_curr_after[i] = 0xFF;
715 result.ref_pic_set_lt_curr[i] = 0xFF;
716 }
717
718 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
719 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
720
721 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
722 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
723
724 for (i = 0; i < pic->NumPocLtCurr; ++i)
725 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
726
727 for (i = 0; i < 6; ++i)
728 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
729
730 for (i = 0; i < 2; ++i)
731 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
732
733 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
734 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
735 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
736 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
737
738 for (i = 0; i < 2; i++) {
739 for (j = 0; j < 15; j++)
740 result.direct_reflist[i][j] = pic->RefPicList[0][i][j];
741 }
742
743 if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
744 if (target->buffer_format == PIPE_FORMAT_P010 || target->buffer_format == PIPE_FORMAT_P016) {
745 result.p010_mode = 1;
746 result.msb_mode = 1;
747 } else {
748 result.luma_10to8 = 5;
749 result.chroma_10to8 = 5;
750 result.sclr_luma10to8 = 4;
751 result.sclr_chroma10to8 = 4;
752 }
753 }
754
755 /* TODO
756 result.highestTid;
757 result.isNonRef;
758
759 IDRPicFlag;
760 RAPPicFlag;
761 NumPocTotalCurr;
762 NumShortTermPictureSliceHeaderBits;
763 NumLongTermPictureSliceHeaderBits;
764
765 IsLongTerm[16];
766 */
767
768 return result;
769 }
770
771 /* get vc1 specific message bits */
get_vc1_msg(struct pipe_vc1_picture_desc * pic)772 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
773 {
774 struct ruvd_vc1 result;
775
776 memset(&result, 0, sizeof(result));
777
778 switch (pic->base.profile) {
779 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
780 result.profile = RUVD_VC1_PROFILE_SIMPLE;
781 result.level = 1;
782 break;
783
784 case PIPE_VIDEO_PROFILE_VC1_MAIN:
785 result.profile = RUVD_VC1_PROFILE_MAIN;
786 result.level = 2;
787 break;
788
789 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
790 result.profile = RUVD_VC1_PROFILE_ADVANCED;
791 result.level = 4;
792 break;
793
794 default:
795 assert(0);
796 }
797
798 /* fields common for all profiles */
799 result.sps_info_flags |= pic->postprocflag << 7;
800 result.sps_info_flags |= pic->pulldown << 6;
801 result.sps_info_flags |= pic->interlace << 5;
802 result.sps_info_flags |= pic->tfcntrflag << 4;
803 result.sps_info_flags |= pic->finterpflag << 3;
804 result.sps_info_flags |= pic->psf << 1;
805
806 result.pps_info_flags |= pic->range_mapy_flag << 31;
807 result.pps_info_flags |= pic->range_mapy << 28;
808 result.pps_info_flags |= pic->range_mapuv_flag << 27;
809 result.pps_info_flags |= pic->range_mapuv << 24;
810 result.pps_info_flags |= pic->multires << 21;
811 result.pps_info_flags |= pic->maxbframes << 16;
812 result.pps_info_flags |= pic->overlap << 11;
813 result.pps_info_flags |= pic->quantizer << 9;
814 result.pps_info_flags |= pic->panscan_flag << 7;
815 result.pps_info_flags |= pic->refdist_flag << 6;
816 result.pps_info_flags |= pic->vstransform << 0;
817
818 /* some fields only apply to main/advanced profile */
819 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
820 result.pps_info_flags |= pic->syncmarker << 20;
821 result.pps_info_flags |= pic->rangered << 19;
822 result.pps_info_flags |= pic->loopfilter << 5;
823 result.pps_info_flags |= pic->fastuvmc << 4;
824 result.pps_info_flags |= pic->extended_mv << 3;
825 result.pps_info_flags |= pic->extended_dmv << 8;
826 result.pps_info_flags |= pic->dquant << 1;
827 }
828
829 result.chroma_format = 1;
830
831 #if 0
832 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
833 uint32_t slice_count
834 uint8_t picture_type
835 uint8_t frame_coding_mode
836 uint8_t deblockEnable
837 uint8_t pquant
838 #endif
839
840 return result;
841 }
842
843 /* extract the frame number from a referenced video buffer */
get_ref_pic_idx(struct ruvd_decoder * dec,struct pipe_video_buffer * ref)844 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
845 {
846 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
847 uint32_t max = MAX2(dec->frame_number, 1) - 1;
848 uintptr_t frame;
849
850 /* seems to be the most sane fallback */
851 if (!ref)
852 return max;
853
854 /* get the frame number from the associated data */
855 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
856
857 /* limit the frame number to a valid range */
858 return MAX2(MIN2(frame, max), min);
859 }
860
861 /* get mpeg2 specific msg bits */
get_mpeg2_msg(struct ruvd_decoder * dec,struct pipe_mpeg12_picture_desc * pic)862 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
863 struct pipe_mpeg12_picture_desc *pic)
864 {
865 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
866 struct ruvd_mpeg2 result;
867 unsigned i;
868
869 memset(&result, 0, sizeof(result));
870 result.decoded_pic_idx = dec->frame_number;
871 for (i = 0; i < 2; ++i)
872 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
873
874 if (pic->intra_matrix) {
875 result.load_intra_quantiser_matrix = 1;
876 for (i = 0; i < 64; ++i) {
877 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
878 }
879 }
880 if (pic->non_intra_matrix) {
881 result.load_nonintra_quantiser_matrix = 1;
882 for (i = 0; i < 64; ++i) {
883 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
884 }
885 }
886
887 result.profile_and_level_indication = 0;
888 result.chroma_format = 0x1;
889
890 result.picture_coding_type = pic->picture_coding_type;
891 result.f_code[0][0] = pic->f_code[0][0] + 1;
892 result.f_code[0][1] = pic->f_code[0][1] + 1;
893 result.f_code[1][0] = pic->f_code[1][0] + 1;
894 result.f_code[1][1] = pic->f_code[1][1] + 1;
895 result.intra_dc_precision = pic->intra_dc_precision;
896 result.pic_structure = pic->picture_structure;
897 result.top_field_first = pic->top_field_first;
898 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
899 result.concealment_motion_vectors = pic->concealment_motion_vectors;
900 result.q_scale_type = pic->q_scale_type;
901 result.intra_vlc_format = pic->intra_vlc_format;
902 result.alternate_scan = pic->alternate_scan;
903
904 return result;
905 }
906
907 /* get mpeg4 specific msg bits */
get_mpeg4_msg(struct ruvd_decoder * dec,struct pipe_mpeg4_picture_desc * pic)908 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
909 struct pipe_mpeg4_picture_desc *pic)
910 {
911 struct ruvd_mpeg4 result;
912 unsigned i;
913
914 memset(&result, 0, sizeof(result));
915 result.decoded_pic_idx = dec->frame_number;
916 for (i = 0; i < 2; ++i)
917 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
918
919 result.variant_type = 0;
920 result.profile_and_level_indication = 0xF0; // ASP Level0
921
922 result.video_object_layer_verid = 0x5; // advanced simple
923 result.video_object_layer_shape = 0x0; // rectangular
924
925 result.video_object_layer_width = dec->base.width;
926 result.video_object_layer_height = dec->base.height;
927
928 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
929
930 result.flags |= pic->short_video_header << 0;
931 // result.flags |= obmc_disable << 1;
932 result.flags |= pic->interlaced << 2;
933 result.flags |= 1 << 3; // load_intra_quant_mat
934 result.flags |= 1 << 4; // load_nonintra_quant_mat
935 result.flags |= pic->quarter_sample << 5;
936 result.flags |= 1 << 6; // complexity_estimation_disable
937 result.flags |= pic->resync_marker_disable << 7;
938 // result.flags |= data_partitioned << 8;
939 // result.flags |= reversible_vlc << 9;
940 result.flags |= 0 << 10; // newpred_enable
941 result.flags |= 0 << 11; // reduced_resolution_vop_enable
942 // result.flags |= scalability << 12;
943 // result.flags |= is_object_layer_identifier << 13;
944 // result.flags |= fixed_vop_rate << 14;
945 // result.flags |= newpred_segment_type << 15;
946
947 result.quant_type = pic->quant_type;
948
949 for (i = 0; i < 64; ++i) {
950 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
951 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
952 }
953
954 /*
955 int32_t trd [2]
956 int32_t trb [2]
957 uint8_t vop_coding_type
958 uint8_t vop_fcode_forward
959 uint8_t vop_fcode_backward
960 uint8_t rounding_control
961 uint8_t alternate_vertical_scan_flag
962 uint8_t top_field_first
963 */
964
965 return result;
966 }
967
968 /**
969 * destroy this video decoder
970 */
ruvd_destroy(struct pipe_video_codec * decoder)971 static void ruvd_destroy(struct pipe_video_codec *decoder)
972 {
973 struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
974 unsigned i;
975
976 assert(decoder);
977
978 map_msg_fb_it_buf(dec);
979 dec->msg->size = sizeof(*dec->msg);
980 dec->msg->msg_type = RUVD_MSG_DESTROY;
981 dec->msg->stream_handle = dec->stream_handle;
982 send_msg_buf(dec);
983
984 flush(dec, 0, NULL);
985
986 dec->ws->cs_destroy(&dec->cs);
987
988 for (i = 0; i < NUM_BUFFERS; ++i) {
989 si_vid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
990 si_vid_destroy_buffer(&dec->bs_buffers[i]);
991 }
992
993 si_vid_destroy_buffer(&dec->dpb);
994 si_vid_destroy_buffer(&dec->ctx);
995 si_vid_destroy_buffer(&dec->sessionctx);
996
997 FREE(dec);
998 }
999
1000 /**
1001 * start decoding of a new frame
1002 */
ruvd_begin_frame(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture)1003 static void ruvd_begin_frame(struct pipe_video_codec *decoder, struct pipe_video_buffer *target,
1004 struct pipe_picture_desc *picture)
1005 {
1006 struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
1007 uintptr_t frame;
1008
1009 assert(decoder);
1010
1011 frame = ++dec->frame_number;
1012 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
1013 &ruvd_destroy_associated_data);
1014
1015 dec->bs_size = 0;
1016 dec->bs_ptr = dec->ws->buffer_map(dec->ws, dec->bs_buffers[dec->cur_buffer].res->buf, &dec->cs,
1017 PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
1018 }
1019
1020 /**
1021 * decode a macroblock
1022 */
ruvd_decode_macroblock(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture,const struct pipe_macroblock * macroblocks,unsigned num_macroblocks)1023 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
1024 struct pipe_video_buffer *target,
1025 struct pipe_picture_desc *picture,
1026 const struct pipe_macroblock *macroblocks,
1027 unsigned num_macroblocks)
1028 {
1029 /* not supported (yet) */
1030 assert(0);
1031 }
1032
1033 /**
1034 * decode a bitstream
1035 */
ruvd_decode_bitstream(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture,unsigned num_buffers,const void * const * buffers,const unsigned * sizes)1036 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
1037 struct pipe_video_buffer *target,
1038 struct pipe_picture_desc *picture, unsigned num_buffers,
1039 const void *const *buffers, const unsigned *sizes)
1040 {
1041 struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
1042 unsigned i;
1043
1044 assert(decoder);
1045
1046 if (!dec->bs_ptr)
1047 return;
1048
1049 unsigned long total_bs_size = dec->bs_size;
1050 for (i = 0; i < num_buffers; ++i)
1051 total_bs_size += sizes[i];
1052
1053 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
1054
1055 if (total_bs_size > buf->res->buf->size) {
1056 dec->ws->buffer_unmap(dec->ws, buf->res->buf);
1057 dec->bs_ptr = NULL;
1058
1059 total_bs_size = align(total_bs_size, 128);
1060
1061 if (!dec->bs_size) {
1062 struct rvid_buffer old_buf = *buf;
1063 if (!si_vid_create_buffer(dec->screen, buf, total_bs_size, buf->usage)) {
1064 RVID_ERR("Can't create bitstream buffer!");
1065 return;
1066 }
1067 si_vid_destroy_buffer(&old_buf);
1068 } else if (!si_vid_resize_buffer(dec->base.context, &dec->cs, buf, total_bs_size, NULL)) {
1069 RVID_ERR("Can't resize bitstream buffer!");
1070 return;
1071 }
1072
1073 dec->bs_ptr = dec->ws->buffer_map(dec->ws, buf->res->buf, &dec->cs,
1074 PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
1075 if (!dec->bs_ptr)
1076 return;
1077
1078 dec->bs_ptr += dec->bs_size;
1079 }
1080
1081 for (i = 0; i < num_buffers; ++i) {
1082 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
1083 dec->bs_size += sizes[i];
1084 dec->bs_ptr += sizes[i];
1085 }
1086 }
1087
1088 /**
1089 * end decoding of the current frame
1090 */
ruvd_end_frame(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture)1091 static int ruvd_end_frame(struct pipe_video_codec *decoder, struct pipe_video_buffer *target,
1092 struct pipe_picture_desc *picture)
1093 {
1094 struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
1095 struct pb_buffer_lean *dt;
1096 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
1097 unsigned bs_size;
1098
1099 assert(decoder);
1100
1101 if (!dec->bs_ptr)
1102 return 1;
1103
1104 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
1105 bs_buf = &dec->bs_buffers[dec->cur_buffer];
1106
1107 bs_size = align(dec->bs_size, 128);
1108 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
1109 dec->ws->buffer_unmap(dec->ws, bs_buf->res->buf);
1110
1111 map_msg_fb_it_buf(dec);
1112 dec->msg->size = sizeof(*dec->msg);
1113 dec->msg->msg_type = RUVD_MSG_DECODE;
1114 dec->msg->stream_handle = dec->stream_handle;
1115 dec->msg->status_report_feedback_number = dec->frame_number;
1116
1117 dec->msg->body.decode.stream_type = dec->stream_type;
1118 dec->msg->body.decode.decode_flags = 0x1;
1119 dec->msg->body.decode.width_in_samples = dec->base.width;
1120 dec->msg->body.decode.height_in_samples = dec->base.height;
1121
1122 if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
1123 (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1124 dec->msg->body.decode.width_in_samples =
1125 align(dec->msg->body.decode.width_in_samples, 16) / 16;
1126 dec->msg->body.decode.height_in_samples =
1127 align(dec->msg->body.decode.height_in_samples, 16) / 16;
1128 }
1129
1130 if (dec->dpb.res)
1131 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
1132 dec->msg->body.decode.bsd_size = bs_size;
1133 dec->msg->body.decode.db_pitch = align(dec->base.width, get_db_pitch_alignment(dec));
1134
1135 if (dec->stream_type == RUVD_CODEC_H264_PERF &&
1136 ((struct si_screen *)dec->screen)->info.family >= CHIP_POLARIS10)
1137 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1138
1139 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
1140 if (((struct si_screen *)dec->screen)->info.family >= CHIP_STONEY)
1141 dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
1142
1143 switch (u_reduce_video_profile(picture->profile)) {
1144 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1145 dec->msg->body.decode.codec.h264 =
1146 get_h264_msg(dec, (struct pipe_h264_picture_desc *)picture);
1147 break;
1148
1149 case PIPE_VIDEO_FORMAT_HEVC:
1150 dec->msg->body.decode.codec.h265 =
1151 get_h265_msg(dec, target, (struct pipe_h265_picture_desc *)picture);
1152 if (dec->ctx.res == NULL) {
1153 unsigned ctx_size;
1154 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1155 ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc *)picture);
1156 else
1157 ctx_size = calc_ctx_size_h265_main(dec);
1158 if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1159 RVID_ERR("Can't allocated context buffer.\n");
1160 }
1161 }
1162
1163 if (dec->ctx.res)
1164 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1165 break;
1166
1167 case PIPE_VIDEO_FORMAT_VC1:
1168 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc *)picture);
1169 break;
1170
1171 case PIPE_VIDEO_FORMAT_MPEG12:
1172 dec->msg->body.decode.codec.mpeg2 =
1173 get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc *)picture);
1174 break;
1175
1176 case PIPE_VIDEO_FORMAT_MPEG4:
1177 dec->msg->body.decode.codec.mpeg4 =
1178 get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc *)picture);
1179 break;
1180
1181 case PIPE_VIDEO_FORMAT_JPEG:
1182 break;
1183
1184 default:
1185 assert(0);
1186 return 1;
1187 }
1188
1189 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
1190 dec->msg->body.decode.extension_support = 0x1;
1191
1192 /* set at least the feedback buffer size */
1193 dec->fb[0] = dec->fb_size;
1194
1195 send_msg_buf(dec);
1196
1197 if (dec->dpb.res)
1198 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0, RADEON_USAGE_READWRITE,
1199 RADEON_DOMAIN_VRAM);
1200
1201 if (dec->ctx.res)
1202 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0, RADEON_USAGE_READWRITE,
1203 RADEON_DOMAIN_VRAM);
1204 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf, 0, RADEON_USAGE_READ,
1205 RADEON_DOMAIN_GTT);
1206 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0, RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
1207 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf, FB_BUFFER_OFFSET,
1208 RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1209 if (have_it(dec))
1210 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf,
1211 FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1212 set_reg(dec, dec->reg.cntl, 1);
1213
1214 flush(dec, picture->flush_flags, picture->fence);
1215 next_buffer(dec);
1216 return 0;
1217 }
1218
1219 /**
1220 * flush any outstanding command buffers to the hardware
1221 */
ruvd_flush(struct pipe_video_codec * decoder)1222 static void ruvd_flush(struct pipe_video_codec *decoder)
1223 {
1224 }
1225
1226 /**
1227 * create and UVD decoder
1228 */
si_common_uvd_create_decoder(struct pipe_context * context,const struct pipe_video_codec * templ,ruvd_set_dtb set_dtb)1229 struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *context,
1230 const struct pipe_video_codec *templ,
1231 ruvd_set_dtb set_dtb)
1232 {
1233 struct si_context *sctx = (struct si_context *)context;
1234 struct radeon_winsys *ws = sctx->ws;
1235 unsigned dpb_size;
1236 unsigned width = templ->width, height = templ->height;
1237 unsigned bs_buf_size;
1238 struct ruvd_decoder *dec;
1239 int r, i;
1240
1241 switch (u_reduce_video_profile(templ->profile)) {
1242 case PIPE_VIDEO_FORMAT_MPEG12:
1243 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM)
1244 return vl_create_mpeg12_decoder(context, templ);
1245
1246 FALLTHROUGH;
1247 case PIPE_VIDEO_FORMAT_MPEG4:
1248 width = align(width, VL_MACROBLOCK_WIDTH);
1249 height = align(height, VL_MACROBLOCK_HEIGHT);
1250 break;
1251 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1252 width = align(width, VL_MACROBLOCK_WIDTH);
1253 height = align(height, VL_MACROBLOCK_HEIGHT);
1254 break;
1255
1256 default:
1257 break;
1258 }
1259
1260 dec = CALLOC_STRUCT(ruvd_decoder);
1261
1262 if (!dec)
1263 return NULL;
1264
1265 if (!sctx->screen->info.is_amdgpu)
1266 dec->use_legacy = true;
1267
1268 dec->base = *templ;
1269 dec->base.context = context;
1270 dec->base.width = width;
1271 dec->base.height = height;
1272
1273 dec->base.destroy = ruvd_destroy;
1274 dec->base.begin_frame = ruvd_begin_frame;
1275 dec->base.decode_macroblock = ruvd_decode_macroblock;
1276 dec->base.decode_bitstream = ruvd_decode_bitstream;
1277 dec->base.end_frame = ruvd_end_frame;
1278 dec->base.flush = ruvd_flush;
1279 dec->base.fence_wait = ruvd_dec_fence_wait;
1280 dec->base.destroy_fence = ruvd_dec_destroy_fence;
1281
1282 dec->stream_type = profile2stream_type(dec, sctx->family);
1283 dec->set_dtb = set_dtb;
1284 dec->stream_handle = si_vid_alloc_stream_handle();
1285 dec->screen = context->screen;
1286 dec->ws = ws;
1287
1288 if (!ws->cs_create(&dec->cs, sctx->ctx, AMD_IP_UVD, NULL, NULL)) {
1289 RVID_ERR("Can't get command submission context.\n");
1290 goto error;
1291 }
1292
1293 for (i = 0; i < 16; i++)
1294 dec->render_pic_list[i] = NULL;
1295 dec->fb_size = (sctx->family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA : FB_BUFFER_SIZE;
1296 bs_buf_size = align(width * height / 32, 128);
1297 for (i = 0; i < NUM_BUFFERS; ++i) {
1298 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size;
1299 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1300 if (have_it(dec))
1301 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1302 if (!si_vid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i], msg_fb_it_size,
1303 PIPE_USAGE_STAGING)) {
1304 RVID_ERR("Can't allocated message buffers.\n");
1305 goto error;
1306 }
1307
1308 if (!si_vid_create_buffer(dec->screen, &dec->bs_buffers[i], bs_buf_size,
1309 PIPE_USAGE_STAGING)) {
1310 RVID_ERR("Can't allocated bitstream buffers.\n");
1311 goto error;
1312 }
1313 }
1314
1315 dpb_size = calc_dpb_size(dec);
1316 if (dpb_size) {
1317 if (!si_vid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1318 RVID_ERR("Can't allocated dpb.\n");
1319 goto error;
1320 }
1321 }
1322
1323 if (dec->stream_type == RUVD_CODEC_H264_PERF && sctx->family >= CHIP_POLARIS10) {
1324 unsigned ctx_size = calc_ctx_size_h264_perf(dec);
1325 if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1326 RVID_ERR("Can't allocated context buffer.\n");
1327 goto error;
1328 }
1329 }
1330
1331 if (sctx->family >= CHIP_POLARIS10) {
1332 if (!si_vid_create_buffer(dec->screen, &dec->sessionctx, UVD_SESSION_CONTEXT_SIZE,
1333 PIPE_USAGE_DEFAULT)) {
1334 RVID_ERR("Can't allocated session ctx.\n");
1335 goto error;
1336 }
1337 }
1338
1339 if (sctx->family >= CHIP_VEGA10) {
1340 dec->reg.data0 = RUVD_GPCOM_VCPU_DATA0_SOC15;
1341 dec->reg.data1 = RUVD_GPCOM_VCPU_DATA1_SOC15;
1342 dec->reg.cmd = RUVD_GPCOM_VCPU_CMD_SOC15;
1343 dec->reg.cntl = RUVD_ENGINE_CNTL_SOC15;
1344 } else {
1345 dec->reg.data0 = RUVD_GPCOM_VCPU_DATA0;
1346 dec->reg.data1 = RUVD_GPCOM_VCPU_DATA1;
1347 dec->reg.cmd = RUVD_GPCOM_VCPU_CMD;
1348 dec->reg.cntl = RUVD_ENGINE_CNTL;
1349 }
1350
1351 map_msg_fb_it_buf(dec);
1352 dec->msg->size = sizeof(*dec->msg);
1353 dec->msg->msg_type = RUVD_MSG_CREATE;
1354 dec->msg->stream_handle = dec->stream_handle;
1355 dec->msg->body.create.stream_type = dec->stream_type;
1356 dec->msg->body.create.width_in_samples = dec->base.width;
1357 dec->msg->body.create.height_in_samples = dec->base.height;
1358 dec->msg->body.create.dpb_size = dpb_size;
1359 send_msg_buf(dec);
1360 r = flush(dec, 0, NULL);
1361 if (r)
1362 goto error;
1363
1364 next_buffer(dec);
1365
1366 return &dec->base;
1367
1368 error:
1369 dec->ws->cs_destroy(&dec->cs);
1370
1371 for (i = 0; i < NUM_BUFFERS; ++i) {
1372 si_vid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1373 si_vid_destroy_buffer(&dec->bs_buffers[i]);
1374 }
1375
1376 si_vid_destroy_buffer(&dec->dpb);
1377 si_vid_destroy_buffer(&dec->ctx);
1378 si_vid_destroy_buffer(&dec->sessionctx);
1379
1380 FREE(dec);
1381
1382 return NULL;
1383 }
1384
1385 /* calculate top/bottom offset */
texture_offset(struct radeon_surf * surface,unsigned layer,enum ruvd_surface_type type)1386 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer,
1387 enum ruvd_surface_type type)
1388 {
1389 switch (type) {
1390 default:
1391 case RUVD_SURFACE_TYPE_LEGACY:
1392 return (uint64_t)surface->u.legacy.level[0].offset_256B * 256 +
1393 layer * (uint64_t)surface->u.legacy.level[0].slice_size_dw * 4;
1394 break;
1395 case RUVD_SURFACE_TYPE_GFX9:
1396 return surface->u.gfx9.surf_offset + layer * surface->u.gfx9.surf_slice_size;
1397 break;
1398 }
1399 }
1400
1401 /* hw encode the aspect of macro tiles */
macro_tile_aspect(unsigned macro_tile_aspect)1402 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1403 {
1404 switch (macro_tile_aspect) {
1405 default:
1406 case 1:
1407 macro_tile_aspect = 0;
1408 break;
1409 case 2:
1410 macro_tile_aspect = 1;
1411 break;
1412 case 4:
1413 macro_tile_aspect = 2;
1414 break;
1415 case 8:
1416 macro_tile_aspect = 3;
1417 break;
1418 }
1419 return macro_tile_aspect;
1420 }
1421
1422 /* hw encode the bank width and height */
bank_wh(unsigned bankwh)1423 static unsigned bank_wh(unsigned bankwh)
1424 {
1425 switch (bankwh) {
1426 default:
1427 case 1:
1428 bankwh = 0;
1429 break;
1430 case 2:
1431 bankwh = 1;
1432 break;
1433 case 4:
1434 bankwh = 2;
1435 break;
1436 case 8:
1437 bankwh = 3;
1438 break;
1439 }
1440 return bankwh;
1441 }
1442
1443 /**
1444 * fill decoding target field from the luma and chroma surfaces
1445 */
si_uvd_set_dt_surfaces(struct ruvd_msg * msg,struct radeon_surf * luma,struct radeon_surf * chroma,enum ruvd_surface_type type)1446 void si_uvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1447 struct radeon_surf *chroma, enum ruvd_surface_type type)
1448 {
1449 switch (type) {
1450 default:
1451 case RUVD_SURFACE_TYPE_LEGACY:
1452 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w;
1453 switch (luma->u.legacy.level[0].mode) {
1454 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1455 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1456 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1457 break;
1458 case RADEON_SURF_MODE_1D:
1459 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1460 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1461 break;
1462 case RADEON_SURF_MODE_2D:
1463 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1464 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1465 break;
1466 default:
1467 assert(0);
1468 break;
1469 }
1470
1471 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, type);
1472 if (chroma)
1473 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type);
1474 if (msg->body.decode.dt_field_mode) {
1475 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1, type);
1476 if (chroma)
1477 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1, type);
1478 } else {
1479 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1480 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1481 }
1482
1483 if (chroma) {
1484 assert(luma->u.legacy.bankw == chroma->u.legacy.bankw);
1485 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh);
1486 assert(luma->u.legacy.mtilea == chroma->u.legacy.mtilea);
1487 }
1488
1489 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->u.legacy.bankw));
1490 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh));
1491 msg->body.decode.dt_surf_tile_config |=
1492 RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea));
1493 break;
1494 case RUVD_SURFACE_TYPE_GFX9:
1495 msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->blk_w;
1496 msg->body.decode.dt_wa_chroma_bottom_offset = luma->u.gfx9.swizzle_mode;
1497 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, type);
1498 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type);
1499 if (msg->body.decode.dt_field_mode) {
1500 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1, type);
1501 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1, type);
1502 } else {
1503 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1504 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1505 }
1506 msg->body.decode.dt_surf_tile_config = 0;
1507 break;
1508 }
1509 }
1510