1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 /* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */
4
5 #include <arch/io.h>
6 #include <device/pnp_ops.h>
7 #include <stdint.h>
8
9 #include "sio1036.h"
10
sio1036_enter_conf_state(pnp_devfn_t dev)11 static inline void sio1036_enter_conf_state(pnp_devfn_t dev)
12 {
13 u16 port = dev >> 8;
14 outb(0x55, port);
15 }
16
sio1036_exit_conf_state(pnp_devfn_t dev)17 static inline void sio1036_exit_conf_state(pnp_devfn_t dev)
18 {
19 u16 port = dev >> 8;
20 outb(0xaa, port);
21 }
22
23 /* Detect SMSC SIO1036 LPC Debug Card status */
detect_sio1036_chip(unsigned int port)24 static u8 detect_sio1036_chip(unsigned int port)
25 {
26 pnp_devfn_t dev = PNP_DEV(port, SIO1036_SP1);
27 u8 data;
28
29 sio1036_enter_conf_state(dev);
30 data = pnp_read_config(dev, 0x0D);
31 sio1036_exit_conf_state(dev);
32
33 /* Detect SMSC SIO1036 chip */
34 if (data == 0x82) {
35 /* Found SMSC SIO1036 chip */
36 return 0;
37 } else {
38 return 1;
39 };
40 }
41
sio1036_enable_serial(pnp_devfn_t dev,u16 iobase)42 void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase)
43 {
44 unsigned int port = dev >> 8;
45
46 if (detect_sio1036_chip(port) != 0)
47 return;
48
49 sio1036_enter_conf_state(dev);
50
51 /* Enable SMSC UART 0 */
52 /* Valid configuration cycle */
53 pnp_write_config(dev, 0x00, 0x28);
54
55 /* PP power/mode/cr lock */
56 pnp_write_config(dev, 0x01, 0x98 | LPT_POWER_DOWN);
57 pnp_write_config(dev, 0x02, 0x08 | UART_POWER_DOWN);
58
59 /*Auto power management*/
60 pnp_write_config(dev, 0x07, 0x00);
61
62 /*ECP FIFO threhod */
63 pnp_write_config(dev, 0x0A, 0x00 | IR_OUTPUT_MUX);
64
65 /*GPIO direction register 2 */
66 pnp_write_config(dev, 0x033, 0x00);
67
68 /*UART Mode */
69 pnp_write_config(dev, 0x0C, 0x02);
70
71 /* GPIO polarity regisgter 2 */
72 pnp_write_config(dev, 0x034, 0x00);
73
74 /* Enable SMSC UART 0 */
75 /*Set base io address */
76 pnp_write_config(dev, 0x25, (u8)(iobase >> 2));
77
78 /* Set UART IRQ onto 0x04 */
79 pnp_write_config(dev, 0x28, 0x04);
80
81 sio1036_exit_conf_state(dev);
82 }
83