Searched defs:src1_reg (Results 1 – 14 of 14) sorted by relevance
| /external/mesa3d/src/amd/compiler/ |
| D | aco_lower_to_hw_instr.cpp | 353 emit_int64_dpp_op(lower_context* ctx, PhysReg dst_reg, PhysReg src0_reg, PhysReg src1_reg, in emit_int64_dpp_op()
454 emit_int64_op(lower_context* ctx, PhysReg dst_reg, PhysReg src0_reg, PhysReg src1_reg, PhysReg vtmp, in emit_int64_op()
541 emit_dpp_op(lower_context* ctx, PhysReg dst_reg, PhysReg src0_reg, PhysReg src1_reg, PhysReg vtmp, in emit_dpp_op()
582 emit_op(lower_context* ctx, PhysReg dst_reg, PhysReg src0_reg, PhysReg src1_reg, PhysReg vtmp, in emit_op()
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_optimize.c | 584 struct rc_src_register src1_reg = inst_mad->U.I.SrcReg[1]; in peephole_mad_presub_bias() local
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| /external/pcre/src/sljit/ |
| D | sljitNativeARM_32.c | 2073 sljit_s32 src1_reg = 0; in emit_op() local
2506 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| D | sljitNativeRISCV_common.c | 2064 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| D | sljitNativePPC_common.c | 1986 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| D | sljitNativeARM_64.c | 1754 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| D | sljitNativeMIPS_common.c | 2671 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| D | sljitNativeARM_T2_32.c | 2073 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| D | sljitLir.c | 1739 sljit_s32 src1_reg, in check_sljit_emit_shift_into()
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| D | sljitNativeX86_common.c | 2772 sljit_s32 src1_reg,
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| D | sljitNativeLOONGARCH_64.c | 2048 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| D | sljitNativeS390X.c | 3001 sljit_s32 src1_reg, in sljit_emit_shift_into()
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| /external/mesa3d/src/freedreno/ir2/ |
| D | instr-a2xx.h | 141 uint8_t src1_reg : 6; member
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| /external/mesa3d/src/panfrost/midgard/ |
| D | midgard.h | 337 unsigned src1_reg : 5; member
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