| /external/cronet/tot/third_party/llvm-libc/src/AOR_v20.02/string/arm/ |
| D | memcpy.S | 90 vldr d0, [src, #\base + 8] define
92 vldr d1, [src, #\base + 16] define
94 vldr d2, [src, #\base + 24] define
98 vldr d0, [src, #\base + 40] define
100 vldr d1, [src, #\base + 48] define
102 vldr d2, [src, #\base + 56] define
109 vldr d0, [src, #\base + 8] define
111 vldr d1, [src, #\base + 16] define
113 vldr d2, [src, #\base + 24] define
116 vldr d0, [src, #\base + 40] define
[all …]
|
| /external/arm-optimized-routines/string/arm/ |
| D | memcpy.S | 89 vldr d0, [src, #\base + 8] define
91 vldr d1, [src, #\base + 16] define
93 vldr d2, [src, #\base + 24] define
97 vldr d0, [src, #\base + 40] define
99 vldr d1, [src, #\base + 48] define
101 vldr d2, [src, #\base + 56] define
108 vldr d0, [src, #\base + 8] define
110 vldr d1, [src, #\base + 16] define
112 vldr d2, [src, #\base + 24] define
115 vldr d0, [src, #\base + 40] define
[all …]
|
| /external/cronet/stable/third_party/llvm-libc/src/AOR_v20.02/string/arm/ |
| D | memcpy.S | 90 vldr d0, [src, #\base + 8] define
92 vldr d1, [src, #\base + 16] define
94 vldr d2, [src, #\base + 24] define
98 vldr d0, [src, #\base + 40] define
100 vldr d1, [src, #\base + 48] define
102 vldr d2, [src, #\base + 56] define
109 vldr d0, [src, #\base + 8] define
111 vldr d1, [src, #\base + 16] define
113 vldr d2, [src, #\base + 24] define
116 vldr d0, [src, #\base + 40] define
[all …]
|
| /external/libdav1d/src/arm/32/ |
| D | ipred.S | 2331 vldr d2, [r1, #16] define
2333 vldr d6, [r12, #16] define
2601 vldr d2, [r1, #16] define
2603 vldr d6, [r12, #16] define
2842 vldr d4, [r1, #16] define
|
| /external/llvm/test/MC/ARM/ |
| D | directive-fpu-instrs.s | 5 vldr d21, [r7, #296] label
13 vldr d21, [r7, #296] label
|
| D | single-precision-fp.s | 175 vldr d0, [sp] define
|
| D | big-endian-arm-fixup.s | 47 vldr d0, arm_pcrel_10_label+16 define
|
| /external/libffi/src/arm/ |
| D | sysv_msvc_arm32.S | 277 vldr d0, [r2] define
|
| D | sysv.S | 331 vldr d0, [r2] define
|
| /external/XNNPACK/src/jit/ |
| D | aarch32-assembler.cc | 402 void Assembler::vldr(SRegister sd, MemOperand op) { in vldr() function in xnnpack::aarch32::Assembler
412 void Assembler::vldr(DRegister dd, MemOperand op) { in vldr() function in xnnpack::aarch32::Assembler
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 4721 void vldr(DataType dt, DRegister rd, Location* location) { in vldr() function
4724 void vldr(DRegister rd, Location* location) { in vldr() function
4727 void vldr(Condition cond, DRegister rd, Location* location) { in vldr() function
4735 void vldr(DataType dt, DRegister rd, const MemOperand& operand) { in vldr() function
4738 void vldr(DRegister rd, const MemOperand& operand) { in vldr() function
4741 void vldr(Condition cond, DRegister rd, const MemOperand& operand) { in vldr() function
4751 void vldr(DataType dt, SRegister rd, Location* location) { in vldr() function
4754 void vldr(SRegister rd, Location* location) { in vldr() function
4757 void vldr(Condition cond, SRegister rd, Location* location) { in vldr() function
4765 void vldr(DataType dt, SRegister rd, const MemOperand& operand) { in vldr() function
[all …]
|
| D | assembler-aarch32.cc | 19607 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
19705 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
19761 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
19859 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 5008 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
5020 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
5030 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
5042 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
|
| /external/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 594 __ vldr(d7, &l_05f0); in Generate_4() local
1424 __ vldr(s0, &l_0d24); in Generate_10() local
1526 __ vldr(d7, &l_0d10); in Generate_11() local
|