1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ 2 3 #ifndef __SOC_MEDIATEK_MT8195_MT6360_H__ 4 #define __SOC_MEDIATEK_MT8195_MT6360_H__ 5 6 #include <stdint.h> 7 8 #define MT6360_LDO_I2C_ADDR 0x64 9 #define MT6360_PMIC_I2C_ADDR 0x1a 10 11 #define MT6360_DATA(_enreg, _enmask, _vreg, _vmask, _table) \ 12 { \ 13 .enable_reg = _enreg, \ 14 .enable_mask = _enmask, \ 15 .vsel_reg = _vreg, \ 16 .vsel_mask = _vmask, \ 17 .vsel_table = _table, \ 18 .vsel_table_len = ARRAY_SIZE(_table), \ 19 } 20 21 enum { 22 MT6360_INDEX_LDO = 0, 23 MT6360_INDEX_PMIC, 24 MT6360_INDEX_COUNT, 25 }; 26 27 /* 28 * This must match the regulator IDs defined in EC's BC1.2 MT6360 driver. 29 * Please do NOT change the order. 30 */ 31 enum mt6360_regulator_id { 32 MT6360_LDO3 = 0, 33 MT6360_LDO5, 34 MT6360_LDO6, 35 MT6360_LDO7, 36 MT6360_BUCK1, 37 MT6360_BUCK2, 38 MT6360_LDO1, 39 MT6360_LDO2, 40 MT6360_REGULATOR_COUNT, 41 }; 42 43 struct mt6360_i2c_data { 44 u8 bus; 45 u8 addr; 46 }; 47 48 struct mt6360_data { 49 uint8_t enable_reg; 50 uint8_t enable_mask; 51 uint8_t vsel_reg; 52 uint8_t vsel_mask; 53 const uint32_t *vsel_table; 54 uint32_t vsel_table_len; 55 }; 56 57 void mt6360_init(uint8_t bus); 58 void mt6360_enable(enum mt6360_regulator_id id, uint8_t enable); 59 uint8_t mt6360_is_enabled(enum mt6360_regulator_id id); 60 void mt6360_set_voltage(enum mt6360_regulator_id id, u32 voltage_uv); 61 u32 mt6360_get_voltage(enum mt6360_regulator_id id); 62 63 #endif 64