1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /*
4 * A generic romstage (pre-ram) driver for various Winbond Super I/O chips.
5 *
6 * The following is derived directly from the vendor Winbond's data-sheets:
7 *
8 * To toggle between `configuration mode` and `normal operation mode` as to
9 * manipulation the various LDN's in Winbond Super I/O's we are required to
10 * pass magic numbers `passwords keys`.
11 *
12 * WINBOUND_ENTRY_KEY := enable configuration : 0x87
13 * WINBOUND_EXIT_KEY := disable configuration : 0xAA
14 *
15 * To modify a LDN's configuration register, we use the index port to select
16 * the index of the LDN and then write to the data port to alter the
17 * parameters. A default index, data port pair is 0x4E, 0x4F respectively, a
18 * user modified pair is 0x2E, 0x2F respectively.
19 *
20 */
21
22 #include <arch/io.h>
23 #include <device/pnp_ops.h>
24 #include <device/pnp.h>
25 #include <stdint.h>
26 #include "winbond.h"
27
28 #define WINBOND_ENTRY_KEY 0x87
29 #define WINBOND_EXIT_KEY 0xAA
30
31 /* Enable configuration: pass entry key '0x87' into index port dev. */
pnp_enter_conf_state(pnp_devfn_t dev)32 void pnp_enter_conf_state(pnp_devfn_t dev)
33 {
34 u16 port = dev >> 8;
35 outb(WINBOND_ENTRY_KEY, port);
36 outb(WINBOND_ENTRY_KEY, port);
37 }
38
39 /* Disable configuration: pass exit key '0xAA' into index port dev. */
pnp_exit_conf_state(pnp_devfn_t dev)40 void pnp_exit_conf_state(pnp_devfn_t dev)
41 {
42 u16 port = dev >> 8;
43 outb(WINBOND_EXIT_KEY, port);
44 }
45
46 /* Bring up early serial debugging output before the RAM is initialized. */
winbond_enable_serial(pnp_devfn_t dev,u16 iobase)47 void winbond_enable_serial(pnp_devfn_t dev, u16 iobase)
48 {
49 pnp_enter_conf_state(dev);
50 pnp_set_logical_device(dev);
51 pnp_set_enable(dev, 0);
52 pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
53 pnp_set_enable(dev, 1);
54 pnp_exit_conf_state(dev);
55 }
56
winbond_set_pinmux(pnp_devfn_t dev,uint8_t offset,uint8_t mask,uint8_t state)57 void winbond_set_pinmux(pnp_devfn_t dev, uint8_t offset, uint8_t mask, uint8_t state)
58 {
59 uint8_t byte;
60
61 /* Configure pin mux */
62 pnp_enter_conf_state(dev);
63 byte = pnp_read_config(dev, offset);
64 byte &= ~mask;
65 byte |= state;
66 pnp_write_config(dev, offset, byte);
67 pnp_exit_conf_state(dev);
68 }
69
winbond_set_clksel_48(pnp_devfn_t dev)70 void winbond_set_clksel_48(pnp_devfn_t dev)
71 {
72 u8 reg8;
73
74 pnp_enter_conf_state(dev);
75 reg8 = pnp_read_config(dev, 0x24);
76 reg8 |= (1 << 6); /* Set the clock input to 48MHz. */
77 pnp_write_config(dev, 0x24, reg8);
78 pnp_exit_conf_state(dev);
79 }
80