| /external/mesa3d/src/compiler/glsl/ |
| D | gl_nir_lower_packed_varyings.c | 378 unsigned writemask) in bitwise_assign_pack()
408 unsigned writemask = 0x3; in bitwise_assign_pack() local
453 nir_def *value, unsigned writemask) in bitwise_assign_unpack()
527 unsigned writemask, bool is_64bit) in create_store_deref()
579 nir_def *rhs_swizzle, unsigned writemask, in lower_arraylike()
643 nir_def *rhs_swizzle, unsigned writemask, in lower_varying()
812 unsigned writemask = ((1 << components) - 1) << location_frac; in lower_varying() local
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| D | gl_nir_lower_xfb_varying.c | 130 unsigned writemask = (1 << components) - 1; in copy_to_new_var() local
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_pair_regalloc.c | 134 unsigned int writemask = rc_variable_writemask_sum(variable); in variable_get_class() local
284 unsigned int chan, writemask = 0; in do_advanced_regalloc() local
327 unsigned int writemask = reg_get_writemask(reg); in do_advanced_regalloc() local
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| D | radeon_opcodes.c | 406 rc_compute_sources_for_writemask(const struct rc_instruction *inst, unsigned int writemask, in rc_compute_sources_for_writemask()
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| D | radeon_rename_regs.c | 40 unsigned writemask; in rc_rename_regs() local
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| D | radeon_variable.c | 248 unsigned int writemask; in get_variable_pair_helper() local
406 unsigned int writemask = 0; in rc_variable_writemask_sum() local
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| D | r3xx_vertprog.c | 657 unsigned int writemask = rc_variable_writemask_sum(var_ptr->Item); in allocate_temporary_registers() local
685 unsigned int writemask = reg_get_writemask(reg); in allocate_temporary_registers() local
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| D | radeon_regalloc.c | 302 rc_find_class(const struct rc_class *classes, unsigned int writemask, in rc_find_class()
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| D | radeon_dataflow_swizzles.c | 419 clear_channels(struct rc_instruction *inst, unsigned writemask) in clear_channels()
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| D | radeon_regalloc.h | 107 get_reg_id(unsigned int index, unsigned int writemask) in get_reg_id()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_lower_fragcolor.c | 74 nir_component_mask_t writemask = nir_intrinsic_write_mask(instr); in lower_fragcolor_intrin() local
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| D | nir_gather_tcs_info.c | 208 unsigned writemask = nir_intrinsic_write_mask(intr); in nir_gather_tcs_info() local
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| D | nir_lower_const_arrays_to_uniforms.c | 56 nir_src *const_src, unsigned writemask) in set_const_initialiser()
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| /external/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_instr_export.cpp | 18 writemask_to_swizzle(int writemask, char *buf) in writemask_to_swizzle()
153 int writemask, in ScratchIOInstr()
175 int writemask, in ScratchIOInstr()
274 int writemask = 0; in from_string() local
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| D | sfn_shader.h | 71 int writemask() const { return m_writemask; } in writemask() function
72 void set_writemask(int writemask) { m_writemask = writemask; } in set_writemask()
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| D | sfn_shader.cpp | 77 ShaderOutput::ShaderOutput(int location, int writemask, gl_varying_slot varying_slot): in ShaderOutput()
1085 int writemask = nir_intrinsic_write_mask(ir); in visit() local
1103 int writemask = nir_intrinsic_write_mask(ir); in visit() local
1169 int writemask = nir_intrinsic_write_mask(intr); in emit_store_scratch() local
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| /external/mesa3d/src/gallium/frontends/d3d10umd/ |
| D | ShaderTGSI.c | 221 uint writemask; member
401 swizzle_reg(struct ureg_src src, uint writemask, in swizzle_reg()
427 unsigned writemask = in dcl_base_output() local
456 unsigned writemask = in dcl_base_input() local
709 unsigned writemask) in translate_operand()
821 unsigned writemask = in translate_dst_operand() local
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_nir_aos.c | 146 unsigned writemask, in emit_store_var()
191 unsigned writemask) in swizzle_writemask()
211 unsigned writemask, in emit_store_reg()
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| /external/mesa3d/src/intel/compiler/elk/ |
| D | elk_vec4.cpp | 107 unsigned writemask) in dst_reg()
118 unsigned writemask) in dst_reg()
420 unsigned writemask = 0; in opt_vector_float() local
2070 scalarize_predicate(elk_predicate predicate, unsigned writemask) in scalarize_predicate()
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| D | elk_vec4_nir.cpp | 354 unsigned writemask = 1 << i; in nir_emit_load_const() local
473 int writemask = WRITEMASK_X; in nir_emit_intrinsic() local
2028 int writemask = devinfo->ver == 4 ? WRITEMASK_W : WRITEMASK_X; in nir_emit_texture() local
2060 int mrf, writemask; in nir_emit_texture() local
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| /external/mesa3d/src/gallium/frontends/lavapipe/ |
| D | lvp_nir_lower_ray_queries.c | 46 unsigned writemask) in nir_store_array()
72 unsigned writemask) in rq_store_var()
101 nir_def *value, unsigned writemask) in rq_store_array()
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| /external/mesa3d/src/amd/vulkan/nir/ |
| D | radv_nir_lower_ray_queries.c | 50 …tore_array(nir_builder *b, nir_variable *array, nir_def *index, nir_def *value, unsigned writemask) in nir_store_array()
74 rq_store_var(nir_builder *b, nir_def *index, rq_variable *var, nir_def *value, unsigned writemask) in rq_store_var()
101 unsigned writemask) in rq_store_array()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_text.c | 400 unsigned *writemask ) in parse_opt_writemask()
769 unsigned writemask; in parse_dst_operand() local
1246 unsigned writemask; in parse_declaration() local
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| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_text.c | 466 uint *writemask ) in parse_opt_writemask()
835 uint writemask; in parse_dst_operand() local
1308 uint writemask; in parse_declaration() local
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| /external/mesa3d/src/amd/common/nir/ |
| D | ac_nir_lower_ps_early.c | 185 unsigned writemask = nir_intrinsic_write_mask(intrin); in optimize_lower_ps_outputs() local
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