| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 132 const ZRegister& zm) { in and_()
141 const ZRegister& zm) { in bic()
150 const ZRegister& zm) { in eor()
159 const ZRegister& zm) { in orr()
198 const ZRegister& zm) { in asr()
238 const ZRegister& zm) { in asrr()
273 const ZRegister& zm) { in lsl()
295 const ZRegister& zm) { in lslr()
330 const ZRegister& zm) { in lsr()
352 const ZRegister& zm) { in lsrr()
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| D | macro-assembler-sve-aarch64.cc | 505 const ZRegister& zm, in NoncommutativeArithmeticHelper()
527 const ZRegister& zm, in FPCommutativeArithmeticHelper()
722 const ZRegister& zm, in Fabd()
737 const ZRegister& zm, in Fmul()
752 const ZRegister& zm, in Fmulx()
767 const ZRegister& zm, in Fmax()
782 const ZRegister& zm, in Fmin()
797 const ZRegister& zm, in Fmaxnm()
812 const ZRegister& zm, in Fminnm()
970 const ZRegister& zm) { in Mla()
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| D | macro-assembler-aarch64.h | 3607 void Add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Add()
3642 void And(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in And()
3678 void Asr(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Asr()
3703 void Bic(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Bic()
3812 const ZRegister& zm) { in Clasta()
3820 const ZRegister& zm) { in Clasta()
3832 const ZRegister& zm) { in Clastb()
3840 const ZRegister& zm) { in Clastb()
3862 const ZRegister& zm) { in Cmpeq()
3883 const ZRegister& zm) { in Cmpge()
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| D | simulator-aarch64.cc | 2245 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_PdT_PgZ_ZnT_ZmT() local
2309 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdB_ZnB_ZmB() local
2610 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdT_PgZ_ZnT_ZmT() local
2626 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdT_ZnT_ZmT() local
2674 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdT_ZnT_ZmTb() local
2839 SimVRegister& zm = ReadVRegister(instr->GetRm()); in SimulateSVEInterleavedArithLong() local
2916 SimVRegister& zm = ReadVRegister(instr->GetRm()); in SimulateSVEPmull128() local
2934 SimVRegister& zm = ReadVRegister(instr->GetRm()); in SimulateSVEIntMulLongVec() local
2983 SimVRegister& zm = ReadVRegister(instr->GetRm()); in SimulateSVEAddSubHigh() local
3116 SimVRegister& zm = ReadVRegister(zm_code); in SimulateSVESaturatingMulAddHigh() local
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| D | logic-aarch64.cc | 7178 const LogicVRegister& zm) { in SVEBitwiseLogicalUnpredicatedHelper()
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| /external/rust/android-crates-io/crates/zerotrie/benches/ |
| D | overview.rs | 56 let zm: ZeroMap<[u8], u32> = data.iter().map(|(a, b)| (*a, *b as u32)).collect(); in get_basic_bench() localVariable
66 let zm: ZeroMap<[u8], u8> = data.iter().map(|(k, v)| (*k, *v as u8)).collect(); in get_basic_bench() localVariable
150 let zm: ZeroMap<[u8], u32> = litemap.iter().map(|(a, b)| (*a, *b as u32)).collect(); in get_subtags_bench_helper() localVariable
160 let zm: ZeroMap<[u8], u8> = litemap.iter().map(|(k, v)| (*k, *v as u8)).collect(); in get_subtags_bench_helper() localVariable
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| /external/rust/android-crates-io/crates/zerotrie/tests/ |
| D | asciitrie_test.rs | 61 let zm: ZeroMap<[u8], u32> = data_ascii.iter().map(|(a, b)| (*a, *b as u32)).collect(); in test_basic() localVariable
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| D | builder_test.rs | 839 let zm: zerovec::ZeroMap<[u8], u32> = litemap.iter().map(|(a, b)| (*a, *b as u32)).collect(); in test_short_subtags() localVariable
843 let zm: zerovec::ZeroMap<[u8], u8> = litemap.iter().map(|(a, b)| (*a, *b as u8)).collect(); in test_short_subtags() localVariable
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| /external/mesa3d/src/gallium/drivers/zink/ |
| D | zink_program.c | 66 shader_key_matches_tcs_nongenerated(const struct zink_shader_module *zm, const struct zink_shader_k… in shader_key_matches_tcs_nongenerated()
78 shader_key_matches(const struct zink_shader_module *zm, in shader_key_matches()
101 shader_module_hash(const struct zink_shader_module *zm) in shader_module_hash()
138 struct zink_shader_module *zm; in create_shader_module_for_stage() local
245 struct zink_shader_module *zm; in create_shader_module_for_stage_optimal() local
347 zink_destroy_shader_module(struct zink_screen *screen, struct zink_shader_module *zm) in zink_destroy_shader_module()
361 struct zink_shader_module *zm = util_dynarray_pop(sc, struct zink_shader_module*); in destroy_shader_cache() local
387 …struct zink_shader_module *zm = get_shader_module_for_stage(ctx, screen, prog->shaders[i], prog, i… in update_gfx_shader_modules() local
437 …struct zink_shader_module *zm = create_shader_module_for_stage(ctx, screen, prog->shaders[i], prog… in generate_gfx_program_modules() local
467 …struct zink_shader_module *zm = create_shader_module_for_stage_optimal(ctx, screen, prog->shaders[… in generate_gfx_program_modules_optimal() local
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| /external/vixl/test/aarch64/ |
| D | test-assembler-sve-aarch64.cc | 382 ZRegister zm = z3.WithLaneSize(lane_size_in_bits); in MlaMlsHelper() local
5047 ZRegister zm = z27.WithLaneSize(lane_size_in_bits); in IntArithHelper() local
11629 int index_fn) { in SdotUdotHelper()
11648 ZRegister zm = z3.WithLaneSize(lane_size_in_bits / 4); in SdotUdotHelper() local
12112 ZRegister zm = z31.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12298 ZRegister zm = z28.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12809 ZRegister zm = z28.WithLaneSize(kDRegSize); in BitwiseShiftWideElementsHelper() local
16659 ZRegister zm = z3.WithLaneSize(lane_size_in_bits); in FPMulAccHelper() local
17871 double zm[] = {-0.0, inf_n, inf_n, -2.0, inf_n, nan, nan, inf_p}; in TEST_SVE() local
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| /external/cronet/tot/net/base/registry_controlled_domains/ |
| D | effective_tld_names.gperf | 9780 zm, 0 keyword
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| /external/cronet/stable/net/base/registry_controlled_domains/ |
| D | effective_tld_names.gperf | 9780 zm, 0 keyword
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