Searched +full:- +full:- +full:configuration (Results 1 – 25 of 1688) sorted by relevance
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| /external/robolectric/robolectric/src/test/java/org/robolectric/android/ |
| D | BootstrapTest.java | 3 import static android.content.res.Configuration.COLOR_MODE_HDR_MASK;
4 import static android.content.res.Configuration.COLOR_MODE_HDR_NO;
5 import static android.content.res.Configuration.COLOR_MODE_WIDE_COLOR_GAMUT_MASK;
6 import static android.content.res.Configuration.COLOR_MODE_WIDE_COLOR_GAMUT_NO;
7 import static android.content.res.Configuration.KEYBOARDHIDDEN_SOFT;
8 import static android.content.res.Configuration.KEYBOARDHIDDEN_YES;
9 import static android.content.res.Configuration.KEYBOARD_12KEY;
10 import static android.content.res.Configuration.KEYBOARD_NOKEYS;
11 import static android.content.res.Configuration.NAVIGATIONHIDDEN_YES;
12 import static android.content.res.Configuration.NAVIGATION_DPAD;
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| /external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Library/ |
| D | PciLib.h | 2 Provides services to access PCI Configuration Space.
4 These functions perform PCI configuration cycles using the default PCI configuration
5 access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses,
7 alternate access method. Modules will typically use the PCI Library for its PCI configuration
13 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
14 SPDX-License-Identifier: BSD-2-Clause-Patent
38 Registers a PCI device so PCI configuration registers may be accessed after
41 Registers the PCI device specified by Address so all the PCI configuration registers
65 Reads an 8-bit PCI configuration register.
67 Reads and returns the 8-bit PCI configuration register specified by Address.
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| D | PciSegmentLib.h | 2 Provides services to access PCI Configuration Space on a platform with multiple PCI segments.
4 The PCI Segment Library function provide services to read, write, and modify the PCI configuration
20 These functions perform PCI configuration cycles using the default PCI configuration access
21 method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, or it
23 access method. Modules will typically use the PCI Segment Library for its PCI configuration
26 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
27 SPDX-License-Identifier: BSD-2-Clause-Patent
67 Register a PCI device so PCI configuration registers may be accessed after
91 Reads an 8-bit PCI configuration register.
93 Reads and returns the 8-bit PCI configuration register specified by Address.
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| D | PciExpressLib.h | 2 Provides services to access PCI Configuration Space using the MMIO PCI Express window.
5 configuration cycles must be through the PCI Express MMIO window whose base address
9 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
10 SPDX-License-Identifier: BSD-2-Clause-Patent
38 Registers a PCI device so PCI configuration registers may be accessed after
41 Registers the PCI device specified by Address so all the PCI configuration
66 Reads an 8-bit PCI configuration register.
68 Reads and returns the 8-bit PCI configuration register specified by Address.
77 @return The read value from the PCI configuration register.
87 Writes an 8-bit PCI configuration register.
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| D | PciCf8Lib.h | 2 Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC.
5 configuration cycles must be through I/O ports 0xCF8 and 0xCFC. This library only allows
8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
36 Registers a PCI device so PCI configuration registers may be accessed after
39 Registers the PCI device specified by Address so all the PCI configuration registers
64 Reads an 8-bit PCI configuration register.
66 Reads and returns the 8-bit PCI configuration register specified by Address.
76 @return The read value from the PCI configuration register.
86 Writes an 8-bit PCI configuration register.
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| D | S3PciSegmentLib.h | 2 The multiple segments PCI configuration Library Services that carry out
3 PCI configuration and enable the PCI operations to be replayed during an
7 SPDX-License-Identifier: BSD-2-Clause-Patent
47 Reads an 8-bit PCI configuration register, and saves the value in the S3 script to
50 Reads and returns the 8-bit PCI configuration register specified by Address.
57 @return The 8-bit PCI configuration register specified by Address.
67 Writes an 8-bit PCI configuration register, and saves the value in the S3 script to
70 …Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
78 @return The value written to the PCI configuration register.
89 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value, and saves
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| D | S3PciLib.h | 2 The PCI configuration Library Services that carry out PCI configuration and enable
6 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
8 SPDX-License-Identifier: BSD-2-Clause-Patent
33 Reads and returns the 8-bit PCI configuration register specified by Address,
43 @return The value read from the PCI configuration register.
53 Writes an 8-bit PCI configuration register, and saves the value in the S3
56 Writes the 8-bit PCI configuration register specified by Address with the
66 @return The value written to the PCI configuration register.
77 Performs a bitwise OR of an 8-bit PCI configuration register with
78 an 8-bit value, and saves the value in the S3 script to be replayed on S3 resume.
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| /external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/ |
| D | PciLib.h | 2 Provides services to access PCI Configuration Space.
4 These functions perform PCI configuration cycles using the default PCI configuration
5 access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses,
7 alternate access method. Modules will typically use the PCI Library for its PCI configuration
13 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
14 SPDX-License-Identifier: BSD-2-Clause-Patent
38 Registers a PCI device so PCI configuration registers may be accessed after
41 Registers the PCI device specified by Address so all the PCI configuration registers
65 Reads an 8-bit PCI configuration register.
67 Reads and returns the 8-bit PCI configuration register specified by Address.
[all …]
|
| D | PciSegmentLib.h | 2 Provides services to access PCI Configuration Space on a platform with multiple PCI segments.
4 The PCI Segment Library function provide services to read, write, and modify the PCI configuration
20 These functions perform PCI configuration cycles using the default PCI configuration access
21 method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, or it
23 access method. Modules will typically use the PCI Segment Library for its PCI configuration
26 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
27 SPDX-License-Identifier: BSD-2-Clause-Patent
68 Register a PCI device so PCI configuration registers may be accessed after
92 Reads an 8-bit PCI configuration register.
94 Reads and returns the 8-bit PCI configuration register specified by Address.
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| D | PciExpressLib.h | 2 Provides services to access PCI Configuration Space using the MMIO PCI Express window.
5 configuration cycles must be through the PCI Express MMIO window whose base address
9 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
10 SPDX-License-Identifier: BSD-2-Clause-Patent
38 Registers a PCI device so PCI configuration registers may be accessed after
41 Registers the PCI device specified by Address so all the PCI configuration
66 Reads an 8-bit PCI configuration register.
68 Reads and returns the 8-bit PCI configuration register specified by Address.
77 @return The read value from the PCI configuration register.
87 Writes an 8-bit PCI configuration register.
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| D | PciCf8Lib.h | 2 Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC.
5 configuration cycles must be through I/O ports 0xCF8 and 0xCFC. This library only allows
8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
37 Registers a PCI device so PCI configuration registers may be accessed after
40 Registers the PCI device specified by Address so all the PCI configuration registers
65 Reads an 8-bit PCI configuration register.
67 Reads and returns the 8-bit PCI configuration register specified by Address.
77 @return The read value from the PCI configuration register.
87 Writes an 8-bit PCI configuration register.
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| D | S3PciSegmentLib.h | 2 The multiple segments PCI configuration Library Services that carry out
3 PCI configuration and enable the PCI operations to be replayed during an
7 SPDX-License-Identifier: BSD-2-Clause-Patent
48 Reads an 8-bit PCI configuration register, and saves the value in the S3 script to
51 Reads and returns the 8-bit PCI configuration register specified by Address.
58 @return The 8-bit PCI configuration register specified by Address.
68 Writes an 8-bit PCI configuration register, and saves the value in the S3 script to
71 …Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
79 @return The value written to the PCI configuration register.
90 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value, and saves
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| D | S3PciLib.h | 2 The PCI configuration Library Services that carry out PCI configuration and enable
6 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
8 SPDX-License-Identifier: BSD-2-Clause-Patent
33 Reads and returns the 8-bit PCI configuration register specified by Address,
43 @return The value read from the PCI configuration register.
53 Writes an 8-bit PCI configuration register, and saves the value in the S3
56 Writes the 8-bit PCI configuration register specified by Address with the
66 @return The value written to the PCI configuration register.
77 Performs a bitwise OR of an 8-bit PCI configuration register with
78 an 8-bit value, and saves the value in the S3 script to be replayed on S3 resume.
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| /external/coreboot/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Library/ |
| D | PciLib.h | 2 Provides services to access PCI Configuration Space.
4 These functions perform PCI configuration cycles using the default PCI configuration
5 access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses,
7 alternate access method. Modules will typically use the PCI Library for its PCI configuration
13 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
14 SPDX-License-Identifier: BSD-2-Clause-Patent
38 Registers a PCI device so PCI configuration registers may be accessed after
41 Registers the PCI device specified by Address so all the PCI configuration registers
65 Reads an 8-bit PCI configuration register.
67 Reads and returns the 8-bit PCI configuration register specified by Address.
[all …]
|
| D | PciSegmentLib.h | 2 Provides services to access PCI Configuration Space on a platform with multiple PCI segments.
4 The PCI Segment Library function provide services to read, write, and modify the PCI configuration
20 These functions perform PCI configuration cycles using the default PCI configuration access
21 method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, or it
23 access method. Modules will typically use the PCI Segment Library for its PCI configuration
26 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
27 SPDX-License-Identifier: BSD-2-Clause-Patent
68 Register a PCI device so PCI configuration registers may be accessed after
92 Reads an 8-bit PCI configuration register.
94 Reads and returns the 8-bit PCI configuration register specified by Address.
[all …]
|
| D | PciExpressLib.h | 2 Provides services to access PCI Configuration Space using the MMIO PCI Express window.
5 configuration cycles must be through the 256 MB PCI Express MMIO window whose base address
8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
37 Registers a PCI device so PCI configuration registers may be accessed after
40 Registers the PCI device specified by Address so all the PCI configuration
65 Reads an 8-bit PCI configuration register.
67 Reads and returns the 8-bit PCI configuration register specified by Address.
76 @return The read value from the PCI configuration register.
86 Writes an 8-bit PCI configuration register.
[all …]
|
| D | PciCf8Lib.h | 2 Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC.
5 configuration cycles must be through I/O ports 0xCF8 and 0xCFC. This library only allows
8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
37 Registers a PCI device so PCI configuration registers may be accessed after
40 Registers the PCI device specified by Address so all the PCI configuration registers
65 Reads an 8-bit PCI configuration register.
67 Reads and returns the 8-bit PCI configuration register specified by Address.
77 @return The read value from the PCI configuration register.
87 Writes an 8-bit PCI configuration register.
[all …]
|
| D | S3PciSegmentLib.h | 2 The multiple segments PCI configuration Library Services that carry out
3 PCI configuration and enable the PCI operations to be replayed during an
7 SPDX-License-Identifier: BSD-2-Clause-Patent
48 Reads an 8-bit PCI configuration register, and saves the value in the S3 script to
51 Reads and returns the 8-bit PCI configuration register specified by Address.
58 @return The 8-bit PCI configuration register specified by Address.
68 Writes an 8-bit PCI configuration register, and saves the value in the S3 script to
71 …Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
79 @return The value written to the PCI configuration register.
90 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value, and saves
[all …]
|
| D | S3PciLib.h | 2 The PCI configuration Library Services that carry out PCI configuration and enable
6 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
8 SPDX-License-Identifier: BSD-2-Clause-Patent
33 Reads and returns the 8-bit PCI configuration register specified by Address,
43 @return The value read from the PCI configuration register.
53 Writes an 8-bit PCI configuration register, and saves the value in the S3
56 Writes the 8-bit PCI configuration register specified by Address with the
66 @return The value written to the PCI configuration register.
77 Performs a bitwise OR of an 8-bit PCI configuration register with
78 an 8-bit value, and saves the value in the S3 script to be replayed on S3 resume.
[all …]
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| /external/coreboot/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/ |
| D | PciLib.h | 2 Provides services to access PCI Configuration Space.
4 These functions perform PCI configuration cycles using the default PCI configuration
5 access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses,
7 alternate access method. Modules will typically use the PCI Library for its PCI configuration
13 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
17 http://opensource.org/licenses/bsd-license.php
44 Registers a PCI device so PCI configuration registers may be accessed after
47 Registers the PCI device specified by Address so all the PCI configuration registers
71 Reads an 8-bit PCI configuration register.
73 Reads and returns the 8-bit PCI configuration register specified by Address.
[all …]
|
| D | PciExpressLib.h | 2 Provides services to access PCI Configuration Space using the MMIO PCI Express window.
5 configuration cycles must be through the 256 MB PCI Express MMIO window whose base address
8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
12 http://opensource.org/licenses/bsd-license.php
43 Registers a PCI device so PCI configuration registers may be accessed after
46 Registers the PCI device specified by Address so all the PCI configuration
71 Reads an 8-bit PCI configuration register.
73 Reads and returns the 8-bit PCI configuration register specified by Address.
82 @return The read value from the PCI configuration register.
92 Writes an 8-bit PCI configuration register.
[all …]
|
| D | PciSegmentLib.h | 2 Provides services to access PCI Configuration Space on a platform with multiple PCI segments.
4 The PCI Segment Library function provide services to read, write, and modify the PCI configuration
20 These functions perform PCI configuration cycles using the default PCI configuration access
21 method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, or it
23 access method. Modules will typically use the PCI Segment Library for its PCI configuration
26 Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
30 http://opensource.org/licenses/bsd-license.php
74 Register a PCI device so PCI configuration registers may be accessed after
98 Reads an 8-bit PCI configuration register.
100 Reads and returns the 8-bit PCI configuration register specified by Address.
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|
| D | PciCf8Lib.h | 2 Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC.
5 configuration cycles must be through I/O ports 0xCF8 and 0xCFC. This library only allows
8 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
12 http://opensource.org/licenses/bsd-license.php
43 Registers a PCI device so PCI configuration registers may be accessed after
46 Registers the PCI device specified by Address so all the PCI configuration registers
71 Reads an 8-bit PCI configuration register.
73 Reads and returns the 8-bit PCI configuration register specified by Address.
83 @return The read value from the PCI configuration register.
93 Writes an 8-bit PCI configuration register.
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| /external/libusb/msvc/ |
| D | ProjectConfigurations.Base.props | 1 <?xml version="1.0" encoding="utf-8"?>
5 <Configuration>Debug</Configuration>
9 <Configuration>Debug</Configuration>
13 <Configuration>Debug</Configuration>
17 <Configuration>Debug</Configuration>
21 <Configuration>Release</Configuration>
25 <Configuration>Release</Configuration>
29 <Configuration>Release</Configuration>
33 <Configuration>Release</Configuration>
36 <ProjectConfiguration Include="Debug-MT|ARM">
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| /external/parameter-framework/upstream/test/functional-tests-legacy/PfwTestCase/Domains/ |
| D | tDomain_Elements_Sequences.py | 1 # -*-coding:utf-8 -*
3 # Copyright (c) 2011-2015, Intel Corporation
35 --------------------------
36 - [setElementSequence] function
37 - [getElementSequence] function
40 ------------
41 - Testing setElementSequence errors
42 - Testing getElementSequence errors
43 - Testing nominal case
57 self.configuration = "Conf_0"
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