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/external/mesa3d/include/drm-uapi/
Damdgpu_drm.h1 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
84 * %AMDGPU_GEM_DOMAIN_CPU System memory that is not GPU accessible.
87 * %AMDGPU_GEM_DOMAIN_GTT GPU accessible system memory, mapped into the
88 * GPU's virtual address space via gart. Gart memory linearizes non-contiguous
89 * pages of system memory, allows GPU access system memory in a linearized
95 * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
159 * May depend on GPU instructions to flush caches to system scope explicitly.
165 /* Flag that BO should not be cached by GPU. Coherent without having to flush
166 * GPU caches explicitly
172 /* Flag that BO should be coherent across devices when using device-level
[all …]
/external/kernel-headers/original/uapi/drm/
Damdgpu_drm.h1 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
78 * %AMDGPU_GEM_DOMAIN_CPU System memory that is not GPU accessible.
81 * %AMDGPU_GEM_DOMAIN_GTT GPU accessible system memory, mapped into the
82 * GPU's virtual address space via gart. Gart memory linearizes non-contiguous
83 * pages of system memory, allows GPU access system memory in a linearized
89 * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
153 * May depend on GPU instructions to flush caches to system scope explicitly.
159 /* Flag that BO should not be cached by GPU. Coherent without having to flush
160 * GPU caches explicitly
166 /* Flag that BO should be coherent across devices when using device-level
[all …]
/external/libdrm/include/drm/
Damdgpu_drm.h1 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
78 * %AMDGPU_GEM_DOMAIN_CPU System memory that is not GPU accessible.
81 * %AMDGPU_GEM_DOMAIN_GTT GPU accessible system memory, mapped into the
82 * GPU's virtual address space via gart. Gart memory linearizes non-contiguous
83 * pages of system memory, allows GPU access system memory in a linearized
89 * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
153 * May depend on GPU instructions to flush caches to system scope explicitly.
159 /* Flag that BO should not be cached by GPU. Coherent without having to flush
160 * GPU caches explicitly
166 /* Flag that BO should be coherent across devices when using device-level
[all …]
/external/perfetto/test/trace_processor/diff_tests/parser/graphics/
Dtests_drm_related_ftrace_events.py8 # http://www.apache.org/licenses/LICENSE-2.0
57 query="""
76 "vblank-0",6159770881976,0,"signal","vblank seqno",3551,"[NULL]"
77 "vblank-0",6159770993376,0,"deliver","vblank seqno",3551,"[NULL]"
83 query="""
102 "sched-ring0",9246165349383,4729073,"job","gpu sched job",13481,"[NULL]"
103 "sched-ring0",9246170078456,3941571,"job","gpu sched job",13482,"[NULL]"
104 "sched-ring0",9246174020027,25156,"job","gpu sched job",13483,"[NULL]"
105 "sched-ring0",9246181933273,4726312,"job","gpu sched job",13484,"[NULL]"
111 query="""
[all …]
Dtests.py8 # http://www.apache.org/licenses/LICENSE-2.0
28 query="""
55 16,"Display_layer2",-1,"12",12,"layer2"
57 24,"Display_layer1",-1,"13",13,"layer1"
61 34,"GPU_1 layer1",-1,"21",21,"layer1"
68 53,"APP_2 layer2",-1,"0",0,"layer2"
71 61,"SF_2 layer2",-1,"24",24,"layer2"
73 63,"APP_1 layer1",-1,"0",0,"layer1"
82 83,"GPU_1 layer1",-1,"30",30,"layer1"
86 92,"GPU_1 layer2",-1,"35",35,"layer2"
[all …]
Dtests_gpu_trace.py8 # http://www.apache.org/licenses/LICENSE-2.0
27 query="""
38 14,0.000000,"Triangle Acceleration",0,"Number of triangles per ms-ms","27/21:21"
41 24,9.000000,"Triangle Acceleration",0,"Number of triangles per ms-ms","27/21:21"
44 34,7.000000,"Triangle Acceleration",0,"Number of triangles per ms-ms","27/21:21"
50 query="""
58 0,"GPU Frequency","clock speed","/22"
62 4,"Triangle Acceleration","Number of triangles per ms-ms","27/21:21"
68 query='''
116 …"Unknown GPU Queue 3","[NULL]",40,5,"render stage(4)",0,"[NULL]","[NULL]",42,0,"[NULL]",0,"[NULL]"…
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/external/skia/tools/gpu/
DGpuTimer.h4 * Use of this source code is governed by a BSD-style license that can be
21 * Platform-independent interface for timing operations on the GPU.
32 * Returns whether this timer can detect disjoint GPU operations while timing. If false, a query
38 * Inserts a "start timing" command in the GPU command stream.
42 fActiveTimer = this->onQueueTimerStart(); in queueStart()
46 * Inserts a "stop timing" command in the GPU command stream.
48 * @return a query object that can retrieve the time elapsed once the timer has completed.
52 this->onQueueTimerStop(fActiveTimer); in queueStop()
57 kInvalid, //<! the timer query is invalid.
58 kPending, //<! the timer is still running on the GPU.
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/external/ComputeLibrary/src/runtime/CL/gemm_auto_heuristics/
DCLGEMMAutoHeuristics.cpp4 * SPDX-License-Identifier: MIT
30 #include "src/gpu/cl/kernels/gemm/ClGemmHelpers.h"
31 #include "src/gpu/cl/kernels/gemm/IClGemmKernelConfig.h"
32 #include "src/gpu/cl/kernels/gemm/native/ClGemmNativeKernelConfig.h"
33 #include "src/gpu/cl/kernels/gemm/reshaped/ClGemmReshapedKernelConfig.h"
34 #include "src/gpu/cl/kernels/gemm/reshaped_only_rhs/ClGemmReshapedOnlyRhsKernelConfig.h"
48 GEMMTypeResult select_mlgo_gemm_kernel(const CommonQuery &query, bool reshape_b_only_on_first_run) in select_mlgo_gemm_kernel() argument
56 …lgo_heuristics->get()->query_gemm_type(mlgo::Query{ string_from_target(query.gpu_target), query.da… in select_mlgo_gemm_kernel()
60 …ARM_COMPUTE_LOG_INFO_MSG_WITH_FORMAT_CORE("MLGOHeuristics query returns gemm type: %s.", to_string… in select_mlgo_gemm_kernel()
64 ARM_COMPUTE_LOG_INFO_MSG_CORE("MLGOHeuristics query failed"); in select_mlgo_gemm_kernel()
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/external/igt-gpu-tools/include/drm-uapi/
Damdgpu_drm.h1 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
78 * %AMDGPU_GEM_DOMAIN_CPU System memory that is not GPU accessible.
81 * %AMDGPU_GEM_DOMAIN_GTT GPU accessible system memory, mapped into the
82 * GPU's virtual address space via gart. Gart memory linearizes non-contiguous
83 * pages of system memory, allows GPU access system memory in a linezrized
89 * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
198 /* GPU reset status */
207 /* indicate gpu reset occured after ctx created */
211 /* indicate some job from this context once cause gpu hang */
215 #define AMDGPU_CTX_PRIORITY_UNSET -2048
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/external/mesa3d/src/gallium/drivers/asahi/
Dagx_query.c3 * Copyright 2019-2020 Collabora, Ltd.
4 * SPDX-License-Identifier: MIT
22 is_occlusion(struct agx_query *query) in is_occlusion() argument
24 switch (query->type) { in is_occlusion()
35 is_timer(struct agx_query *query) in is_timer() argument
37 switch (query->type) { in is_timer()
47 /* The GPU allocation itself */
51 /* Bitset of query indices that are in use */
59 agx_bo_unreference(heap->dev, heap->bo); in agx_destroy_oq_heap()
68 heap->dev = agx_device(ctx->base.screen); in agx_alloc_oq_heap()
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/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_query.c6 * SPDX-License-Identifier: MIT
46 struct si_query_sw *query = (struct si_query_sw *)squery; in si_query_sw_destroy() local
48 sctx->b.screen->fence_reference(sctx->b.screen, &query->fence, NULL); in si_query_sw_destroy()
49 FREE(query); in si_query_sw_destroy()
98 unreachable("query type does not correspond to winsys id"); in winsys_id_from_type()
104 struct si_query_sw *query = (struct si_query_sw *)squery; in si_query_sw_begin() local
107 switch (query->b.type) { in si_query_sw_begin()
112 query->begin_result = sctx->num_draw_calls; in si_query_sw_begin()
115 query->begin_result = sctx->num_decompress_calls; in si_query_sw_begin()
118 query->begin_result = sctx->num_compute_calls; in si_query_sw_begin()
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/external/libdrm/amdgpu/
Damdgpu.h47 /*--------------------------------------------------------------------------*/
48 /* --------------------------- Defines ------------------------------------ */
49 /*--------------------------------------------------------------------------*/
70 /*--------------------------------------------------------------------------*/
71 /* ----------------------------- Enums ------------------------------------ */
72 /*--------------------------------------------------------------------------*/
87 /** DMA-buf fd handle */
96 /** Define known types of GPU VM VA ranges */
107 /*--------------------------------------------------------------------------*/
108 /* -------------------------- Datatypes ----------------------------------- */
[all …]
/external/mesa3d/src/gallium/drivers/r600/
Dr600_query.c4 * SPDX-License-Identifier: MIT
42 struct r600_query_sw *query = (struct r600_query_sw *)rquery; in r600_query_sw_destroy() local
44 rscreen->b.fence_reference(&rscreen->b, &query->fence, NULL); in r600_query_sw_destroy()
45 FREE(query); in r600_query_sw_destroy()
70 default: unreachable("query type does not correspond to winsys id"); in winsys_id_from_type()
77 struct r600_query_sw *query = (struct r600_query_sw *)rquery; in r600_query_sw_begin() local
80 switch(query->b.type) { in r600_query_sw_begin()
85 query->begin_result = rctx->num_draw_calls; in r600_query_sw_begin()
88 query->begin_result = rctx->num_decompress_calls; in r600_query_sw_begin()
91 query->begin_result = rctx->num_mrt_draw_calls; in r600_query_sw_begin()
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/external/mesa3d/src/gallium/drivers/tegra/
Dtegra_context.c2 * Copyright © 2014-2018 NVIDIA Corporation
41 if (context->base.stream_uploader) in tegra_destroy()
42 u_upload_destroy(context->base.stream_uploader); in tegra_destroy()
44 context->gpu->destroy(context->gpu); in tegra_destroy()
61 if (!pindirect && (!draws[0].count || !pinfo->instance_count)) in tegra_draw_vbo()
68 if (pinfo && ((pindirect && pindirect->buffer) || pinfo->index_size)) { in tegra_draw_vbo()
71 if (pindirect && pindirect->buffer) { in tegra_draw_vbo()
73 indirect.buffer = tegra_resource_unwrap(pindirect->buffer); in tegra_draw_vbo()
74 indirect.indirect_draw_count = tegra_resource_unwrap(pindirect->indirect_draw_count); in tegra_draw_vbo()
78 if (pinfo->index_size && !pinfo->has_user_indices) in tegra_draw_vbo()
[all …]
/external/ComputeLibrary/tests/validation/CL/UNIT/
DMLGOHeuristics.cpp4 * SPDX-License-Identifier: MIT
46 gemm-version, [1,2,1] in TEST_SUITE()
47 ip-type,gpu in TEST_SUITE()
49 <heuristics-table> in TEST_SUITE()
50 0, g76 , 8, f32, best-performance, static, gemm-type, [m,n,k,n] in TEST_SUITE()
52 1, g71 , 8, f16, best-performance, static, gemm-config-reshaped-only-rhs, [m,n,k,n] in TEST_SUITE()
53 2, g76 , 8, f16, best-performance, static, gemm-config-reshaped, [m,n,k,n] in TEST_SUITE()
54 </heuristics-table> in TEST_SUITE()
57 l , 1, gemm-type, reshaped in TEST_SUITE()
61 l, 4, gemm-type, reshaped-only-rhs in TEST_SUITE()
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/external/pytorch/aten/src/ATen/native/transformers/cuda/
Dsdp_utils.cpp58 if (dprops->major >= 8) { in use_tensor_cores()
61 if (dprops->major >= 7) { in use_tensor_cores()
68 bool is_half = (params.query.dtype() == at::kHalf) || in minimum_gemm_alignment()
69 (params.query.dtype() == at::kBFloat16); in minimum_gemm_alignment()
72 if (dprops->major >= 8) { in minimum_gemm_alignment()
85 const auto query_size_last = params.query.sym_size(-1); in check_head_dim_size_flash()
86 const auto key_size_last = params.key.sym_size(-1); in check_head_dim_size_flash()
87 const auto value_size_last = params.value.sym_size(-1); in check_head_dim_size_flash()
94 " Got Query.size(-1): ", in check_head_dim_size_flash()
96 ", Key.size(-1): ", in check_head_dim_size_flash()
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/external/mesa3d/src/gallium/drivers/v3d/
Dv3d_query_pipe.c25 * Gallium query object support.
27 * The HW has native support for occlusion queries, with the query result
54 v3d_destroy_query_pipe(struct v3d_context *v3d, struct v3d_query *query) in v3d_destroy_query_pipe() argument
56 struct v3d_query_pipe *pquery = (struct v3d_query_pipe *)query; in v3d_destroy_query_pipe()
58 if (pquery->sync[0]) in v3d_destroy_query_pipe()
59 drmSyncobjDestroy(v3d->fd, pquery->sync[0]); in v3d_destroy_query_pipe()
60 if (pquery->sync[1]) in v3d_destroy_query_pipe()
61 drmSyncobjDestroy(v3d->fd, pquery->sync[1]); in v3d_destroy_query_pipe()
62 v3d_bo_unreference(&pquery->bo); in v3d_destroy_query_pipe()
67 v3d_begin_query_pipe(struct v3d_context *v3d, struct v3d_query *query) in v3d_begin_query_pipe() argument
[all …]
/external/pytorch/test/
Dtest_cuda_multigpu.py179 num_sync_1 = torch.cuda.memory_stats(device).get(stat_key_n_sync, -1)
181 num_alloc_1 = torch.cuda.memory_stats(device).get(stat_key_n_alloc, -1)
185 num_free_1 = torch.cuda.memory_stats(device).get(stat_key_n_free, -1)
189 num_sync_2 = torch.cuda.memory_stats(device).get(stat_key_n_sync, -1)
191 num_alloc_2 = torch.cuda.memory_stats(device).get(stat_key_n_alloc, -1)
193 num_free_2 = torch.cuda.memory_stats(device).get(stat_key_n_free, -1)
261 assert_change(-x) # in case that tensors2[i] is empty
270 assert_change(-1, reset_peak=True)
276 assert_change(-1, reset_peak=True)
292 @unittest.skipIf(not TEST_MULTIGPU, "only one GPU detected")
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/external/angle/src/gpu_info_util/
DSystemInfo_linux.cpp3 // Use of this source code is governed by a BSD-style license that can be
7 // SystemInfo_linux.cpp: implementation of the Linux-specific parts of SystemInfo.h
74 if (!GetPCIDevicesWithLibPCI(&(info->gpus))) in GetSystemInfo()
77 // Try vulkan backend to get GPU info in GetSystemInfo()
84 if (info->gpus.size() == 0) in GetSystemInfo()
91 for (size_t i = 0; i < info->gpus.size(); ++i) in GetSystemInfo()
93 GPUDeviceInfo *gpu = &info->gpus[i]; in GetSystemInfo() local
95 // New GPUs might be added inside this loop, don't query for their driver version again in GetSystemInfo()
96 if (!gpu->driverVendor.empty()) in GetSystemInfo()
101 if (IsAMD(gpu->vendorId)) in GetSystemInfo()
[all …]
/external/perfetto/test/trace_processor/diff_tests/metrics/chrome/
Dtests_processes.py8 # http://www.apache.org/licenses/LICENSE-2.0
27 query="""
35 18277,"GPU Process","Gpu"
42 query="""
51 query="""
62 query="""
73 query="""
88 18277,"GPU Process","Gpu"
94 query="""
127 query="""
[all …]
/external/perfetto/test/trace_processor/diff_tests/parser/power/
Dtests_energy_breakdown.py8 # http://www.apache.org/licenses/LICENSE-2.0
27 query="""
47 query="""
61 query="""
83 query="""
93 10234,"GPU"
94 10190,"GPU"
95 10235,"GPU"
103 query="""
/external/mesa3d/src/panfrost/lib/kmod/
Dpanthor_kmod.c4 * SPDX-License-Identifier: MIT
20 #include "drm-uapi/dma-buf.h"
21 #include "drm-uapi/panthor_drm.h"
44 /* Fields used for auto-VA management. Since the kernel doesn't do it for
63 /* Current VM sync point. Incremented every time a GPU job or VM
81 struct drm_panthor_gpu_info gpu; member
113 /* Cache GPU and CSIF information. */ in panthor_kmod_dev_create()
114 struct drm_panthor_dev_query query = { in panthor_kmod_dev_create() local
116 .size = sizeof(panthor_dev->props.gpu), in panthor_kmod_dev_create()
117 .pointer = (uint64_t)(uintptr_t)&panthor_dev->props.gpu, in panthor_kmod_dev_create()
[all …]
/external/intel-media-driver/media_softlet/agnostic/common/os/
Dmos_commandbuffer_next.h2 * Copyright (c) 2019-2021, Intel Corporation
76 //! \brief Bind current command buffer to gived gpu context
78 //! Gpu context to be binded
85 //! \brief Unbind current command buffer from gpu context
87 //! Indicate it is unbinded from dummy or native gpu context in async mode
103 //! \brief Query command buffer if it is in HW execution
112 //! \brief Query command buffer if it is in Cmd List
121 //! \brief Query command buffer ready to use
149 //! \brief Get last native gpu context
151 //! Pointer to the last native gpu context
[all …]
/external/mesa3d/src/gallium/drivers/freedreno/
Dfreedreno_query_acc.h3 * SPDX-License-Identifier: MIT
24 * freedreno_query_hw.[ch], later generations can accumulate the per-
26 * But we still need to handle pausing/resuming the query across stage
30 * - one per accumulated query type, registered/implemented by gpu
32 * - knows how to emit cmdstream to pause/resume a query instance
35 * - one instance per query object
36 * - each query object has it's own result buffer, which may
43 * Base class for all query samples, on the GPU 'avail' is written to
44 * one when the query result is available.
62 /* Set if the provider should still count while !ctx->active_queries */
[all …]
/external/mesa3d/docs/gallium/
Dcontext.rst10 Note that resource/texture allocation is not per-context but per-screen.
14 -------
31 the CSO module will always replace all samplers at once (no sub-ranges).
34 * :ref:`depth-stencil-alpha`: ``*_depth_stencil_alpha_state``
75 Non-CSO State
79 objects. They all follow simple, one-method binding calls, e.g.
85 * ``set_sample_mask`` sets the per-context multisample sample mask. Note
87 the framebuffer surface(s) are multisampled. Also, this mask is AND-ed
100 and y would be [xmin..xmax-1] and [ymin..ymax-1]. The number of scissors
106 modes - include and exclude, which define whether the supplied
[all …]

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