| /external/mesa3d/src/amd/compiler/tests/ |
| D | test_sdwa.cpp | 4 * SPDX-License-Identifier: MIT
20 &bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1])->sdwa();
21 sdwa->neg[0] = sdwa->neg[1] = sdwa->abs[0] = sdwa->abs[1] = true;
23 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1b), inputs[0], inputs[1]);
25 sdwa = &bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1])->sdwa();
26 sdwa->sel[0] = SubdwordSel::sbyte2;
27 sdwa->sel[1] = SubdwordSel::uword1;
43 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
58 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]);
59 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]);
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| D | test_optimizer_postRA.cpp | 4 * SPDX-License-Identifier: MIT
20 auto& startpgm = bld.instructions->at(0);
21 assert(startpgm->opcode == aco_opcode::p_startpgm);
22 startpgm->definitions[0].setFixed(reg_v0);
32 auto vcmp = bld.vopc(aco_opcode::v_cmp_eq_u32, bld.def(bld.lm, vcc), Operand::zero(),
34 auto sand = bld.sop2(Builder::s_and, bld.def(bld.lm, reg_s0), bld.def(s1, scc), bld.vcc(vcmp),
35 Operand(exec, bld.lm));
36 bld.branch(aco_opcode::p_cbranch_z, bld.scc(sand.def(1).getTemp()));
46 //! s2: %c:s[0-1], s1: %d:scc = s_and_b64 %b:vcc, %x:exec
49 //! p_unit_test 1, %f:vcc
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| D | test_optimizer.cpp | 4 * SPDX-License-Identifier: MIT
16 //! v1: %res0 = v_mul_f32 %a, -%b
18 Temp neg_b = fneg(inputs[1]);
19 writeout(0, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], neg_b));
21 //~gfx9! v1: %neg_a = v_mul_f32 -1.0, %a
23 //~gfx10! v1: %res1 = v_max_f32 0x123456, -%a
24 //! p_unit_test 1, %res1
26 writeout(1, bld.vop2(aco_opcode::v_max_f32, bld.def(v1), Operand::c32(0x123456u), neg_a));
31 writeout(2, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), neg_neg_a, inputs[1]));
36 writeout(3, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), abs_neg_a, inputs[1]));
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| D | test_regalloc.cpp | 4 * SPDX-License-Identifier: MIT
21 for (amd_gfx_level cc = GFX8; cc <= GFX10_3; cc = (amd_gfx_level)((unsigned)cc + 1)) {
31 bld.pseudo(aco_opcode::p_split_vector, bld.def(v2b), bld.def(v2b), inputs[0]);
36 auto result1 = bld.vop1(aco_opcode::v_cvt_f32_f16, bld.def(v1), tmp.def(1).getTemp());
37 auto result2 = bld.vop1(aco_opcode::v_cvt_f32_f16, bld.def(v1), tmp.def(0).getTemp());
39 writeout(1, result2);
54 … bld.pseudo(aco_opcode::p_split_vector, bld.def(v2b), bld.def(v2b), inputs[0]).def(1).getTemp();
58 Temp lo = bld.vop1(aco_opcode::v_not_b32, bld.def(v2b), Operand::zero());
61 bld.pseudo(aco_opcode::p_create_vector, bld.def(v1), lo, hi);
67 //>> s2: %op0:s[0-1] = p_startpgm
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| D | test_insert_nops.cpp | 4 * SPDX-License-Identifier: MIT
15 bld.mubuf(aco_opcode::buffer_load_dword, Definition(dst, v1), Operand(PhysReg(0), s4), in create_mubuf()
22 bld.mubuf(aco_opcode::buffer_store_dword, Operand(PhysReg(0), s4), Operand(src, v1), in create_mubuf_store()
30 create_instruction(aco_opcode::image_sample, Format::MIMG, 3 + addrs, 1)}; in create_mimg()
31 mimg->definitions[0] = Definition(PhysReg(256), v1); in create_mimg()
32 mimg->operands[0] = Operand(PhysReg(0), s8); in create_mimg()
33 mimg->operands[1] = Operand(PhysReg(0), s4); in create_mimg()
34 mimg->operands[2] = Operand(v1); in create_mimg()
36 mimg->operands[3 + i] = Operand(PhysReg(256 + (nsa ? i * 2 : i)), v1); in create_mimg()
37 mimg->mimg().dmask = 0x1; in create_mimg()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_arit.c | 3 * Copyright 2009-2010 VMware, Inc.
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
35 * resort machine-specific intrinsics directly. The functions here hide all
39 * - it is very easy given we have all necessary information readily available
40 * - LLVM optimization passes fail to simplify several vector expressions
41 * - We often know value constraints which the optimization passes have no way
42 * of knowing, such as when source arguments are known to be in [0, 1] range.
50 #include <llvm/Config/llvm-config.h>
87 * No checks for special case values of a or b = 1 or 0 are done.
92 lp_build_min_simple(struct lp_build_context *bld, in lp_build_min_simple() argument
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| D | lp_bld_sample_aos.c | 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
30 * Texture sampling -- AoS.
75 * \param out_i resulting sub-block pixel coordinate for coord0
78 lp_build_sample_wrap_nearest_int(struct lp_build_sample_context *bld, in lp_build_sample_wrap_nearest_int() argument
90 struct lp_build_context *int_coord_bld = &bld->int_coord_bld; in lp_build_sample_wrap_nearest_int()
91 LLVMBuilderRef builder = bld->gallivm->builder; in lp_build_sample_wrap_nearest_int()
94 length_minus_one = lp_build_sub(int_coord_bld, length, int_coord_bld->one); in lp_build_sample_wrap_nearest_int()
101 struct lp_build_context *coord_bld = &bld->coord_bld; in lp_build_sample_wrap_nearest_int()
115 coord = lp_build_max(int_coord_bld, coord, int_coord_bld->zero); in lp_build_sample_wrap_nearest_int()
139 lp_build_coord_repeat_npot_linear_int(struct lp_build_sample_context *bld, in lp_build_coord_repeat_npot_linear_int() argument
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| D | lp_bld_tgsi_soa.c | 4 * Copyright 2007-2008 VMware, Inc.
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
31 * TGSI to LLVM IR translation -- SoA.
75 * If non-zero, the generated LLVM IR will print intermediate results on every TGSI
79 * - take execution masks in consideration
80 * - debug control-flow instructions
107 assert(mask->function_stack_size > 0); in func_ctx()
108 assert(mask->function_stack_size <= LP_MAX_NUM_FUNCS); in func_ctx()
109 return &mask->function_stack[mask->function_stack_size - 1]; in func_ctx()
118 struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base); in mask_vec() local
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| D | lp_bld_sample.c | 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
30 * Texture sampling -- common code.
55 * Bri-linear factor. Should be greater than one.
104 if (!view || !view->texture) in lp_sampler_static_texture_state()
107 const struct pipe_resource *texture = view->texture; in lp_sampler_static_texture_state()
109 state->format = view->format; in lp_sampler_static_texture_state()
110 state->res_format = texture->format; in lp_sampler_static_texture_state()
111 state->swizzle_r = view->swizzle_r; in lp_sampler_static_texture_state()
112 state->swizzle_g = view->swizzle_g; in lp_sampler_static_texture_state()
113 state->swizzle_b = view->swizzle_b; in lp_sampler_static_texture_state()
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| D | lp_bld_sample_soa.c | 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
30 * Texture sampling -- SoA.
70 lp_build_gather_resident(struct lp_build_context *bld, in lp_build_gather_resident() argument
77 struct lp_type type = lp_int_type(bld->type); in lp_build_gather_resident()
79 struct gallivm_state *gallivm = bld->gallivm; in lp_build_gather_resident()
80 LLVMBuilderRef builder = gallivm->builder; in lp_build_gather_resident()
85 dynamic_state->residency(gallivm, resources_type, resources_ptr, 0, NULL); in lp_build_gather_resident()
118 * The computation depends on whether the texture is 1D, 2D or 3D.
121 * texel[1] = green values
126 lp_build_sample_texel_soa(struct lp_build_sample_context *bld, in lp_build_sample_texel_soa() argument
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| /external/icu/icu4c/source/test/cintltst/ |
| D | ulocbuildertst.c | 19 static void Verify(ULocaleBuilder* bld, const char* expected, const char* msg) { in Verify() argument
23 if (ulocbld_copyErrorTo(bld, ©Status)) { in Verify()
26 if (!ulocbld_copyErrorTo(bld, &errorStatus)) { in Verify()
30 ulocbld_buildLanguageTag(bld, tag, ULOC_FULLNAME_CAPACITY, &status); in Verify()
47 // "L": +1 = language in TestLocaleBuilder()
48 // "S": +1 = script in TestLocaleBuilder()
49 // "R": +1 = region in TestLocaleBuilder()
50 // "V": +1 = variant in TestLocaleBuilder()
51 // "K": +1 = Unicode locale key / +2 = Unicode locale type in TestLocaleBuilder()
52 // "A": +1 = Unicode locale attribute in TestLocaleBuilder()
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| /external/cronet/stable/third_party/icu/source/test/cintltst/ |
| D | ulocbuildertst.c | 19 static void Verify(ULocaleBuilder* bld, const char* expected, const char* msg) { in Verify() argument
23 if (ulocbld_copyErrorTo(bld, ©Status)) { in Verify()
26 if (!ulocbld_copyErrorTo(bld, &errorStatus)) { in Verify()
30 ulocbld_buildLanguageTag(bld, tag, ULOC_FULLNAME_CAPACITY, &status); in Verify()
47 // "L": +1 = language in TestLocaleBuilder()
48 // "S": +1 = script in TestLocaleBuilder()
49 // "R": +1 = region in TestLocaleBuilder()
50 // "V": +1 = variant in TestLocaleBuilder()
51 // "K": +1 = Unicode locale key / +2 = Unicode locale type in TestLocaleBuilder()
52 // "A": +1 = Unicode locale attribute in TestLocaleBuilder()
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| /external/cronet/tot/third_party/icu/source/test/cintltst/ |
| D | ulocbuildertst.c | 19 static void Verify(ULocaleBuilder* bld, const char* expected, const char* msg) { in Verify() argument
23 if (ulocbld_copyErrorTo(bld, ©Status)) { in Verify()
26 if (!ulocbld_copyErrorTo(bld, &errorStatus)) { in Verify()
30 ulocbld_buildLanguageTag(bld, tag, ULOC_FULLNAME_CAPACITY, &status); in Verify()
47 // "L": +1 = language in TestLocaleBuilder()
48 // "S": +1 = script in TestLocaleBuilder()
49 // "R": +1 = region in TestLocaleBuilder()
50 // "V": +1 = variant in TestLocaleBuilder()
51 // "K": +1 = Unicode locale key / +2 = Unicode locale type in TestLocaleBuilder()
52 // "A": +1 = Unicode locale attribute in TestLocaleBuilder()
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| /external/mesa3d/src/intel/compiler/ |
| D | test_lower_scoreboard.cpp | 43 fs_builder bld; member in scoreboard_test
47 : bld(NULL, 0) in scoreboard_test()
52 devinfo->ver = 12; in scoreboard_test()
53 devinfo->verx10 = devinfo->ver * 10; in scoreboard_test()
55 compiler->devinfo = devinfo; in scoreboard_test()
56 brw_init_isa_info(&compiler->isa, devinfo); in scoreboard_test()
65 v = new fs_visitor(compiler, ¶ms, NULL, &prog_data->base, shader, 8, in scoreboard_test()
68 bld = fs_builder(v).at_end(); in scoreboard_test()
83 fs_inst *inst = (fs_inst *)block->start(); in instruction()
85 inst = (fs_inst *)inst->next; in instruction()
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| D | test_opt_cmod_propagation.cpp | 43 fs_builder bld; member in cmod_propagation_test
65 &prog_data->base, shader, 8, false, false) {} in cmod_propagation_fs_visitor()
70 : bld(NULL, 0) in cmod_propagation_test()
75 compiler->devinfo = devinfo; in cmod_propagation_test()
86 bld = fs_builder(v).at_end(); in cmod_propagation_test()
88 devinfo->ver = 9; in cmod_propagation_test()
89 devinfo->verx10 = devinfo->ver * 10; in cmod_propagation_test()
104 fs_inst *inst = (fs_inst *)block->start(); in instruction()
106 inst = (fs_inst *)inst->next; in instruction()
118 v->cfg->dump(); in cmod_propagation()
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| D | test_opt_saturate_propagation.cpp | 43 fs_builder bld; member in saturate_propagation_test
54 &prog_data->base, shader, 16, false, false) {} in saturate_propagation_fs_visitor()
59 : bld(NULL, 0) in saturate_propagation_test()
64 compiler->devinfo = devinfo; in saturate_propagation_test()
75 bld = fs_builder(v).at_end(); in saturate_propagation_test()
77 devinfo->ver = 9; in saturate_propagation_test()
78 devinfo->verx10 = devinfo->ver * 10; in saturate_propagation_test()
94 fs_inst *inst = (fs_inst *)block->start(); in instruction()
96 inst = (fs_inst *)inst->next; in instruction()
108 v->cfg->dump(); in saturate_propagation()
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| /external/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_lowering_nv50.cpp | 51 // -------------------
62 expandIntegerMUL(BuildUtil *bld, Instruction *mul) in expandIntegerMUL() argument
64 const bool highResult = mul->subOp == NV50_IR_SUBOP_MUL_HIGH; in expandIntegerMUL()
66 bool src1imm = mul->src(1).getImmediate(src1); in expandIntegerMUL()
69 switch (mul->sType) { in expandIntegerMUL()
72 default: fTy = mul->sType; break; in expandIntegerMUL()
87 bld->setPosition(mul, true); in expandIntegerMUL()
93 t[j] = bld->getSSA(fullSize); in expandIntegerMUL()
95 if (isSignedType(mul->sType) && highResult) { in expandIntegerMUL()
96 s[0] = bld->getSSA(fullSize); in expandIntegerMUL()
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| D | nv50_ir_lowering_gv100.cpp | 35 Value *pred = bld.getSSA(1, FILE_PREDICATE); in handleCMP()
37 bld.mkCmp(OP_SET, reverseCondCode(i->asCmp()->setCond), TYPE_U8, pred, in handleCMP()
38 i->sType, bld.mkImm(0), i->getSrc(2))->ftz = i->ftz; in handleCMP()
39 bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), i->getSrc(0), i->getSrc(1), pred); in handleCMP()
48 Value *carry = bld.getSSA(1, FILE_PREDICATE); in handleIADD64()
49 Value *def[2] = { bld.getSSA(), bld.getSSA() }; in handleIADD64()
53 if (i->getSrc(s)->reg.size == 8) { in handleIADD64()
54 bld.mkSplit(src[s], 4, i->getSrc(s)); in handleIADD64()
56 src[s][0] = i->getSrc(s); in handleIADD64()
57 src[s][1] = bld.mkImm(0); in handleIADD64()
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| D | nv50_ir_lowering_helper.cpp | 32 switch (insn->op) { in visit()
47 return handleSLCT(insn->asCmp()); in visit()
61 DataType dTy = insn->dType; in handleABS()
65 bld.setPosition(insn, false); in handleABS()
67 Value *neg = bld.getSSA(8); in handleABS()
69 Value *lo = bld.getSSA(), *hi = bld.getSSA(); in handleABS()
70 bld.mkOp2(OP_SUB, dTy, neg, bld.mkImm((uint64_t)0), insn->getSrc(0)); in handleABS()
71 bld.mkSplit(negComp, 4, neg); in handleABS()
72 bld.mkSplit(srcComp, 4, insn->getSrc(0)); in handleABS()
73 bld.mkCmp(OP_SLCT, CC_LT, TYPE_S32, lo, TYPE_S32, negComp[0], srcComp[0], srcComp[1]); in handleABS()
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| D | nv50_ir_lowering_nvc0.cpp | 34 #define QOP_SUBR 1
49 bld.setPosition(i, false); in handleDIV()
52 for (int s = 0; i->srcExists(s); ++s) { in handleDIV()
53 Instruction *ld = i->getSrc(s)->getInsn(); in handleDIV()
55 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV) || in handleDIV()
56 !(ld->src(0).getFile() == FILE_IMMEDIATE)) in handleDIV()
57 bld.mkMovToReg(s, i->getSrc(s)); in handleDIV()
59 assert(ld->getSrc(0) != NULL); in handleDIV()
60 bld.mkMovToReg(s, ld->getSrc(0)); in handleDIV()
63 i->setSrc(s, NULL); in handleDIV()
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| /external/mesa3d/src/compiler/nir/tests/ |
| D | comparison_pre_tests.cpp | 34 bld = nir_builder_init_simple_shader(MESA_SHADER_VERTEX, &options, in comparison_pre_test()
37 v1 = nir_imm_vec4(&bld, -2.0, -1.0, 1.0, 2.0); in comparison_pre_test()
38 v2 = nir_imm_vec4(&bld, 2.0, 1.0, -1.0, -2.0); in comparison_pre_test()
39 v3 = nir_imm_vec4(&bld, 3.0, 4.0, 5.0, 6.0); in comparison_pre_test()
44 ralloc_free(bld.shader); in ~comparison_pre_test()
48 struct nir_builder bld; member in comparison_pre_test
62 * vec4 32 ssa_0 = load_const (-2.0, -1.0, 1.0, 2.0) in TEST_F()
63 * vec4 32 ssa_1 = load_const ( 2.0, 1.0, -1.0, -2.0) in TEST_F()
68 * vec1 1 ssa_6 = flt ssa_5, ssa_3 in TEST_F()
78 * vec4 32 ssa_0 = load_const (-2.0, -1.0, 1.0, 2.0) in TEST_F()
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| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| D | lp_bld_interp.c | 4 * Copyright 2007-2008 VMware, Inc.
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
56 * We iterate over the quads in order 0, 1, 2, 3:
60 * #---0---#---1---#
64 * #---2---#---3---#
75 * # 0 | 1 #
76 * #---+---#
83 * 0 1 4 5
100 * oow = 1/w = 1/(w0 + dwdx*x + dwdy*y)
106 * da'dx = (dadx - dwdx*a)*oow
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_insert_exec_mask.cpp | 4 * SPDX-License-Identifier: MIT
23 mask_type_global = 1 << 0,
24 mask_type_exact = 1 << 1,
25 mask_type_wqm = 1 << 2,
26 mask_type_loop = 1 << 3, /* active lanes of a loop */
42 Operand op; /* Either a temporary, exec or const -1. */
57 exec_ctx(Program* program_) : program(program_), info(program->blocks.size()) {} in exec_ctx()
63 if (instr->isMUBUF()) { in needs_exact()
64 return instr->mubuf().disable_wqm; in needs_exact()
65 } else if (instr->isMTBUF()) { in needs_exact()
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| D | aco_instruction_selection.cpp | 5 * SPDX-License-Identifier: MIT
49 _aco_err(ctx->program, file, line, out); in _isel_err()
68 succ->logical_preds.emplace_back(pred_idx); in add_logical_edge()
74 succ->linear_preds.emplace_back(pred_idx); in add_linear_edge()
99 uint32_t id = ctx->first_temp_id + def->index; in get_ssa_temp()
100 return Temp(id, ctx->program->temp_rc[id]); in get_ssa_temp()
106 Builder bld(ctx->program, ctx->block); in create_alu_builder() local
107 bld.is_precise = instr->exact; in create_alu_builder()
108 bld.is_sz_preserve = nir_alu_instr_is_signed_zero_preserve(instr); in create_alu_builder()
109 bld.is_inf_preserve = nir_alu_instr_is_inf_preserve(instr); in create_alu_builder()
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| /external/mesa3d/src/intel/compiler/elk/ |
| D | elk_fs_nir.cpp | 56 fs_builder bld; member
69 static void fs_nir_emit_intrinsic(nir_to_elk_state &ntb, const fs_builder &bld, nir_intrinsic_instr…
82 const fs_builder &bld,
87 const fs_builder &bld,
106 const int loc = var->data.driver_location; in fs_nir_setup_outputs()
107 const unsigned var_vec4s = nir_variable_count_slots(var, var->type); in fs_nir_setup_outputs()
122 for (unsigned i = 1; i < reg_size; i++) { in fs_nir_setup_outputs()
127 elk_fs_reg reg = ntb.bld.vgrf(ELK_REGISTER_TYPE_F, 4 * reg_size); in fs_nir_setup_outputs()
130 s.outputs[loc + i] = offset(reg, ntb.bld, 4 * i); in fs_nir_setup_outputs()
144 s.uniforms = s.nir->num_uniforms / 4; in fs_nir_setup_uniforms()
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