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/external/cldr/docs/site/development/development-process/
Ddesign-proposals.md2 title: Design Proposals
5 # Design Proposals
7 This section contains design proposals, listed as subpages below.
9 …tion Additions](https://cldr.unicode.org/development/development-process/design-proposals/proposed…
11 [Alternate Time Formats](https://cldr.unicode.org/development/development-process/design-proposals/…
13 [BCP 47 Changes (DRAFT)](https://cldr.unicode.org/development/development-process/design-proposals/…
15 [BCP47 Syntax Mapping](https://cldr.unicode.org/development/development-process/design-proposals/bc…
17 …nonicalization](https://cldr.unicode.org/development/development-process/design-proposals/bcp47-va…
19 [BIDI handling of Structured Text](https://cldr.unicode.org/development/development-process/design-…
21 [Change to Sites?](https://cldr.unicode.org/development/development-process/design-proposals/change…
[all …]
/external/cldr/docs/site/
Dsitemap.tsv43 cldr-tc/design-wg
169 development/development-process/design-proposals
170 development/development-process/design-proposals/alternate-time-formats
171 development/development-process/design-proposals/bcp-47-changes-draft
172 development/development-process/design-proposals/bcp47-syntax-mapping
173 development/development-process/design-proposals/bcp47-validation-and-canonicalization
174 development/development-process/design-proposals/bidi-handling-of-structured-text
175 development/development-process/design-proposals/change-to-sites
176 …development/development-process/design-proposals/chinese-and-other-calendar-support-intercalary-mo…
177 development/development-process/design-proposals/consistent-casing
[all …]
/external/coreboot/src/mainboard/google/rex/variants/deku/
Dgpio.c29 /* GPP_A13 : net NC is not present in the given design */
31 /* GPP_A14 : net NC is not present in the given design */
33 /* GPP_A15 : net NC is not present in the given design */
39 /* GPP_A18 : net NC is not present in the given design */
44 /* GPP_B00 : net NC is not present in the given design */
48 /* GPP_B02 : net NC is not present in the given design */
50 /* GPP_B03 : net NC is not present in the given design */
54 /* GPP_B05 : net NC is not present in the given design */
56 /* GPP_B06 : net NC is not present in the given design */
58 /* GPP_B07 : net NC is not present in the given design */
[all …]
/external/mesa3d/src/nouveau/headers/nvidia/
Dg_nv_name_released.h173 { 0x1BA0, 0x0887, 0x1028, "NVIDIA GeForce GTX 1080 with Max-Q Design" },
175 { 0x1BA1, 0x08a1, 0x1028, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
176 { 0x1BA1, 0x08a2, 0x1028, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
177 { 0x1BA1, 0x1cce, 0x1043, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
178 { 0x1BA1, 0x1651, 0x1458, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
179 { 0x1BA1, 0x1653, 0x1458, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
180 { 0x1BA1, 0x11e8, 0x1462, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
181 { 0x1BA1, 0x11e9, 0x1462, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
182 { 0x1BA1, 0x1225, 0x1462, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
183 { 0x1BA1, 0x1226, 0x1462, "NVIDIA GeForce GTX 1070 with Max-Q Design" },
[all …]
/external/chromiumos-config/python/chromiumos/config/api/
Ddesign_pb2.py3 # source: chromiumos/config/api/design.proto
24 name='chromiumos/config/api/design.proto',
29design.proto\x12\x15\x63hromiumos.config.api\x1a,chromiumos/config/api/design_config_id.proto\x1a%…
37 full_name='chromiumos.config.api.Design.Config.Constraint.Level',
72 full_name='chromiumos.config.api.Design.CustomType',
103 full_name='chromiumos.config.api.Design.BoardIdPhaseEntry',
110 name='key', full_name='chromiumos.config.api.Design.BoardIdPhaseEntry.key', index=0,
117 name='value', full_name='chromiumos.config.api.Design.BoardIdPhaseEntry.value', index=1,
141 full_name='chromiumos.config.api.Design.SsfcValueEntry',
148 name='key', full_name='chromiumos.config.api.Design.SsfcValueEntry.key', index=0,
[all …]
/external/chromiumos-config/util/
Ddesign.star7 "@proto//chromiumos/config/api/design.proto",
29 REQUIRED = design_pb.Design.Config.Constraint.REQUIRED,
30 PREFERRED = design_pb.Design.Config.Constraint.PREFERRED,
31 OPTIONAL = design_pb.Design.Config.Constraint.OPTIONAL,
35 NO_CUSTOM = design_pb.Design.NO_CUSTOM,
36 WHITELABEL = design_pb.Design.WHITELABEL,
37 REBRAND = design_pb.Design.REBRAND,
66 """Builds a Design.Config.Constraint proto."""
67 return design_pb.Design.Config.Constraint(level = level, features = hw_features)
70 """Builds a Design.Config.Constrain proto for each of hw_features."""
[all …]
/external/coreboot/src/ec/purism/librem/acpi/
Dbattery.asl11 0xFFFFFFFF, /* 0x01: Design Capacity */
14 0xFFFFFFFF, /* 0x04: Design Voltage */
15 0x00000003, /* 0x05: Design Capacity of Warning */
16 0xFFFFFFFF, /* 0x06: Design Capacity of Low */
28 0xFFFFFFFF, // 0x02: Design Capacity
31 0xFFFFFFFF, // 0x05: Design Voltage
32 0x00000003, // 0x06: Design Capacity of Warning
33 0xFFFFFFFF, // 0x07: Design Capacity of Low
91 /* Design Voltage */
94 /* Design Capacity */
[all …]
/external/coreboot/src/ec/google/wilco/acpi/
Dbattery.asl120 /* Design Capacity */
127 /* Design Voltage */
130 /* Design Warning Capacity */
133 /* Design Low Capacity */
170 /* Design Capacity */
177 /* Design Voltage */
180 /* Design Warning Capacity */
183 /* Design Low Capacity */
217 0xFFFFFFFF, /* 0x01: Design Capacity */
220 0xFFFFFFFF, /* 0x04: Design Voltage */
[all …]
/external/chromiumos-config/payload_utils/
Djoin_config_payloads.py139 def merge_form_factor(design, name, device_form_factor): argument
142 logging.warning("Null form factor for '%s', skipping", design)
149 for design_config in design.configs:
161 # canonicalize design names to be compatible with the DLM database
163 canonical_name(design.name) for design in config_bundle.design_list
183 for design, name in zip(config_bundle.design_list, project_names):
197 merge_form_factor(design, name, rows[0].get('deviceFormFactor'))
428 def merge_device_brand(config_bundle, design, model, project_name): argument
429 """Merge brand information from model.yaml into specific Design instance.
431 The ConfigBundle and Design protos are updated in place with the information
[all …]
/external/coreboot/src/mainboard/google/rex/variants/screebo/
Dgpio.c31 /* GPP_A14 : net NC is not present in the given design */
33 /* GPP_A15 : net NC is not present in the given design */
53 /* GPP_B02 : net NC is not present in the given design */
55 /* GPP_B03 : net NC is not present in the given design */
60 /* GPP_B05 : net NC is not present in the given design */
68 /* GPP_B09 : net NC is not present in the given design */
116 /* GPP_C09 : net NC is not present in the given design */
118 /* GPP_C10 : net NC is not present in the given design */
147 /* GPP_D00 : net NC is not present in the given design */
155 /* GPP_D04 : net NC is not present in the given design */
[all …]
/external/chromiumos-config/proto/chromiumos/config/api/
Dmanaging_hardware_design_configs.md1 # Managing Hardware Design Configurations
19 different drivers on a single design. However, the expected locations of cameras
27 features a unique Hardware Design Configuration, and it will have a unique
28 Hardware Design Configuration ID (elaborated on later).
36 maps to Hardware Design Configuration Id. Futhermore, the SKU-ID field in [CBI]
40 constraints for all design and projects within the program. Octopus is a
43 **Design Project**: maps to a single set of PDF schematics. Often referred to as
44 just a Design. For example, Phaser is a Design within the Octopus Program. This
51 * Determining when to make a new Hardware Design Configuration Id. We will
90 Each Design (e.g. phaser within octopus) will define all of the valid possible
[all …]
Dprogram.proto10 import "chromiumos/config/api/design.proto";
35 // A segment of DesignConfigIds allocated to a given Design.
38 // allocated to each Design. For example, Design "A" gets ids [11, 20], Design
45 // Design the segment applies to.
48 // Min and max DesignConfigIds the Design can use. Both are inclusive.
55 // Associates a key to either a specific brand or design.
65 // guidelines for all hardware design projects developed under the given
69 // other hardware design project. They will either fully comply with the
126 // Specify the SoC for the design as a canonicalized string representing the
209 // The card configs to include for all design configs within this program.
[all …]
/external/pigweed/pw_kvs/
Ddocs.rst61 integrated :ref:`wear leveling <module-pw_kvs-design-wear>`. It's a relatively
82 .. grid-item-card:: :octicon:`stack` Design
83 :link: module-pw_kvs-design
157 Implement the :ref:`flash memory <module-pw_kvs-design-memory>` and
158 :ref:`flash partition <module-pw_kvs-design-partitions>` interfaces for
171 See :ref:`module-pw_kvs-design` for architectural details.
182 .. _module-pw_kvs-design:
185 Design chapter
189 <module-pw_kvs-design-memory>` as a :ref:`key-value entry
190 <module-pw_kvs-design-entries>` (KV entry) that consists of a header/metadata,
[all …]
/external/coreboot/src/ec/google/chromeec/acpi/
Dbattery.asl158 // Design Voltage
161 // Design Capacity
165 // Design Capacity of Warning
169 // Design Capacity of Low
198 // Design Voltage
201 // Design Capacity
205 // Design Capacity of Warning
209 // Design Capacity of Low
322 0xFFFFFFFF, // 0x01: Design Capacity
325 0xFFFFFFFF, // 0x04: Design Voltage
[all …]
/external/chromiumos-config/payload_utils/checker/common_checks/
Dcheck_topology_test.py12 from chromiumos.config.api.design_pb2 import Design
58 Design(configs=[
59 Design.Config(
63 Design.Config(
86 Design(configs=[
87 Design.Config(
91 Design.Config(
118 Design(configs=[
119 Design.Config(
124 Design(configs=[
[all …]
Dcheck_ids_test.py11 from chromiumos.config.api.design_pb2 import Design
19 Config = Design.Config
36 Design(program_id=ProgramId(value='testprogram1')),
37 Design(program_id=ProgramId(value='testprogram1')),
52 Design(program_id=ProgramId(value='testprogram1')),
53 Design(program_id=ProgramId(value='testprogram2')),
81 Design(
88 Design(
95 # Design 'c' doesn't have a segment.
96 Design(
[all …]
Dcheck_ids.py41 for design in project_config.design_list:
42 self.assertIn(design.program_id.value, program_ids)
57 for design in project_config.design_list:
59 segment = segment_map.get(design.id.value)
62 'No DesignConfigIdSegment found for design %s, constraints on ids '
64 design.id.value,
70 for config in design.configs:
97 # Flatten design config ID segments across programs
125 for design in project_config.design_list:
126 for config in design.configs:
/external/coreboot/src/southbridge/intel/i82371eb/
Di82371eb.c7 * - URL: http://www.intel.com/design/intarch/datashts/290550.htm
8 * - PDF: http://download.intel.com/design/intarch/datashts/29055002.pdf
14 * - URL: http://www.intel.com/design/chipsets/specupdt/297658.htm
15 * - PDF: http://download.intel.com/design/chipsets/specupdt/29765801.pdf
21 * - URL: http://www.intel.com/design/intarch/datashts/290562.htm
22 * - PDF: http://www.intel.com/design/intarch/datashts/29056201.pdf
27 * - URL: http://www.intel.com/design/chipsets/specupdt/297738.htm
28 * - PDF: http://www.intel.com/design/chipsets/specupdt/29773817.pdf
/external/perfetto/docs/
Dtoc.md96 * [Design documents](#)
97 * [API and ABI surface](design-docs/api-and-abi.md)
98 * [Batch Trace Processor](design-docs/batch-trace-processor.md)
99 * [Heapprofd design](design-docs/heapprofd-design.md)
100 * [Heapprofd wire protocol](design-docs/heapprofd-wire-protocol.md)
101 * [Heapprofd sampling](design-docs/heapprofd-sampling.md)
102 * [Life of a tracing session](design-docs/life-of-a-tracing-session.md)
103 * [Perfetto CI](design-docs/continuous-integration.md)
104 * [ProtoZero](design-docs/protozero.md)
105 * [Security model](design-docs/security-model.md)
[all …]
/external/chromiumos-config/go/src/go.chromium.org/chromiumos/config/go/api/
Ddesign.pb.go9 // source: chromiumos/config/api/design.proto
130 type Design struct { struct
137 // Globally unique design identifier.
139 // Program that defines the constraints for this design.
141 // ODM for the given hardware design.
143 // Design codename (human friendly).
150 // Supported hardware configurations for a given design.
168 func (x *Design) Reset() { argument
169 *x = Design{}
177 func (x *Design) String() string { argument
[all …]
/external/chromium-trace/catapult/third_party/polymer/components/paper-styles/
DREADME.md22 The `<paper-styles>` component provides simple ways to use Material Design CSS styles
26 … complete list of the colors defined in the Material Design [palette](https://www.google.com/desig…
30 background and accent colors that match the default Material Design theme
33 …dow.html](https://github.com/PolymerElements/paper-styles/blob/master/shadow.html): Material Design
34 [elevation](https://www.google.com/design/spec/what-is-material/elevation-shadows.html) and shadow …
38 Material Design [font](http://www.google.com/design/spec/style/typography.html#typography-styles) s…
Dpaper-styles.html15 The `<paper-styles>` component provides simple ways to use Material Design CSS styles
19 … complete list of the colors defined in the Material Design [palette](https://www.google.com/desig…
22 background and accent colors that match the default Material Design theme
24 …dow.html](https://github.com/PolymerElements/paper-styles/blob/master/shadow.html): Material Design
25 [elevation](https://www.google.com/design/spec/what-is-material/elevation-shadows.html) and shadow …
28 Material Design [font](http://www.google.com/design/spec/style/typography.html#typography-styles) s…
/external/coreboot/src/mainboard/razer/blade_stealth_kbl/acpi/
Dbattery.asl13 0xFFFFFFFF, /* 0x01: Design Capacity */
16 0xFFFFFFFF, /* 0x04: Design Voltage */
17 0x00000003, /* 0x05: Design Capacity of Warning */
18 0xFFFFFFFF, /* 0x06: Design Capacity of Low */
45 /* Design Voltage */
48 /* Design Capacity */
51 /* Design Capacity of Warning */
54 /* Design Capacity of Low */
/external/coreboot/src/mainboard/51nb/x210/acpi/
Dbattery.asl23 0xFFFFFFFF, /* 0x01: Design Capacity */
26 0xFFFFFFFF, /* 0x04: Design Voltage */
27 0x00000000, /* 0x05: Design Capacity of Warning */
28 0xFFFFFFFF, /* 0x06: Design Capacity of Low */
39 /* Design Capacity */
45 /* Design Voltage */
48 /* Design Capacity of Warning */
51 /* Design Capacity of Low */
/external/chromiumos-config/test/program/fake/
Dprogram.star6 load("//config/util/design.star", "design")
50 _FEATURE_CONSTRAINTS = design.create_constraints([
88 "PROJECT_A": "KEYA", # Follow up design A
89 "PROJECT_B": "KEYB", # Follow up design B
90 "PROJECT_BOX": "KEYBX", # Follow up design BOX
91 "PROJECT_C": "KEYC", # Follow up design C
92 "PROJECT_D": "KEYD", # Follow up design D
93 "PROJECT_E": "KEYE", # Follow up design E
94 "PROJECT_REBRAND": "KEYRB", # Follow up design REBRAND
231 default_ucm_suffix = "{speaker_amp}.{headset_codec}.{mic_description}.{design}",
[all …]

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