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/external/deqp/external/vulkancts/scripts/src/
Dextensions_data.txt5 // * information wheter this is device or instance extension
25 VK_KHR_swapchain DEVICE
26 VK_KHR_swapchain_mutable_format DEVICE
27 VK_KHR_display_swapchain DEVICE
28 VK_KHR_sampler_mirror_clamp_to_edge DEVICE 1_2_0
29 VK_KHR_multiview DEVICE 1_1_0
30 VK_KHR_device_group DEVICE 1_1_0
31 VK_KHR_shader_draw_parameters DEVICE 1_1_0
32 VK_KHR_maintenance1 DEVICE 1_1_0
33 VK_KHR_external_memory DEVICE 1_1_0
[all …]
/external/coreboot/src/soc/amd/genoa_poc/
Dchipset.cb4 device cpu_cluster 0 on ops amd_cpu_bus_ops end
12 device domain 0 on
14 device pci 00.0 alias gnb_0 on end
15 device pci 00.2 alias iommu_0 off ops amd_iommu_ops end
16 device pci 00.3 alias rcec_0 off end
18 device pci 01.0 on end # Dummy device function, do not disable
20 device pci 01.1 alias gpp_bridge_0_0_a off end
23 device pci 01.2 alias gpp_bridge_0_1_a off end
26 device pci 01.3 alias gpp_bridge_0_2_a off end
29 device pci 01.4 alias gpp_bridge_0_3_a off end
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/external/coreboot/src/soc/intel/tigerlake/
Dchipset_pch_h.cb2 device domain 0 on
3 device gpio 0 alias pch_gpio on end
4 device pci 00.0 alias system_agent on end
5 device pci 01.0 alias peg1 off end
6 device pci 01.1 alias peg2 off end
7 device pci 01.2 alias peg3 off end
8 device pci 02.0 alias igpu off end
9 device pci 04.0 alias dptf off end
10 device pci 05.0 alias ipu off end
11 device pci 06.0 alias peg0 off end
[all …]
Dchipset.cb3 device cpu_cluster 0 on end
4 device domain 0 on
5 device gpio 0 alias pch_gpio on end
6 device pci 00.0 alias system_agent on end
7 device pci 02.0 alias igpu off end
8 device pci 04.0 alias dptf off end
9 device pci 05.0 alias ipu off end
10 device pci 06.0 alias peg off end
11 device pci 07.0 alias tbt_pcie_rp0 off
14 device generic 0 on end
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/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AVR/
DAVRDevices.td2 // AVR Device Definitions
21 name, !strconcat("The device is a part of the ", name, " family"), i>;
23 // The device has SRAM, and supports the bare minimum of
35 "The device has random access memory">;
37 // The device supports the `JMP k` and `CALL k` instructions.
39 "The device supports the `JMP` and "
42 // The device supports the indirect branches `IJMP` and `ICALL`.
44 "The device supports `IJMP`/`ICALL`"
47 // The device supports the extended indirect branches `EIJMP` and `EICALL`.
49 "The device supports the "
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRDevices.td2 // AVR Device Definitions
21 : FeatureSet<name, !strconcat("The device is a part of the ",
24 // The device has SRAM, and supports the bare minimum of
36 "The device has random access memory">;
38 // The device supports the `JMP k` and `CALL k` instructions.
40 "The device supports the `JMP` and "
44 // The device supports the indirect branches `IJMP` and `ICALL`.
47 "The device supports `IJMP`/`ICALL`"
50 // The device supports the extended indirect branches `EIJMP` and `EICALL`.
52 "true", "The device supports the "
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/external/coreboot/src/soc/intel/xeon_sp/spr/
Dchipset.cb19 device cpu_cluster 0 on end
20 device domain 0 on
21 device pci 00.0 on end # Intel device 09a2: Memory Map/Intel VT-d
22 device pci 00.1 on end # Intel device 09a4: Mesh to IAL
23 device pci 00.4 on end # Intel device 0b23: IEH
24 device pci 00.2 on end # Intel device 09a3: RAS
25 device pci 01.0 on end # Intel device 3c01: Port A PCIe Gen5
26 device pci 02.0 on end # Intel device 3c01: Port D PCIe Gen4
27 device pci 03.0 on end # Intel device 3c01: Port B PCIe Gen5
28 device pci 04.0 on end # Intel device 3c01: Port C PCIe Gen4
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/external/coreboot/src/soc/intel/meteorlake/
Dchipset.cb3 device cpu_cluster 0 on end
35 device domain 0 on
36 device pci 00.0 alias system_agent on end
37 device pci 01.0 alias pcie_rp12 off end
38 device pci 02.0 alias igpu off end
39 device pci 04.0 alias dtt off end
40 device pci 05.0 alias ipu off end
41 device pci 06.0 alias pcie_rp9 off end
42 device pci 06.1 alias pcie_rp10 off end
43 device pci 06.2 alias pcie_rp11 off end
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/external/coreboot/src/soc/intel/cannonlake/
Dchipset_pch_h.cb3 device cpu_cluster 0 on end
4 device domain 0 on
5 device pci 00.0 alias system_agent on end # Host Bridge
6 device pci 01.0 alias peg0 off end # PCIe x16
7 device pci 01.1 alias peg1 off end # PCIe x8
8 device pci 01.2 alias peg2 off end # PCIe x4
9 device pci 02.0 alias igpu off end # Integrated Graphics Device
10 device pci 04.0 alias dptf off end # SA Thermal device
11 device pci 05.0 alias ipu off end # Imaging Processing Unit
12 device pci 08.0 alias gna off end # Gaussian mixture model, Neural network accelerator
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Dchipset.cb3 device cpu_cluster 0 on end
4 device domain 0 on
5 device pci 00.0 alias system_agent on end # Host Bridge
6 device pci 01.0 alias peg0 off end # PCIe x16
7 device pci 01.1 alias peg1 off end # PCIe x8
8 device pci 01.2 alias peg2 off end # PCIe x4
9 device pci 02.0 alias igpu off end # Integrated Graphics Device
10 device pci 04.0 alias dptf off end # SA Thermal device
11 device pci 05.0 alias ipu off end # Imaging Processing Unit
12 device pci 08.0 alias gna off end # Gaussian mixture model, Neural network accelerator
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/external/coreboot/src/soc/amd/phoenix/
Dchipset_fsp.cb2 device cpu_cluster 0 on
5 device domain 0 on
7 device pci 00.0 alias gnb on ops phoenix_root_complex_operations end
8 device pci 00.2 alias iommu off ops amd_iommu_ops end
10 device pci 01.0 on end # Dummy device function, do not disable
11 # The PCIe GPP aliases in this SoC match the device and function numbers
12 device pci 01.1 alias gpp_bridge_1_1 hidden ops amd_external_pcie_gpp_ops end
13 device pci 01.2 alias gpp_bridge_1_2 hidden ops amd_external_pcie_gpp_ops end
14 device pci 01.3 alias gpp_bridge_1_3 hidden ops amd_external_pcie_gpp_ops end
15 device pci 01.4 alias gpp_bridge_1_4 hidden ops amd_external_pcie_gpp_ops end
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Dchipset_opensil.cb2 device cpu_cluster 0 on
5 device domain 0 on
7 device pci 00.0 alias gnb on ops phoenix_root_complex_operations end
8 device pci 00.2 alias iommu off ops amd_iommu_ops end
10 device pci 01.0 on end # Dummy device function, do not disable
11 # The PCIe GPP aliases in this SoC match the device and function numbers
13 device pci 01.1 alias gpp_bridge_1_1 hidden ops amd_external_pcie_gpp_ops end
16 device pci 01.2 alias gpp_bridge_1_2 hidden ops amd_external_pcie_gpp_ops end
19 device pci 01.3 alias gpp_bridge_1_3 hidden ops amd_external_pcie_gpp_ops end
22 device pci 01.4 alias gpp_bridge_1_4 hidden ops amd_external_pcie_gpp_ops end
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/external/autotest/server/cros/bluetooth/
Dbluetooth_adapter_pairing_tests.py8 HID device.
25 """Server side bluetooth adapter pairing and connecting to bluetooth device
28 pair and connect to a bluetooth HID device correctly.
41 def pairing_test(self, device, check_connected_method=lambda device: True, argument
43 """Running Bluetooth adapter tests about pairing to a device."""
53 # Test if the adapter could discover the target device.
55 if not self.test_discover_device(device.address):
58 # Test if the discovered device class of service is correct.
59 if not self.test_device_class_of_service(device.address,
60 device.class_of_service):
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/external/coreboot/src/soc/intel/alderlake/
Dchipset.cb3 device cpu_cluster 0 on end
107 device domain 0 on
108 device gpio 0 alias pch_gpio on end
109 device pci 00.0 alias system_agent on end
110 device pci 01.0 alias pcie5_0 off end
111 device pci 01.1 alias pcie5_1 off end
112 device pci 02.0 alias igpu off end
113 device pci 04.0 alias dtt off end
114 device pci 05.0 alias ipu off end
115 device pci 06.0 alias pcie4_0 off end
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/external/mesa3d/src/intel/vulkan/
Danv_device.c57 anv_device_init_border_colors(struct anv_device *device) in anv_device_init_border_colors() argument
68 device->border_colors = in anv_device_init_border_colors()
69 anv_state_pool_emit_data(&device->dynamic_state_pool, in anv_device_init_border_colors()
74 anv_device_init_trivial_batch(struct anv_device *device) in anv_device_init_trivial_batch() argument
76 VkResult result = anv_device_alloc_bo(device, "trivial-batch", 4096, in anv_device_init_trivial_batch()
82 &device->trivial_batch_bo); in anv_device_init_trivial_batch()
87 .start = device->trivial_batch_bo->map, in anv_device_init_trivial_batch()
88 .next = device->trivial_batch_bo->map, in anv_device_init_trivial_batch()
89 .end = device->trivial_batch_bo->map + 4096, in anv_device_init_trivial_batch()
121 struct anv_device *device = v_batch; in decode_get_bo() local
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/external/coreboot/src/soc/intel/skylake/
Dchipset.cb2 device cpu_cluster 0 on end
3 device domain 0 on
5 device gpio 0 alias pch_gpio on ops block_gpio_ops end
6 device pci 00.0 alias system_agent on ops systemagent_ops end
7 device pci 01.0 alias peg0 off end
8 device pci 01.1 alias peg1 off end
9 device pci 01.2 alias peg2 off end
10 device pci 02.0 alias igpu off ops graphics_ops end
11 device pci 04.0 alias sa_thermal off end
12 device pci 05.0 alias imgu off end # Imaging Unit
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/external/coreboot/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/
DDevicePathLib.h2 Provides library functions to construct and parse UEFI Device Paths.
24 Determine whether a given device path is valid.
27 @param DevicePath A pointer to a device path data structure.
28 @param MaxSize The maximum size of the device path data structure.
46 Returns the Type field of a device path node.
48 Returns the Type field of the device path node specified by Node.
52 @param Node A pointer to a device path node data structure.
54 @return The Type field of the device path node specified by Node.
64 Returns the SubType field of a device path node.
66 Returns the SubType field of the device path node specified by Node.
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/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/
DDevicePathLib.h2 Provides library functions to construct and parse UEFI Device Paths.
18 Determine whether a given device path is valid.
20 @param DevicePath A pointer to a device path data structure.
21 @param MaxSize The maximum size of the device path data structure.
41 Returns the Type field of a device path node.
43 Returns the Type field of the device path node specified by Node.
47 @param Node A pointer to a device path node data structure.
49 @return The Type field of the device path node specified by Node.
59 Returns the SubType field of a device path node.
61 Returns the SubType field of the device path node specified by Node.
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/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Library/
DDevicePathLib.h2 Provides library functions to construct and parse UEFI Device Paths.
18 Determine whether a given device path is valid.
20 @param DevicePath A pointer to a device path data structure.
21 @param MaxSize The maximum size of the device path data structure.
41 Returns the Type field of a device path node.
43 Returns the Type field of the device path node specified by Node.
47 @param Node A pointer to a device path node data structure.
49 @return The Type field of the device path node specified by Node.
59 Returns the SubType field of a device path node.
61 Returns the SubType field of the device path node specified by Node.
[all …]
/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Library/
DDevicePathLib.h2 Provides library functions to construct and parse UEFI Device Paths.
18 Determine whether a given device path is valid.
20 @param DevicePath A pointer to a device path data structure.
21 @param MaxSize The maximum size of the device path data structure.
41 Returns the Type field of a device path node.
43 Returns the Type field of the device path node specified by Node.
47 @param Node A pointer to a device path node data structure.
49 @return The Type field of the device path node specified by Node.
59 Returns the SubType field of a device path node.
61 Returns the SubType field of the device path node specified by Node.
[all …]
/external/coreboot/src/mainboard/protectli/vault_ehl/
Ddevicetree.cb85 device cpu_cluster 0 on end
86 device domain 0 on
87 device pci 00.0 on end # Host Bridge
88 device pci 02.0 on end # Integrated Graphics Device
89 device pci 04.0 off end # SA Thermal device
90 device pci 08.0 off end # GNA
91 device pci 09.0 off end # CPU Intel Trace Hub
93 device pci 10.0 on end # I2C6
94 device pci 10.1 on end # I2C7
95 device pci 10.5 on end # Integrated Error Handler
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/external/llvm/lib/Target/AVR/
DAVR.td39 : FeatureSet<name, !strconcat("The device is a part of the ",
42 // The device has SRAM, and supports the bare minimum of
54 "The device has random access memory">;
56 // The device supports the `JMP k` and `CALL k` instructions.
58 "The device supports the `JMP` and "
62 // The device supports the indirect branches `IJMP` and `ICALL`.
65 "The device supports `IJMP`/`ICALL`"
68 // The device supports the extended indirect branches `EIJMP` and `EICALL`.
70 "true", "The device supports the "
73 // The device supports `ADDI Rd, K`, `SUBI Rd, K`.
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/external/coreboot/src/soc/amd/cezanne/
Dchipset.cb2 device cpu_cluster 0 on
5 device domain 0 on
7 device pci 00.0 alias gnb on ops cezanne_root_complex_operations end
8 device pci 00.2 alias iommu off ops amd_iommu_ops end
10 device pci 01.0 on end # Dummy device function, do not disable
11 device pci 01.1 alias gpp_gfx_bridge_0 off ops amd_external_pcie_gpp_ops end
12 device pci 01.2 alias gpp_gfx_bridge_1 off ops amd_external_pcie_gpp_ops end
13 device pci 01.3 alias gpp_gfx_bridge_2 off ops amd_external_pcie_gpp_ops end
15 device pci 02.0 on end # Dummy device function, do not disable
16 device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end
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/external/tensorflow/tensorflow/compiler/tests/
Dlstm_layer_inference.pbtxt6 device: "/device:GPU:*"
31 device: "/device:GPU:*"
53 device: "/device:GPU:*"
76 device: "/device:GPU:*"
107 device: "/device:GPU:*"
120 device: "/device:GPU:*"
133 device: "/device:GPU:*"
144 device: "/device:GPU:*"
182 device: "/device:GPU:*"
214 device: "/device:GPU:*"
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/external/tensorflow/tensorflow/compiler/jit/
Dxla_device_ops.h39 // Dummy OpKernel, used for kernels assigned to an XLA device that should be
42 // operator on an XLA device but the compiler did not compile it.
58 #define REGISTER_XLA_LAUNCH_KERNEL(DEVICE, KERNEL, TYPES) \ argument
60 .Device(DEVICE) \
65 #define REGISTER_XLA_COMPILE_KERNEL(DEVICE, KERNEL, TYPES) \ argument
67 .Device(DEVICE) \
74 #define REGISTER_XLA_RUN_KERNEL(DEVICE, KERNEL, TYPES) \ argument
75 REGISTER_KERNEL_BUILDER(Name("_XlaRun").Device(DEVICE), KERNEL);
77 #define REGISTER_XLA_DEVICE_KERNELS(DEVICE, TYPES) \ argument
79 Name("Const").Device(DEVICE).TypeConstraint("dtype", TYPES), \
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