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/external/llvm/test/Transforms/Reassociate/
Drepeats.ll40 %tmp1 = mul i8 3, 3
41 %tmp2 = mul i8 %tmp1, 3
42 %tmp3 = mul i8 %tmp2, 3
43 %tmp4 = mul i8 %tmp3, 3
51 ; CHECK-NEXT: mul
52 ; CHECK-NEXT: mul
54 %tmp1 = mul i3 %x, %x
55 %tmp2 = mul i3 %tmp1, %x
56 %tmp3 = mul i3 %tmp2, %x
57 %tmp4 = mul i3 %tmp3, %x
[all …]
Dmulfactor.ll5 ; CHECK: mul i32 %a, %a
6 ; CHECK-NEXT: mul i32 %a, 2
8 ; CHECK-NEXT: mul
13 %tmp.2 = mul i32 %a, %a
15 %tmp.6 = mul i32 %tmp.5, %b
16 %tmp.10 = mul i32 %b, %b
24 ; CHECK: mul
29 %a = mul i32 %t, 6
30 %b = mul i32 %t, 36
39 ; CHECK: mul
[all …]
Dmightymul.ll5 %t0 = mul i32 %x, %x
6 %t1 = mul i32 %t0, %t0
7 %t2 = mul i32 %t1, %t1
8 %t3 = mul i32 %t2, %t2
9 %t4 = mul i32 %t3, %t3
10 %t5 = mul i32 %t4, %t4
11 %t6 = mul i32 %t5, %t5
12 %t7 = mul i32 %t6, %t6
13 %t8 = mul i32 %t7, %t7
14 %t9 = mul i32 %t8, %t8
[all …]
/external/llvm/test/Transforms/InstCombine/
Dvector-mul.ll8 %mul = mul <4 x i8> %InVec, <i8 0, i8 0, i8 0, i8 0>
9 ret <4 x i8> %mul
17 %mul = mul <4 x i8> %InVec, <i8 1, i8 1, i8 1, i8 1>
18 ret <4 x i8> %mul
26 %mul = mul <4 x i8> %InVec, <i8 2, i8 2, i8 2, i8 2>
27 ret <4 x i8> %mul
36 %mul = mul <4 x i8> %InVec, <i8 4, i8 4, i8 4, i8 4>
37 ret <4 x i8> %mul
46 %mul = mul <4 x i8> %InVec, <i8 8, i8 8, i8 8, i8 8>
47 ret <4 x i8> %mul
[all …]
/external/linux-kselftest/tools/testing/selftests/arm64/abi/
Dsyscall-abi-asm.S28 * LDR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
39 * STR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
120 ldr z0, [x2, #0, MUL VL]
121 ldr z1, [x2, #1, MUL VL]
122 ldr z2, [x2, #2, MUL VL]
123 ldr z3, [x2, #3, MUL VL]
124 ldr z4, [x2, #4, MUL VL]
125 ldr z5, [x2, #5, MUL VL]
126 ldr z6, [x2, #6, MUL VL]
127 ldr z7, [x2, #7, MUL VL]
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/transforms/
Dsve_transpose_interleave_8VL.hpp47 "cntw x21, ALL, MUL #16\n" in sve_transpose_interleave_8VL()
53 "ld1w { z14.s }, p1/Z, [x25, #1, MUL VL]\n" in sve_transpose_interleave_8VL()
55 "ld1w { z13.s }, p1/Z, [x25, #2, MUL VL]\n" in sve_transpose_interleave_8VL()
57 "ld1w { z12.s }, p1/Z, [x25, #3, MUL VL]\n" in sve_transpose_interleave_8VL()
59 "ld1w { z11.s }, p1/Z, [x25, #4, MUL VL]\n" in sve_transpose_interleave_8VL()
61 "ld1w { z10.s }, p1/Z, [x25, #5, MUL VL]\n" in sve_transpose_interleave_8VL()
63 "ld1w { z9.s }, p1/Z, [x25, #6, MUL VL]\n" in sve_transpose_interleave_8VL()
64 "ld1w { z8.s }, p1/Z, [x25, #7, MUL VL]\n" in sve_transpose_interleave_8VL()
67 "ld1w { z6.s }, p1/Z, [x25, #-8, MUL VL]\n" in sve_transpose_interleave_8VL()
68 "ld1w { z5.s }, p1/Z, [x25, #-7, MUL VL]\n" in sve_transpose_interleave_8VL()
[all …]
Dsve_transpose_interleave_8VL_2x2.hpp55 "cnth x21, ALL, MUL #8\n" in sve_transpose_interleave_8VL_2x2()
61 "ld1h { z3.h }, p3/Z, [x27, #1, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
63 "ld1h { z22.h }, p3/Z, [x27, #2, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
65 "ld1h { z12.h }, p3/Z, [x27, #3, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
67 "ld1h { z4.h }, p3/Z, [x27, #4, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
69 "ld1h { z25.h }, p3/Z, [x27, #5, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
71 "ld1h { z15.h }, p3/Z, [x27, #6, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
72 "ld1h { z2.h }, p3/Z, [x27, #7, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
76 "ld1h { z27.h }, p3/Z, [x25, #1, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
78 "ld1h { z18.h }, p3/Z, [x25, #2, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
[all …]
/external/vixl/test/aarch32/traces/
Dassembler-cond-rdlow-rnlow-rmlow-in-it-block-mul-t32.h38 0x08, 0xbf, 0x40, 0x43 // It eq; mul eq r0 r0 r0
41 0x08, 0xbf, 0x48, 0x43 // It eq; mul eq r0 r1 r0
44 0x08, 0xbf, 0x50, 0x43 // It eq; mul eq r0 r2 r0
47 0x08, 0xbf, 0x58, 0x43 // It eq; mul eq r0 r3 r0
50 0x08, 0xbf, 0x60, 0x43 // It eq; mul eq r0 r4 r0
53 0x08, 0xbf, 0x68, 0x43 // It eq; mul eq r0 r5 r0
56 0x08, 0xbf, 0x70, 0x43 // It eq; mul eq r0 r6 r0
59 0x08, 0xbf, 0x78, 0x43 // It eq; mul eq r0 r7 r0
62 0x08, 0xbf, 0x41, 0x43 // It eq; mul eq r1 r0 r1
65 0x08, 0xbf, 0x49, 0x43 // It eq; mul eq r1 r1 r1
[all …]
Dassembler-cond-rd-rn-rm-mul-a32.h38 0x99, 0x05, 0x01, 0x80 // mul hi r1 r9 r5
41 0x96, 0x02, 0x08, 0x50 // mul pl r8 r6 r2
44 0x98, 0x02, 0x05, 0x80 // mul hi r5 r8 r2
47 0x92, 0x07, 0x09, 0x70 // mul vc r9 r2 r7
50 0x96, 0x03, 0x04, 0xb0 // mul lt r4 r6 r3
53 0x96, 0x02, 0x0b, 0xd0 // mul le r11 r6 r2
56 0x9e, 0x04, 0x08, 0x30 // mul cc r8 r14 r4
59 0x9e, 0x06, 0x05, 0xd0 // mul le r5 r14 r6
62 0x91, 0x00, 0x06, 0xb0 // mul lt r6 r1 r0
65 0x90, 0x09, 0x05, 0xb0 // mul lt r5 r0 r9
[all …]
Dassembler-cond-rd-rn-rm-mul-t32.h38 0x0c, 0xfb, 0x02, 0xf5 // mul al r5 r12 r2
41 0x03, 0xfb, 0x0c, 0xf7 // mul al r7 r3 r12
44 0x02, 0xfb, 0x0a, 0xf1 // mul al r1 r2 r10
47 0x07, 0xfb, 0x01, 0xf2 // mul al r2 r7 r1
50 0x09, 0xfb, 0x00, 0xfb // mul al r11 r9 r0
53 0x09, 0xfb, 0x0a, 0xf6 // mul al r6 r9 r10
56 0x05, 0xfb, 0x00, 0xf0 // mul al r0 r5 r0
59 0x06, 0xfb, 0x06, 0xf4 // mul al r4 r6 r6
62 0x0d, 0xfb, 0x01, 0xf1 // mul al r1 r13 r1
65 0x0e, 0xfb, 0x08, 0xf8 // mul al r8 r14 r8
[all …]
/external/llvm/test/CodeGen/X86/
Dimul.ll10 %mul = mul i32 %A, 4
11 ret i32 %mul
20 %mul = mul i64 %A, 4
21 ret i64 %mul
29 %mul = mul i32 %A, 4096
30 ret i32 %mul
39 %mul = mul i64 %A, 4096
40 ret i64 %mul
50 %mul = mul i32 %A, -4096
51 ret i32 %mul
[all …]
/external/llvm/test/CodeGen/AArch64/
Dmul_pow2.ll3 ; Convert mul x, pow2 to shift.
4 ; Convert mul x, pow2 +/- 1 to shift + add/sub.
10 %mul = shl nsw i32 %x, 1
11 ret i32 %mul
18 %mul = mul nsw i32 %x, 3
19 ret i32 %mul
26 %mul = shl nsw i32 %x, 2
27 ret i32 %mul
35 %mul = mul nsw i32 %x, 5
36 ret i32 %mul
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dint-mul-05.ll10 %mul = mul i32 %a, 2
11 ret i32 %mul
19 %mul = mul i32 %a, 3
20 ret i32 %mul
28 %mul = mul i32 %a, 32767
29 ret i32 %mul
37 %mul = mul i32 %a, 32768
38 ret i32 %mul
46 %mul = mul i32 %a, 32769
47 ret i32 %mul
[all …]
Dint-mul-06.ll10 %mul = mul i64 %a, 2
11 ret i64 %mul
19 %mul = mul i64 %a, 3
20 ret i64 %mul
28 %mul = mul i64 %a, 32767
29 ret i64 %mul
37 %mul = mul i64 %a, 32768
38 ret i64 %mul
46 %mul = mul i64 %a, 32769
47 ret i64 %mul
[all …]
/external/cronet/stable/third_party/boringssl/src/gen/bcm/
Dco-586-win.asm32 ; mul a[0]*b[0]
33 mul edx
44 ; mul a[1]*b[0]
45 mul edx
51 ; mul a[0]*b[1]
52 mul edx
63 ; mul a[2]*b[0]
64 mul edx
70 ; mul a[1]*b[1]
71 mul edx
[all …]
/external/boringssl/src/gen/bcm/
Dco-586-win.asm32 ; mul a[0]*b[0]
33 mul edx
44 ; mul a[1]*b[0]
45 mul edx
51 ; mul a[0]*b[1]
52 mul edx
63 ; mul a[2]*b[0]
64 mul edx
70 ; mul a[1]*b[1]
71 mul edx
[all …]
/external/openscreen/third_party/boringssl/win-x86/crypto/fipsmodule/
Dco-586.asm31 ; mul a[0]*b[0]
32 mul edx
43 ; mul a[1]*b[0]
44 mul edx
50 ; mul a[0]*b[1]
51 mul edx
62 ; mul a[2]*b[0]
63 mul edx
69 ; mul a[1]*b[1]
70 mul edx
[all …]
/external/cronet/tot/third_party/boringssl/src/gen/bcm/
Dco-586-win.asm32 ; mul a[0]*b[0]
33 mul edx
44 ; mul a[1]*b[0]
45 mul edx
51 ; mul a[0]*b[1]
52 mul edx
63 ; mul a[2]*b[0]
64 mul edx
70 ; mul a[1]*b[1]
71 mul edx
[all …]
/external/rust/android-crates-io/crates/quiche/deps/boringssl/win-x86/crypto/fipsmodule/
Dco-586.asm31 ; mul a[0]*b[0]
32 mul edx
43 ; mul a[1]*b[0]
44 mul edx
50 ; mul a[0]*b[1]
51 mul edx
62 ; mul a[2]*b[0]
63 mul edx
69 ; mul a[1]*b[1]
70 mul edx
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/merges/
Dsve_merge_u32_3VLx8.hpp67 "incw %[p], all, mul #1\n" in MergeResults()
73 "incw %[p], all, mul #1\n" in MergeResults()
74 "ld1w z3.s, p1/z, [%[outptr0], #1, MUL VL]\n" in MergeResults()
76 "ld1w z11.s, p1/z, [%[inptr], #1, MUL VL]\n" in MergeResults()
80 "ld1w z4.s, p2/z, [%[outptr0], #2, MUL VL]\n" in MergeResults()
81 "ld1w z12.s, p2/z, [%[inptr], #2, MUL VL]\n" in MergeResults()
83 "st1w z11.s, p1, [%[outptr0], #1, MUL VL]\n" in MergeResults()
85 "st1w z12.s, p2, [%[outptr0], #2, MUL VL]\n" in MergeResults()
103 "incw %[p], all, mul #1\n" in MergeResults()
109 "incw %[p], all, mul #1\n" in MergeResults()
[all …]
Dsve_merge_s32_3VLx8.hpp67 "incw %[p], all, mul #1\n" in MergeResults()
73 "incw %[p], all, mul #1\n" in MergeResults()
74 "ld1w z3.s, p1/z, [%[outptr0], #1, MUL VL]\n" in MergeResults()
76 "ld1w z11.s, p1/z, [%[inptr], #1, MUL VL]\n" in MergeResults()
80 "ld1w z4.s, p2/z, [%[outptr0], #2, MUL VL]\n" in MergeResults()
81 "ld1w z12.s, p2/z, [%[inptr], #2, MUL VL]\n" in MergeResults()
83 "st1w z11.s, p1, [%[outptr0], #1, MUL VL]\n" in MergeResults()
85 "st1w z12.s, p2, [%[outptr0], #2, MUL VL]\n" in MergeResults()
103 "incw %[p], all, mul #1\n" in MergeResults()
109 "incw %[p], all, mul #1\n" in MergeResults()
[all …]
/external/mesa3d/src/intel/compiler/elk/tests/gen6/
Dmul.asm1 mul(8) m3<1>F g2<8,8,1>F g8<8,8,1>F { align1 1Q };
2 mul(16) m5<1>F g2<8,8,1>F g14<8,8,1>F { align1 1H };
3 mul(8) g7<1>F g44<8,8,1>F g4.1<0,1,0>F { align1 1Q };
4 mul(16) g18<1>F g28<8,8,1>F g6.1<0,1,0>F { align1 1H };
5 mul(8) g39<1>.xD g28<4>.xD g5<0>.xD { align16 1Q };
6 mul(8) g39<1>.xD g39<4>.xD 2D { align16 1Q };
7 mul(8) g38<1>.xF g2<0>.yF g2<0>.yF { align16 1Q };
8 mul(8) m4<1>.xyF g6<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDClr 1Q };
9 mul(8) g8<1>F g3<4>F 0x37800000F /* 1.52588e-05F */ { align16 1Q };
10 mul(8) g2<1>F g5<8,8,1>F 0x40490fdbF /* 3.14159F */ { align1 1Q };
[all …]
/external/libaom/aom_dsp/
Dfft_common.h143 #define GEN_FFT_8(ret, suffix, T, T_VEC, load, store, constant, add, sub, mul) \ argument
168 store(output + 1 * stride, add(w1, mul(kWeight2, sub(w8, w10)))); \
170 store(output + 3 * stride, sub(w1, mul(kWeight2, sub(w8, w10)))); \
173 sub(sub(kWeight0, w3), mul(kWeight2, add(w10, w8)))); \
175 store(output + 7 * stride, sub(w3, mul(kWeight2, add(w10, w8)))); \
179 mul) \ argument
215 const T_VEC w16[2] = { add(w1, mul(kWeight2, sub(w8, w10))), \
217 mul(kWeight2, add(w10, w8))) }; \
218 const T_VEC w18[2] = { sub(w1, mul(kWeight2, sub(w8, w10))), \
219 sub(w3, mul(kWeight2, add(w10, w8))) }; \
[all …]
/external/mesa3d/src/intel/compiler/elk/tests/gen7.5/
Dmul.asm1 mul(8) g45<1>.xF g5.4<0>.zF g5.4<0>.zF { align16 1Q };
2 mul(8) g18<1>F g17<4>F 0x3f000000F /* 0.5F */ { align16 1Q };
3 mul(8) g39<1>.xD g5<0>.xD 2D { align16 1Q };
4 mul(8) g7<1>F g39<8,8,1>F g4.1<0,1,0>F { align1 1Q };
5 mul(16) g19<1>F g37<8,8,1>F g6.1<0,1,0>F { align1 1H };
6 mul(8) acc0<1>UD g17<8,8,1>UD 0xaaaaaaabUD { align1 1Q };
7 mul(8) acc0<1>D g17<8,8,1>D 1431655766D { align1 1Q };
8 mul(8) g21<1>D g20<8,8,1>D 3W { align1 1Q };
9 mul(8) g7<1>F g5<8,8,1>F 0x3e800000F /* 0.25F */ { align1 1Q };
10 mul(8) acc0<1>UD g84<8,8,1>UD 0xaaaaaaabUD { align1 2Q };
[all …]
/external/mesa3d/src/intel/compiler/elk/tests/gen7/
Dmul.asm1 mul(8) g124<1>F g4<8,8,1>F g6<8,8,1>F { align1 1Q };
2 mul(16) g120<1>F g6<8,8,1>F g10<8,8,1>F { align1 1H };
3 mul(8) g45<1>.xF g5.4<0>.zF g5.4<0>.zF { align16 1Q };
4 mul(8) g39<1>.xD g5<0>.xD 2D { align16 1Q };
5 mul(8) acc0<1>D g5.4<0>.zwwwD g6<0>.xyyyD { align16 1Q };
6 mul(8) g124<1>F g4<8,8,1>F 0x3c23d70aF /* 0.01F */ { align1 1Q };
7 mul(16) g120<1>F g4<8,8,1>F 0x3c23d70aF /* 0.01F */ { align1 1H };
8 mul(8) g9<1>.xyF g8<4>.xyyyF 0x40000000F /* 2F */ { align16 1Q };
9 mul.sat(8) g19<1>.xyzF g15<4>.xyzzF g18<4>.xF { align16 1Q };
10 mul(8) g116<1>.xyF g6<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDClr 1Q };
[all …]

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