1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#include <cpu/intel/post_codes.h> 4#include <cpu/x86/mtrr.h> 5#include <cpu/x86/cache.h> 6#include <cpu/x86/post_code.h> 7 8.code32 9.global chipset_teardown_car 10 11chipset_teardown_car: 12 pop %esp 13 14 post_code(POSTCODE_POSTCAR_DISABLE_CACHE) 15 16 /* Disable cache. */ 17 movl %cr0, %eax 18 orl $CR0_CacheDisable, %eax 19 movl %eax, %cr0 20 21 post_code(POSTCODE_POSTCAR_DISABLE_DEF_MTRR) 22 23 /* Disable MTRR. */ 24 movl $MTRR_DEF_TYPE_MSR, %ecx 25 rdmsr 26 andl $(~MTRR_DEF_TYPE_EN), %eax 27 wrmsr 28 29 post_code(POSTCODE_POSTCAR_TEARDOWN_DONE) 30 31 /* Return to caller. */ 32 jmp *%esp 33