1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef INTEL_DECODER_H
25 #define INTEL_DECODER_H
26
27 #include <stdint.h>
28 #include <stdbool.h>
29 #include <stdio.h>
30
31 #include "dev/intel_device_info.h"
32 #include "util/hash_table.h"
33 #include "util/bitset.h"
34
35 #include "common/intel_engine.h"
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 struct intel_spec;
42 struct intel_group;
43 struct intel_field;
44 union intel_field_value;
45
46 #define INTEL_ENGINE_CLASS_TO_MASK(x) BITSET_BIT(x)
47
intel_make_gen(uint32_t major,uint32_t minor)48 static inline uint32_t intel_make_gen(uint32_t major, uint32_t minor)
49 {
50 return (major << 8) | minor;
51 }
52
53 struct intel_group *intel_spec_find_struct(struct intel_spec *spec, const char *name);
54 struct intel_spec *intel_spec_load(const struct intel_device_info *devinfo);
55 struct intel_spec *
56 intel_spec_load_from_path(const struct intel_device_info *devinfo,
57 const char *path);
58 struct intel_spec *intel_spec_load_filename(const char *dir, const char *name);
59 void intel_spec_destroy(struct intel_spec *spec);
60 uint32_t intel_spec_get_gen(struct intel_spec *spec);
61 struct intel_group *intel_spec_find_instruction(struct intel_spec *spec,
62 enum intel_engine_class engine,
63 const uint32_t *p);
64 struct intel_group *intel_spec_find_register(struct intel_spec *spec, uint32_t offset);
65 struct intel_group *intel_spec_find_register_by_name(struct intel_spec *spec, const char *name);
66 struct intel_enum *intel_spec_find_enum(struct intel_spec *spec, const char *name);
67
68 int intel_group_get_length(const struct intel_group *group, const uint32_t *p);
69 const char *intel_group_get_name(const struct intel_group *group);
70 uint32_t intel_group_get_opcode(const struct intel_group *group);
71 struct intel_field *intel_group_find_field(struct intel_group *group, const char *name);
72 struct intel_enum *intel_spec_find_enum(struct intel_spec *spec, const char *name);
73
74 bool intel_field_is_header(const struct intel_field *field);
75
76 /* Only allow 5 levels of subgroup'ing
77 */
78 #define DECODE_MAX_ARRAY_DEPTH 5
79
80 struct intel_field_iterator {
81 const struct intel_group *group;
82 char name[128];
83 char value[128];
84 uint64_t raw_value;
85 struct intel_group *struct_desc;
86 const uint32_t *p;
87 int p_bit; /**< bit offset into p */
88 const uint32_t *p_end;
89 int start_bit; /**< current field starts at this bit offset into p */
90 int end_bit; /**< current field ends at this bit offset into p */
91
92 const struct intel_field *fields[DECODE_MAX_ARRAY_DEPTH];
93 const struct intel_group *groups[DECODE_MAX_ARRAY_DEPTH];
94 int array_iter[DECODE_MAX_ARRAY_DEPTH];
95 int level;
96
97 const struct intel_field *field;
98 bool print_colors;
99 };
100
101 struct intel_spec {
102 uint32_t gen;
103
104 struct hash_table *commands;
105 struct hash_table *structs;
106 struct hash_table *registers_by_name;
107 struct hash_table *registers_by_offset;
108 struct hash_table *enums;
109
110 struct hash_table *access_cache;
111 };
112
113 struct intel_group {
114 struct intel_spec *spec;
115 char *name;
116
117 struct intel_field *fields; /* linked list of fields */
118 struct intel_field *dword_length_field; /* <instruction> specific */
119
120 uint32_t dw_length;
121 uint32_t engine_mask; /* <instruction> specific */
122 uint32_t bias; /* <instruction> specific */
123 uint32_t array_offset; /* <group> specific */
124 uint32_t array_count; /* number of elements, <group> specific */
125 uint32_t array_item_size; /* <group> specific */
126 bool variable; /* <group> specific */
127 bool fixed_length; /* True for <struct> & <register> */
128
129 struct intel_group *parent;
130 struct intel_group *next;
131
132 uint32_t opcode_mask;
133 uint32_t opcode;
134
135 uint32_t register_offset; /* <register> specific */
136 };
137
138 struct intel_value {
139 char *name;
140 uint64_t value;
141 };
142
143 struct intel_enum {
144 char *name;
145 int nvalues;
146 struct intel_value **values;
147 };
148
149 struct intel_type {
150 enum {
151 INTEL_TYPE_UNKNOWN,
152 INTEL_TYPE_INT,
153 INTEL_TYPE_UINT,
154 INTEL_TYPE_BOOL,
155 INTEL_TYPE_FLOAT,
156 INTEL_TYPE_ADDRESS,
157 INTEL_TYPE_OFFSET,
158 INTEL_TYPE_STRUCT,
159 INTEL_TYPE_UFIXED,
160 INTEL_TYPE_SFIXED,
161 INTEL_TYPE_MBO,
162 INTEL_TYPE_MBZ,
163 INTEL_TYPE_ENUM
164 } kind;
165
166 /* Struct definition for INTEL_TYPE_STRUCT */
167 union {
168 struct intel_group *intel_struct;
169 struct intel_enum *intel_enum;
170 struct {
171 /* Integer and fractional sizes for INTEL_TYPE_UFIXED and INTEL_TYPE_SFIXED */
172 int i, f;
173 };
174 };
175 };
176
177 union intel_field_value {
178 bool b32;
179 float f32;
180 uint64_t u64;
181 int64_t i64;
182 };
183
184 struct intel_field {
185 struct intel_group *parent;
186 struct intel_field *next;
187 struct intel_group *array;
188
189 char *name;
190 int start, end;
191 struct intel_type type;
192 bool has_default;
193 uint32_t default_value;
194
195 struct intel_enum inline_enum;
196 };
197
198 void intel_field_iterator_init(struct intel_field_iterator *iter,
199 const struct intel_group *group,
200 const uint32_t *p, int p_bit,
201 bool print_colors);
202
203 bool intel_field_iterator_next(struct intel_field_iterator *iter);
204
205 void intel_print_group_custom_spacing(FILE *outfile,
206 const struct intel_group *group,
207 uint64_t offset, const uint32_t *p,
208 int p_bit, bool color,
209 const char *spacing_reg,
210 const char *spacing_dword);
211 void intel_print_group(FILE *out,
212 const struct intel_group *group,
213 uint64_t offset, const uint32_t *p, int p_bit,
214 bool color);
215
216 enum intel_batch_decode_flags {
217 /** Print in color! */
218 INTEL_BATCH_DECODE_IN_COLOR = (1 << 0),
219 /** Print everything, not just headers */
220 INTEL_BATCH_DECODE_FULL = (1 << 1),
221 /** Print offsets along with the batch */
222 INTEL_BATCH_DECODE_OFFSETS = (1 << 2),
223 /** Guess when a value is a float and print it as such */
224 INTEL_BATCH_DECODE_FLOATS = (1 << 3),
225 /** Print surface states */
226 INTEL_BATCH_DECODE_SURFACES = (1 << 4),
227 /** Print sampler states */
228 INTEL_BATCH_DECODE_SAMPLERS = (1 << 5),
229 /** Print accumulated state
230 *
231 * Instead of printing instructions as we parse them, retain a pointer to
232 * each of the last instruction emitted and print it upon parsing one of
233 * the following instructions :
234 * - 3DPRIMITIVE
235 * - GPGPU_WALKER
236 * - 3DSTATE_WM_HZ_OP
237 * - COMPUTE_WALKER
238 */
239 INTEL_BATCH_DECODE_ACCUMULATE = (1 << 6),
240 /** Print vertex buffer data */
241 INTEL_BATCH_DECODE_VB_DATA = (1 << 7),
242 };
243
244 #define INTEL_BATCH_DECODE_DEFAULT_FLAGS \
245 (INTEL_BATCH_DECODE_FULL | \
246 INTEL_BATCH_DECODE_OFFSETS | \
247 INTEL_BATCH_DECODE_FLOATS | \
248 INTEL_BATCH_DECODE_SURFACES | \
249 INTEL_BATCH_DECODE_SAMPLERS | \
250 INTEL_BATCH_DECODE_VB_DATA)
251
252 struct intel_batch_decode_bo {
253 uint64_t addr;
254 uint32_t size;
255 const void *map;
256 };
257
258 struct intel_batch_decode_ctx {
259 /**
260 * Return information about the buffer containing the given address.
261 *
262 * If the given address is inside a buffer, the map pointer should be
263 * offset accordingly so it points at the data corresponding to address.
264 */
265 struct intel_batch_decode_bo (*get_bo)(void *user_data, bool ppgtt, uint64_t address);
266 unsigned (*get_state_size)(void *user_data,
267 uint64_t address,
268 uint64_t base_address);
269
270 void (*shader_binary)(void *user_data,
271 const char *short_name,
272 uint64_t address,
273 const void *data,
274 unsigned data_length);
275
276 void *user_data;
277
278 FILE *fp;
279 const struct brw_isa_info *brw;
280 const struct elk_isa_info *elk;
281 struct intel_device_info devinfo;
282 struct intel_spec *spec;
283 enum intel_batch_decode_flags flags;
284
285 bool use_256B_binding_tables;
286 uint64_t surface_base;
287 uint64_t bt_pool_base;
288 uint64_t dynamic_base;
289 uint64_t instruction_base;
290
291 int max_vbo_decoded_lines;
292
293 enum intel_engine_class engine;
294
295 int n_batch_buffer_start;
296 uint64_t acthd;
297
298 struct hash_table *commands;
299 struct hash_table *filters;
300 struct hash_table *stats;
301
302 void (*disassemble_program)(struct intel_batch_decode_ctx *ctx,
303 uint32_t ksp,
304 const char *short_name,
305 const char *name);
306 };
307
308 void intel_batch_decode_ctx_init_brw(struct intel_batch_decode_ctx *ctx,
309 const struct brw_isa_info *isa,
310 const struct intel_device_info *devinfo,
311 FILE *fp, enum intel_batch_decode_flags flags,
312 const char *xml_path,
313 struct intel_batch_decode_bo (*get_bo)(void *,
314 bool,
315 uint64_t),
316 unsigned (*get_state_size)(void *, uint64_t,
317 uint64_t),
318 void *user_data);
319 void intel_batch_decode_ctx_init_elk(struct intel_batch_decode_ctx *ctx,
320 const struct elk_isa_info *isa,
321 const struct intel_device_info *devinfo,
322 FILE *fp, enum intel_batch_decode_flags flags,
323 const char *xml_path,
324 struct intel_batch_decode_bo (*get_bo)(void *,
325 bool,
326 uint64_t),
327 unsigned (*get_state_size)(void *, uint64_t,
328 uint64_t),
329 void *user_data);
330 void intel_batch_decode_ctx_finish(struct intel_batch_decode_ctx *ctx);
331
332
333 void intel_print_batch(struct intel_batch_decode_ctx *ctx,
334 const uint32_t *batch, uint32_t batch_size,
335 uint64_t batch_addr, bool from_ring);
336
337 void intel_batch_stats_reset(struct intel_batch_decode_ctx *ctx);
338
339 void intel_batch_stats(struct intel_batch_decode_ctx *ctx,
340 const uint32_t *batch, uint32_t batch_size,
341 uint64_t batch_addr, bool from_ring);
342
343 void intel_batch_print_stats(struct intel_batch_decode_ctx *ctx);
344
345 #ifdef __cplusplus
346 }
347 #endif
348
349
350 #endif /* INTEL_DECODER_H */
351