1 /* 2 * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * This file contains the RoS specific definitions for the second generation 7 * platforms based on the N2/V2 CPU. 8 */ 9 10 #ifndef NRD_ROS_DEF2_H 11 #define NRD_ROS_DEF2_H 12 13 /******************************************************************************* 14 * SoC memory map related defines 15 ******************************************************************************/ 16 17 /* System Reg */ 18 #define NRD_ROS_SYSTEMREG_BASE UL(0x0C010000) 19 #define NRD_ROS_SYSTEMREG_SIZE UL(0x00010000) 20 21 /* NOR flash 2 */ 22 #define NRD_ROS_NOR2_FLASH_BASE ULL(0x001054000000) 23 #define NRD_ROS_NOR2_FLASH_SIZE UL(0x000004000000) 24 25 /* Memory controller */ 26 #define NRD_ROS_MEMCNTRL_BASE UL(0x10000000) 27 #define NRD_ROS_MEMCNTRL_SIZE UL(0x10000000) 28 29 /* System peripherals */ 30 #define NRD_ROS_SYSTEM_PERIPH_BASE UL(0x0C000000) 31 #define NRD_ROS_SYSTEM_PERIPH_SIZE UL(0x02000000) 32 33 /* Platform peripherals */ 34 #define NRD_ROS_PLATFORM_PERIPH_BASE UL(0x0E000000) 35 #define NRD_ROS_PLATFORM_PERIPH_SIZE UL(0x02000000) 36 37 /* SMC0 */ 38 #define NRD_ROS_SMC0_BASE UL(0x08000000) 39 #define NRD_ROS_SMC0_SIZE UL(0x04000000) 40 41 #endif /* NRD_ROS_DEF2_H */ 42