1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* Helper package for determining IO, DMA, IRQ location according to LDN */ 4Name (DCAT, Package (0x10) { 5 0x07, /* UARTA */ 6 0x08, /* UARTB */ 7 0x11, /* LPT */ 8 0x0B, /* Floppy */ 9 0xFF, 10 0xFF, 11 0xFF, 12 0xFF, 13 0xFF, 14 0xFF, 15 1, /* KBC */ 16 0xFF, 17 0xFF, 18 0xFF, 19 1, /* KBC */ 20 0xFF 21}) 22 23Method (CGLD, 1, NotSerialized) 24{ 25 Return (DerefOf (DCAT [Arg0])) 26} 27 28/* Return Parallel port mode*/ 29Method (LPTM, 1, NotSerialized) 30{ 31 ENTER_CONFIG_MODE (CGLD (Arg0)) 32 Local0 = (OPT0 & 0x02) 33 EXIT_CONFIG_MODE () 34 Return (Local0) 35} 36 37/* Device Status */ 38Method (DSTA, 1, NotSerialized) 39{ 40 ENTER_CONFIG_MODE (CGLD (Arg0)) 41 Local0 = PNP_DEVICE_ACTIVE 42 If (Local0 == 0xFF) 43 { 44 Return (0) 45 } 46 47 Local0 &= 1 48 If (Arg0 < 0x10) 49 { 50 IOST |= (Local0 << Arg0) 51 } 52 53 If (Local0) 54 { 55 Return (DEVICE_PRESENT_ACTIVE) 56 } 57 ElseIf ((1 << Arg0) & IOST) 58 { 59 Return (DEVICE_PRESENT_INACTIVE) 60 } 61 Else 62 { 63 Return (0) 64 } 65 66 EXIT_CONFIG_MODE () 67} 68 69Method (DCNT, 2, NotSerialized) 70{ 71 ENTER_CONFIG_MODE (CGLD (Arg0)) 72 PNP_DEVICE_ACTIVE = Arg1 73 EXIT_CONFIG_MODE () 74} 75 76/* Resource templates for SIO LDNs */ 77Name (CRS1, ResourceTemplate () 78{ 79 IO (Decode16, 80 0x0000, 81 0x0000, 82 0x01, 83 0x00, 84 _Y16) 85 IRQ (Edge, ActiveHigh, Exclusive, _Y14) {} 86 DMA (Compatibility, NotBusMaster, Transfer8, _Y15) {} 87}) 88 89CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y14._INT, IRQM) 90CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y15._DMA, DMAM) 91CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y16._MIN, IO11) 92CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y16._MAX, IO12) 93CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y16._LEN, LEN1) 94 95Name (CRS2, ResourceTemplate () 96{ 97 IO (Decode16, 98 0x0000, 99 0x0000, 100 0x01, 101 0x00, 102 _Y19) 103 IO (Decode16, 104 0x0000, 105 0x0000, 106 0x01, 107 0x00, 108 _Y1A) 109 IRQ (Edge, ActiveHigh, Exclusive, _Y17) {} 110 DMA (Compatibility, NotBusMaster, Transfer8, _Y18) {} 111}) 112 113CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y17._INT, IRQE) 114CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y18._DMA, DMAE) 115CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._MIN, IO21) 116CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._MAX, IO22) 117CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._LEN, LEN2) 118CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._MIN, IO31) 119CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._MAX, IO32) 120CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._LEN, LEN3) 121 122/* Read IO resource */ 123Method (GIOB, 1, NotSerialized) 124{ 125 If (CGLD (Arg0) == 0x07) /* UARTA */ 126 { 127 SWITCH_LDN (SUPERIO_LPC_LDN) 128 Local0 = (CR6B << 0x08) 129 Local0 |= CR6A 130 Return (Local0) 131 } 132 133 If (CGLD (Arg0) == 0x08) /* UARTB */ 134 { 135 SWITCH_LDN (SUPERIO_LPC_LDN) 136 Local0 = (CR6F << 0x08) 137 Local0 |= CR6E 138 Return (Local0) 139 } 140 141 If (CGLD (Arg0) == 0x11) /* LPT */ 142 { 143 SWITCH_LDN (SUPERIO_LPC_LDN) 144 Local0 = (CR83 << 0x08) 145 Local0 |= CR82 146 Return (Local0) 147 } 148 149 If (CGLD (Arg0) == 0x0B) /* Floppy */ 150 { 151 SWITCH_LDN (SUPERIO_LPC_LDN) 152 Local0 = (CR7F << 0x08) 153 Local0 |= CR7E 154 Return (Local0) 155 } 156 157 Return (0) 158} 159 160/* Read IRQ resource */ 161Method (GIRQ, 1, NotSerialized) 162{ 163 SWITCH_LDN (SUPERIO_LPC_LDN) 164 Local0 = 0x0F /* 15 IRQ regs, 1 for each IRQ number */ 165 While (Local0) 166 { 167 Local1 = (0x40 + Local0) /* IRQ regs begin at offset 0x40 */ 168 PNP_ADDR_REG = Local1 169 Local1 = PNP_DATA_REG 170 If (CGLD (Arg0) == Local1) 171 { 172 Local1 = 1 173 Local0 = (Local1 << Local0) 174 Return (Local0) 175 } 176 177 Local0-- 178 } 179 180 Return (0xFF) 181} 182 183/* Read DMA resource */ 184Method (GDMA, 1, NotSerialized) 185{ 186 SWITCH_LDN (SUPERIO_LPC_LDN) 187 Local0 = 0x03 /* Only DMA Channels 0-3 */ 188 While (Local0) 189 { 190 Local1 = (Local0 << 1) 191 Local1 += 0x51 /* DMA regs begin at offset 0x50 */ 192 PNP_ADDR_REG = Local1 193 Local1 = PNP_DATA_REG 194 If ((0x80 | CGLD (Arg0)) == Local1) 195 { 196 Local1 = 1 197 Local0 = (Local1 << Local0) 198 Return (Local0) 199 } 200 201 Local0-- 202 } 203 204 Return (0xFF) 205} 206 207/* Set IO resource */ 208Method (STIO, 2, NotSerialized) 209{ 210 SWITCH_LDN (SUPERIO_LPC_LDN) 211 Local0 = (Arg1 & 0xFF) 212 PNP_ADDR_REG = Arg0 213 PNP_DATA_REG = Local0 214 Local0 = (Arg1 >> 0x08) 215 Local1 = (Arg0 + 1) 216 PNP_ADDR_REG = Local1 217 PNP_DATA_REG = Local0 218} 219 220/* Set IRQ resource */ 221Method (SIRQ, 2, NotSerialized) 222{ 223 SWITCH_LDN (SUPERIO_LPC_LDN) 224 FindSetRightBit (Arg1, Local0) 225 Local0 -= 1 226 Local1 = 0x0F 227 While (Local1) 228 { 229 Local2 = (0x40 + Local1) 230 PNP_ADDR_REG = Local2 231 Local3 = PNP_DATA_REG 232 If (CGLD (Arg0) == Local3) 233 { 234 If (Local0 != Local1) 235 { 236 PNP_ADDR_REG = Local2 237 PNP_DATA_REG = 0xFF 238 Break 239 } 240 Else 241 { 242 Return (0) 243 } 244 } 245 246 Local1-- 247 } 248 249 Local0 += 0x40 250 PNP_ADDR_REG = Local0 251 PNP_DATA_REG = CGLD (Arg0) 252 Return (0xFF) 253} 254 255/* Set DMA resource */ 256Method (SDMA, 2, NotSerialized) 257{ 258 SWITCH_LDN (SUPERIO_LPC_LDN) 259 FindSetRightBit (Arg1, Local0) 260 Local0 -= 1 261 Local1 = 0x03 262 While (Local1) 263 { 264 Local2 = (Local1 << 1) 265 Local3 = (0x51 + Local2) 266 PNP_ADDR_REG = Local3 267 Local4 = PNP_DATA_REG 268 If ((0x80 | CGLD (Arg0)) == Local4) 269 { 270 If (Local0 != Local1) 271 { 272 PNP_ADDR_REG = Local3 273 PNP_DATA_REG = 0 274 Break 275 } 276 Else 277 { 278 Return (0) 279 } 280 } 281 282 Local1-- 283 } 284 285 Local0 <<= 1 286 Local0 += 0x51 287 PNP_ADDR_REG = Local0 288 PNP_DATA_REG = (0x80 | CGLD (Arg0)) 289 Return (0) 290} 291 292/* Device Current Resource Settings */ 293Method (DCRS, 2, NotSerialized) 294{ 295 If (CGLD (Arg0) == 0x07) /* UARTA resources */ 296 { 297 ENTER_CONFIG_MODE (SUPERIO_LPC_LDN) 298 IO11 = GIOB (Arg0) 299 IO12 = IO11 300 LEN1 = 0x08 301 IRQM = GIRQ (Arg0) 302 If ((GDMA (Arg0) > 0x03) || (Arg1 == 0)) 303 { 304 DMAM = 0 305 } 306 Else 307 { 308 DMAM = GDMA (Arg0) 309 } 310 311 EXIT_CONFIG_MODE () 312 Return (CRS1) 313 } 314 315 If (CGLD (Arg0) == 0x08) /* UARTB resources */ 316 { 317 ENTER_CONFIG_MODE (SUPERIO_LPC_LDN) 318 IO11 = GIOB (Arg0) 319 IO12 = IO11 320 LEN1 = 0x08 321 IRQM = GIRQ (Arg0) 322 If ((GDMA (Arg0) > 0x03) || (Arg1 == 0)) 323 { 324 DMAM = 0 325 } 326 Else 327 { 328 DMAM = GDMA (Arg0) 329 } 330 331 EXIT_CONFIG_MODE () 332 Return (CRS1) 333 } 334 335 If (CGLD (Arg0) == 0x11) /* LPT resources */ 336 { 337 If (LPTM (Arg0)) 338 { 339 ENTER_CONFIG_MODE (SUPERIO_LPC_LDN) 340 IO21 = GIOB (Arg0) 341 IO22 = IO21 342 IO31 = (IO21 + 0x0400) 343 IO32 = IO31 344 If ((IO21 & 0xFF) == 0xBC) 345 { 346 LEN2 = 0x04 347 LEN3 = 0x04 348 } 349 Else 350 { 351 LEN2 = 0x08 352 LEN3 = 0x04 353 } 354 355 IRQE = GIRQ (Arg0) 356 If ((GDMA (Arg0) > 0x03) || (Arg1 == 0)) 357 { 358 DMAM = 0 359 } 360 Else 361 { 362 DMAE = GDMA (Arg0) 363 } 364 365 EXIT_CONFIG_MODE () 366 Return (CRS2) /* \_SB_.PCI0.LPCB.SIO1.CRS2 */ 367 } 368 Else 369 { 370 ENTER_CONFIG_MODE (SUPERIO_LPC_LDN) 371 IO11 = GIOB (Arg0) 372 IO12 = IO11 /* \_SB_.PCI0.LPCB.SIO1.IO11 */ 373 If ((IO11 & 0xFF) == 0xBC) 374 { 375 LEN1 = 0x04 376 } 377 Else 378 { 379 LEN1 = 0x08 380 } 381 382 IRQM = GIRQ (Arg0) 383 EXIT_CONFIG_MODE () 384 Return (CRS1) /* \_SB_.PCI0.LPCB.SIO1.CRS1 */ 385 } 386 } 387 388 If (CGLD (Arg0) == 0x0B) /* Floppy resources */ 389 { 390 ENTER_CONFIG_MODE (SUPERIO_LPC_LDN) 391 IO21 = GIOB (Arg0) 392 IO22 = IO21 /* \_SB_.PCI0.LPCB.SIO1.IO21 */ 393 LEN2 = 0x06 394 IO31 = (IO21 + 0x07) 395 IO32 = IO31 /* \_SB_.PCI0.LPCB.SIO1.IO31 */ 396 LEN3 = 1 397 IRQE = GIRQ (Arg0) 398 If ((GDMA (Arg0) > 0x03) || (Arg1 == 0)) 399 { 400 DMAM = 0 401 } 402 Else 403 { 404 DMAE = GDMA (Arg0) 405 } 406 407 EXIT_CONFIG_MODE () 408 Return (CRS2) /* \_SB_.PCI0.LPCB.SIO1.CRS2 */ 409 } 410 411 Return (CRS1) /* \_SB_.PCI0.LPCB.SIO1.CRS1 */ 412} 413