1// Copyright 2021 Google LLC 2// 3// This source code is licensed under the BSD-style license found in the 4// LICENSE file in the root directory of this source tree. 5 6$assert DATATYPE in ["QS8", "QU8"] 7$assert BATCH_TILE % 16 == 0 8$assert BATCH_TILE >= 16 9$SIMD_TILE = BATCH_TILE // 4 10$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" 11#include <assert.h> 12 13#include <immintrin.h> 14 15#include <xnnpack/common.h> 16#include <xnnpack/intrinsics-polyfill.h> 17#include <xnnpack/vcvt.h> 18 19 20$XINT8_T = {"QS8": "int8_t", "QU8": "uint8_t"}[DATATYPE] 21$_MM512_PACKXS_EPI16 = {"QS8": "_mm512_packs_epi16", "QU8": "_mm512_packus_epi16"}[DATATYPE] 22$_MM256_PACKXS_EPI16 = {"QS8": "_mm256_packs_epi16", "QU8": "_mm256_packus_epi16"}[DATATYPE] 23$_MM_PACKXS_EPI16 = {"QS8": "_mm_packs_epi16", "QU8": "_mm_packus_epi16"}[DATATYPE] 24$_MM512_MAX_EPX8 = {"QS8": "_mm512_max_epi8", "QU8": "_mm512_max_epu8"}[DATATYPE] 25$_MM256_MAX_EPX8 = {"QS8": "_mm256_max_epi8", "QU8": "_mm256_max_epu8"}[DATATYPE] 26$_MM_MAX_EPX8 = {"QS8": "_mm_max_epi8", "QU8": "_mm_max_epu8"}[DATATYPE] 27void xnn_f32_${DATATYPE.lower()}_vcvt_ukernel__avx512skx_x${BATCH_TILE}( 28 size_t n, 29 const float* x, 30 ${XINT8_T}* y, 31 const union xnn_f32_${DATATYPE.lower()}_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) 32{ 33 assert(n != 0); 34 assert(n % sizeof(float) == 0); 35 assert(x != NULL); 36 assert(y != NULL); 37 38 const __m512 vscale = _mm512_load_ps(params->avx2.scale); 39 const __m512 voutput_max_less_zero_point = _mm512_load_ps(params->avx512.output_max_less_zero_point); 40 const __m512i voutput_zero_point = _mm512_load_si512(params->avx512.output_zero_point); 41 $if SIMD_TILE > 8: 42 const __m512i vshuffle512_mask = _mm512_load_si512(params->avx512.shuffle512_mask); 43 $if SIMD_TILE % 16 != 0: 44 const __m256i vshuffle256_mask = _mm256_load_si256((const __m256i*) params->avx512.shuffle256_mask); 45 $if SIMD_TILE > 8: 46 const __m512i voutput_min = _mm512_load_si512(params->avx512.output_min); 47 $else: 48 const __m256i voutput_min = _mm256_load_si256((const __m256i*) params->avx512.output_min); 49 for (; n >= ${BATCH_TILE} * sizeof(float); n -= ${BATCH_TILE} * sizeof(float)) { 50 __m512 vx0123 = _mm512_loadu_ps(x); 51 $for N in range(4, SIMD_TILE, 4): 52 __m512 vx${ABC[N:N+4]} = _mm512_loadu_ps(x + ${N * 4}); 53 x += ${BATCH_TILE}; 54 55 $for N in range(0, SIMD_TILE, 4): 56 vx${ABC[N:N+4]} = _mm512_mul_ps(vx${ABC[N:N+4]}, vscale); 57 58 $for N in range(0, SIMD_TILE, 4): 59 vx${ABC[N:N+4]} = _mm512_min_ps(vx${ABC[N:N+4]}, voutput_max_less_zero_point); 60 61 $for N in range(0, SIMD_TILE, 4): 62 const __m512i vacc${ABC[N:N+4]} = _mm512_cvtps_epi32(vx${ABC[N:N+4]}); 63 64 $for N in range(0, SIMD_TILE, 8): 65 __m512i vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]} = _mm512_packs_epi32(vacc${ABC[N:N+4]}, vacc${ABC[N+4:N+8]}); 66 67 $for N in range(0, SIMD_TILE, 8): 68 vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]} = _mm512_adds_epi16(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}, voutput_zero_point); 69 70 $for N in range(0, SIMD_TILE, 16): 71 $if N + 8 < SIMD_TILE: 72 __m512i vy${ABC[N]}${ABC[N+4]}${ABC[N+8]}${ABC[N+12]}${ABC[N+1]}${ABC[N+5]}${ABC[N+9]}${ABC[N+13]}${ABC[N+2]}${ABC[N+6]}${ABC[N+10]}${ABC[N+14]}${ABC[N+3]}${ABC[N+7]}${ABC[N+11]}${ABC[N+15]} = ${_MM512_PACKXS_EPI16}(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}, vacc${ABC[N+8]}${ABC[N+12]}${ABC[N+9]}${ABC[N+13]}${ABC[N+10]}${ABC[N+14]}${ABC[N+11]}${ABC[N+15]}); 73 $else: 74 __m256i vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]} = ${_MM256_PACKXS_EPI16}(_mm512_castsi512_si256(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}), _mm512_extracti32x8_epi32(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}, 1)); 75 76 $for N in range(0, SIMD_TILE, 16): 77 $if N + 8 < SIMD_TILE: 78 vy${ABC[N]}${ABC[N+4]}${ABC[N+8]}${ABC[N+12]}${ABC[N+1]}${ABC[N+5]}${ABC[N+9]}${ABC[N+13]}${ABC[N+2]}${ABC[N+6]}${ABC[N+10]}${ABC[N+14]}${ABC[N+3]}${ABC[N+7]}${ABC[N+11]}${ABC[N+15]} = ${_MM512_MAX_EPX8}(vy${ABC[N]}${ABC[N+4]}${ABC[N+8]}${ABC[N+12]}${ABC[N+1]}${ABC[N+5]}${ABC[N+9]}${ABC[N+13]}${ABC[N+2]}${ABC[N+6]}${ABC[N+10]}${ABC[N+14]}${ABC[N+3]}${ABC[N+7]}${ABC[N+11]}${ABC[N+15]}, voutput_min); 79 $elif SIMD_TILE > 8: 80 vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]} = ${_MM256_MAX_EPX8}(vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]}, _mm512_castsi512_si256(voutput_min)); 81 $else: 82 vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]} = ${_MM256_MAX_EPX8}(vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]}, voutput_min); 83 84 $for N in range(0, SIMD_TILE, 16): 85 $if N + 8 < SIMD_TILE: 86 const __m512i vy${ABC[N:N+16]} = _mm512_permutexvar_epi32(vshuffle512_mask, vy${ABC[N]}${ABC[N+4]}${ABC[N+8]}${ABC[N+12]}${ABC[N+1]}${ABC[N+5]}${ABC[N+9]}${ABC[N+13]}${ABC[N+2]}${ABC[N+6]}${ABC[N+10]}${ABC[N+14]}${ABC[N+3]}${ABC[N+7]}${ABC[N+11]}${ABC[N+15]}); 87 $else: 88 const __m256i vy${ABC[N:N+8]} = _mm256_permutevar8x32_epi32(vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]}, vshuffle256_mask); 89 90 $if SIMD_TILE > 8: 91 _mm512_storeu_si512(y, vy${ABC[0:16]}); 92 $else: 93 _mm256_storeu_si256((__m256i*) y, vy${ABC[0:8]}); 94 $for N in range(16, SIMD_TILE, 16): 95 $if N + 8 < SIMD_TILE: 96 _mm512_storeu_si512(y + ${N * 4}, vy${ABC[N:N+16]}); 97 $else: 98 _mm256_storeu_si256((__m256i*) (y + ${N * 4}), vy${ABC[N:N+8]}); 99 y += ${BATCH_TILE}; 100 } 101 for (; n >= 16 * sizeof(float); n -= 16 * sizeof(float)) { 102 __m512 vx0123 = _mm512_loadu_ps(x); 103 vx0123 = _mm512_mul_ps(vx0123, vscale); 104 vx0123 = _mm512_min_ps(vx0123, voutput_max_less_zero_point); 105 x += 16; 106 107 const __m512i vacc0123 = _mm512_cvtps_epi32(vx0123); 108 109 __m256i vacc0213 = _mm256_packs_epi32(_mm512_castsi512_si256(vacc0123), _mm512_extracti32x8_epi32(vacc0123, 1)); 110 vacc0213 = _mm256_adds_epi16(vacc0213, _mm512_castsi512_si256(voutput_zero_point)); 111 const __m128i vy0213 = ${_MM_PACKXS_EPI16}(_mm256_castsi256_si128(vacc0213), _mm256_extracti128_si256(vacc0213, 1)); 112 __m128i vy0123 = _mm_shuffle_epi32(vy0213, _MM_SHUFFLE(3, 1, 2, 0)); 113 $if SIMD_TILE > 8: 114 vy0123 = ${_MM_MAX_EPX8}(vy0123, _mm512_castsi512_si128(voutput_min)); 115 $else: 116 vy0123 = ${_MM_MAX_EPX8}(vy0123, _mm256_castsi256_si128(voutput_min)); 117 118 _mm_storeu_si128((__m128i*) y, vy0123); 119 y += 16; 120 } 121 if XNN_UNLIKELY(n != 0) { 122 assert(n >= 1 * sizeof(float)); 123 assert(n <= 15 * sizeof(float)); 124 125 // Prepare mask for valid elements (depends on n). 126 n >>= 2 /* log2(sizeof(float)) */; 127 const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << n) - UINT32_C(1))); 128 129 __m512 vx0123 = _mm512_maskz_loadu_ps(vmask, x); 130 vx0123 = _mm512_mul_ps(vx0123, vscale); 131 vx0123 = _mm512_min_ps(vx0123, voutput_max_less_zero_point); 132 133 const __m512i vacc0123 = _mm512_cvtps_epi32(vx0123); 134 135 __m256i vacc0213 = _mm256_packs_epi32(_mm512_castsi512_si256(vacc0123), _mm512_extracti32x8_epi32(vacc0123, 1)); 136 vacc0213 = _mm256_adds_epi16(vacc0213, _mm512_castsi512_si256(voutput_zero_point)); 137 const __m128i vy0213 = ${_MM_PACKXS_EPI16}(_mm256_castsi256_si128(vacc0213), _mm256_extracti128_si256(vacc0213, 1)); 138 __m128i vy0123 = _mm_shuffle_epi32(vy0213, _MM_SHUFFLE(3, 1, 2, 0)); 139 $if SIMD_TILE > 8: 140 vy0123 = ${_MM_MAX_EPX8}(vy0123, _mm512_castsi512_si128(voutput_min)); 141 $else: 142 vy0123 = ${_MM_MAX_EPX8}(vy0123, _mm256_castsi256_si128(voutput_min)); 143 144 _mm_mask_storeu_epi8(y, vmask, vy0123); 145 } 146} 147