1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#include <memlayout.h> 4#include <soc/addressmap.h> 5#include <arch/header.ld> 6 7SECTIONS 8{ 9 DRAM_START(0x00000000) 10 /* Secure region 0 - 1MiB */ 11 BL31(0, 0xe0000) 12 REGION(sff8104, 0xe0000, 0x20000, 0x1000) 13 14 /* Insecure region 1MiB - TOP OF DRAM */ 15 /* bootblock-custom.S does setup CAR from SRAM_START to SRAM_END */ 16 SRAM_START(BOOTROM_OFFSET) 17 18 STACK(BOOTROM_OFFSET, 16K) 19 TIMESTAMP(BOOTROM_OFFSET + 0x4000, 4K) 20 PRERAM_CBFS_CACHE(BOOTROM_OFFSET + 0x6000, 6K) 21 FMAP_CACHE(BOOTROM_OFFSET + 0x7800, 2K) 22 PRERAM_CBMEM_CONSOLE(BOOTROM_OFFSET + 0x8000, 8K) 23 BOOTBLOCK(BOOTROM_OFFSET + 0x20000, 56K) 24 CBFS_MCACHE(BOOTROM_OFFSET + 0x2e000, 8K) 25 VBOOT2_WORK(BOOTROM_OFFSET + 0x30000, 12K) 26 TPM_LOG(BOOTROM_OFFSET + 0x33000, 2K) 27 VERSTAGE(BOOTROM_OFFSET + 0x33800, 50K) 28 ROMSTAGE(BOOTROM_OFFSET + 0x40000, 256K) 29 30 SRAM_END(BOOTROM_OFFSET + 0x80000) 31 32 TTB(BOOTROM_OFFSET + 0x80000, 512K) 33 RAMSTAGE(BOOTROM_OFFSET + 0x100000, 2M) 34 /* Stack for secondary CPUs */ 35 REGION(stack_sec, BOOTROM_OFFSET + 0x300000, 36 CONFIG_MAX_CPUS * CONFIG_STACK_SIZE, 0x1000) 37 38 /* Leave some space for the payload */ 39 POSTRAM_CBFS_CACHE(0x2000000, 16M) 40} 41