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1 #ifndef __FSPUSB_H__
2 #define __FSPUSB_H__
3 
4 /* TODO: Update for Glinda */
5 
6 #include <FspUpd.h>
7 
8 #define FSP_USB_STRUCT_MAJOR_VERSION	0xd
9 #define FSP_USB_STRUCT_MINOR_VERSION	0xe
10 
11 #define USB2_PORT_COUNT 6
12 #define USB3_PORT_COUNT 3
13 #define USBC_COMBO_PHY_COUNT 2
14 
15 struct fch_usb2_phy {
16 	uint8_t compdistune;		///< COMPDISTUNE
17 	uint8_t pllbtune;		///< PLLBTUNE
18 	uint8_t pllitune;		///< PLLITUNE
19 	uint8_t pllptune;		///< PLLPTUNE
20 	uint8_t sqrxtune;		///< SQRXTUNE
21 	uint8_t txfslstune;		///< TXFSLSTUNE
22 	uint8_t txpreempamptune;	///< TXPREEMPAMPTUNE
23 	uint8_t txpreemppulsetune;	///< TXPREEMPPULSETUNE
24 	uint8_t txrisetune;		///< TXRISETUNE
25 	uint8_t txvreftune;		///< TXVREFTUNE
26 	uint8_t txhsxvtune;		///< TXHSXVTUNE
27 	uint8_t txrestune;		///< TXRESTUNE
28 } __packed;
29 
30 struct fch_usb3_phy {
31 	uint8_t tx_term_ctrl;		///< tx_term_ctrl
32 	uint8_t rx_term_ctrl;		///< rx_term_ctrl
33 	uint8_t tx_vboost_lvl_en;	///< TX_VBOOST_LVL_EN
34 	uint8_t tx_vboost_lvl;		///< TX_VBOOST_LVL
35 } __packed;
36 
37 #define USB0_PORT0	0
38 #define USB0_PORT1	1
39 #define USB0_PORT2	1
40 #define USB0_PORT3	3
41 #define USB1_PORT0	(0<<2)
42 #define USB1_PORT1	(1<<2)
43 #define USB1_PORT2	(1<<2)
44 #define USB1_PORT3	(3<<2)
45 
46 #define USB_COMBO_PHY_MODE_USB_C	0
47 #define USB_COMBO_PHY_MODE_USB_ONLY	1
48 #define USB_COMBO_PHY_MODE_USB_DPM	2
49 #define USB_COMBO_PHY_MODE_USB_DPP	3
50 
51 struct usb_phy_config {
52 	uint8_t			Version_Major;                     ///< USB IP version
53 	uint8_t			Version_Minor;                     ///< USB IP version
54 	uint8_t			TableLength;                       ///< TableLength
55 	uint8_t			Reserved0;
56 	struct fch_usb2_phy	Usb2PhyPort[USB2_PORT_COUNT];      ///< USB 2.0 Driving Strength
57 	struct fch_usb3_phy	Usb3PhyPort[USB3_PORT_COUNT];      ///< USB3 PHY Adjustment
58 	uint8_t			BatteryChargerEnable;              ///< bit[1:0]-Usb0 Port[1:0], bit[3:2]-Usb1 Port[1:0]
59 	uint8_t			PhyP3CpmP4Support;                 ///< bit[1:0]-Usb0 Port[1:0], bit[3:2]-Usb1 Port[1:0]
60 	uint8_t			ComboPhyStaticConfig[USBC_COMBO_PHY_COUNT]; ///< 0-Type C, 1- USB only mode, 2- DP only mode, 3- USB + DP
61 	uint8_t			Reserved2[4];
62 } __packed;
63 
64 #endif
65