1 #pragma once 2 3 /* Efficiency class = 0 means little core, while 1 means big core for now. */ 4 #define MAX_WOA_VALID_EFFICIENCY_CLASSES 2 5 6 /* List of known and supported Windows on Arm SoCs/chips. */ 7 enum woa_chip_name { 8 woa_chip_name_microsoft_sq_1 = 0, 9 woa_chip_name_microsoft_sq_2 = 1, 10 woa_chip_name_microsoft_sq_3 = 2, 11 woa_chip_name_microsoft_sq_3_devkit = 3, 12 woa_chip_name_ampere_altra = 4, 13 woa_chip_name_unknown = 5, 14 woa_chip_name_last = woa_chip_name_unknown 15 }; 16 17 /* Topology information hard-coded by SoC/chip name */ 18 struct core_info_by_chip_name { 19 enum cpuinfo_vendor vendor; 20 enum cpuinfo_uarch uarch; 21 uint64_t frequency; /* Hz */ 22 }; 23 24 /* SoC/chip info that's currently not readable by logical system information, 25 * but can be read from registry. 26 */ 27 struct woa_chip_info { 28 wchar_t* chip_name_string; 29 enum woa_chip_name chip_name; 30 struct core_info_by_chip_name uarchs[MAX_WOA_VALID_EFFICIENCY_CLASSES]; 31 }; 32 33 bool get_core_uarch_for_efficiency( 34 enum woa_chip_name chip, 35 BYTE EfficiencyClass, 36 enum cpuinfo_uarch* uarch, 37 uint64_t* frequency); 38 39 bool cpu_info_init_by_logical_sys_info(const struct woa_chip_info* chip_info, enum cpuinfo_vendor vendor); 40