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Searched refs:AlignedAddr (Results 1 – 25 of 25) sorted by relevance

/external/clang/test/CodeGen/
Darm-vector-align.c14 typedef float AlignedAddr __attribute__ ((aligned (16))); typedef
15 void t1(AlignedAddr *addr1, AlignedAddr *addr2) { in t1()
/external/llvm/test/Transforms/AtomicExpand/SPARC/
Dpartword.ll15 ; CHECK: %AlignedAddr = inttoptr i64 %1 to i32*
26 ; CHECK: %8 = load i32, i32* %AlignedAddr
33 ; CHECK: %13 = cmpxchg i32* %AlignedAddr, i32 %12, i32 %11 monotonic monotonic
60 ; CHECK: %AlignedAddr = inttoptr i64 %1 to i32*
71 ; CHECK: %8 = load i32, i32* %AlignedAddr
78 ; CHECK: %13 = cmpxchg i32* %AlignedAddr, i32 %12, i32 %11 monotonic monotonic
106 ; CHECK: %AlignedAddr = inttoptr i64 %1 to i32*
115 ; CHECK: %5 = load i32, i32* %AlignedAddr, align 4
123 ; CHECK: %9 = cmpxchg i32* %AlignedAddr, i32 %loaded, i32 %8 monotonic monotonic
142 ; CHECK: %6 = cmpxchg i32* %AlignedAddr, i32 %loaded, i32 %new monotonic monotonic
[all …]
/external/llvm/include/llvm/Support/
DAllocator.h240 uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); in Allocate() local
241 assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize); in Allocate()
242 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
250 uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); in Allocate() local
251 assert(AlignedAddr + Size <= (uintptr_t)End && in Allocate()
253 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
/external/swiftshader/third_party/llvm-subzero/include/llvm/Support/
DAllocator.h243 uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); in Allocate() local
244 assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize); in Allocate()
245 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
253 uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); in Allocate() local
254 assert(AlignedAddr + Size <= (uintptr_t)End && in Allocate()
256 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/Support/
DAllocator.h186 uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); in Allocate() local
187 assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize); in Allocate()
188 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
196 uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); in Allocate() local
197 assert(AlignedAddr + SizeToAllocate <= (uintptr_t)End && in Allocate()
199 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DAllocator.h250 uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); in Allocate() local
251 assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize); in Allocate()
252 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
260 uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); in Allocate() local
261 assert(AlignedAddr + SizeToAllocate <= (uintptr_t)End && in Allocate()
263 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/
DAtomicExpandPass.cpp646 Value *AlignedAddr = nullptr; member
669 PrintObj(PMV.AlignedAddr); in operator <<()
718 PMV.AlignedAddr = Addr; in createMaskInstrs()
735 PMV.AlignedAddr = Builder.CreateIntrinsic( in createMaskInstrs()
744 PMV.AlignedAddr = Addr; in createMaskInstrs()
765 PMV.AlignedAddr = in createMaskInstrs()
766 Builder.CreateBitCast(PMV.AlignedAddr, WordPtrType, "AlignedAddr"); in createMaskInstrs()
887 OldResult = insertRMWCmpXchgLoop(Builder, PMV.WordType, PMV.AlignedAddr, in expandPartwordAtomicRMW()
892 OldResult = insertRMWLLSCLoop(Builder, PMV.WordType, PMV.AlignedAddr, in expandPartwordAtomicRMW()
928 Builder.CreateAtomicRMW(Op, PMV.AlignedAddr, NewOperand, in widenPartwordAtomicRMW()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.h211 IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr,
217 Value *AlignedAddr, Value *CmpVal,
DRISCVISelLowering.cpp2813 IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
2818 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicRMWIntrinsic()
2844 {AlignedAddr, Incr, Mask, SextShamt, Ordering}); in emitMaskedAtomicRMWIntrinsic()
2847 Builder.CreateCall(LrwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering}); in emitMaskedAtomicRMWIntrinsic()
2865 IRBuilder<> &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
2876 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicCmpXchgIntrinsic()
2880 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/
DLoongArchISelLowering.h146 Value *AlignedAddr, Value *Incr,
156 Value *AlignedAddr, Value *CmpVal,
DLoongArchISelLowering.cpp2823 IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
2833 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicCmpXchgIntrinsic()
2837 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
2843 IRBuilderBase &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
2848 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicRMWIntrinsic()
2874 {AlignedAddr, Incr, Mask, SextShamt, Ordering}); in emitMaskedAtomicRMWIntrinsic()
2877 Builder.CreateCall(LlwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering}); in emitMaskedAtomicRMWIntrinsic()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAtomicExpandPass.cpp615 Value *AlignedAddr; member
662 Ret.AlignedAddr = Builder.CreateIntToPtr( in createMaskInstrs()
767 insertRMWCmpXchgLoop(Builder, PMV.WordType, PMV.AlignedAddr, MemOpOrder, in expandPartwordAtomicRMW()
800 AtomicRMWInst *NewAI = Builder.CreateAtomicRMW(Op, PMV.AlignedAddr, in widenPartwordAtomicRMW()
879 LoadInst *InitLoaded = Builder.CreateLoad(PMV.WordType, PMV.AlignedAddr); in expandPartwordCmpXchg()
893 PMV.AlignedAddr, FullWord_Cmp, FullWord_NewVal, CI->getSuccessOrdering(), in expandPartwordCmpXchg()
966 Builder, AI, PMV.AlignedAddr, ValOperand_Shifted, PMV.Mask, PMV.ShiftAmt, in expandAtomicRMWToMaskedIntrinsic()
988 Builder, CI, PMV.AlignedAddr, CmpVal_Shifted, NewVal_Shifted, PMV.Mask, in expandAtomicCmpXchgToMaskedIntrinsic()
/external/llvm/lib/CodeGen/
DAtomicExpandPass.cpp567 Value *AlignedAddr; member
614 Ret.AlignedAddr = Builder.CreateIntToPtr( in createMaskInstrs()
719 insertRMWCmpXchgLoop(Builder, PMV.WordType, PMV.AlignedAddr, MemOpOrder, in expandPartwordAtomicRMW()
796 LoadInst *InitLoaded = Builder.CreateLoad(PMV.WordType, PMV.AlignedAddr); in expandPartwordCmpXchg()
810 PMV.AlignedAddr, FullWord_Cmp, FullWord_NewVal, CI->getSuccessOrdering(), in expandPartwordCmpXchg()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.h553 Value *AlignedAddr, Value *Incr,
560 Value *AlignedAddr, Value *CmpVal,
DRISCVISelLowering.cpp13839 IRBuilderBase &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
13844 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicRMWIntrinsic()
13870 {AlignedAddr, Incr, Mask, SextShamt, Ordering}); in emitMaskedAtomicRMWIntrinsic()
13873 Builder.CreateCall(LrwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering}); in emitMaskedAtomicRMWIntrinsic()
13895 IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
13906 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicCmpXchgIntrinsic()
13910 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.h929 AtomicRMWInst *AI, Value *AlignedAddr,
935 Value *AlignedAddr, Value *CmpVal,
DPPCISelLowering.cpp18389 IRBuilderBase &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
18402 Builder.CreateBitCast(AlignedAddr, Type::getInt8PtrTy(M->getContext())); in emitMaskedAtomicRMWIntrinsic()
18413 IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
18429 Builder.CreateBitCast(AlignedAddr, Type::getInt8PtrTy(M->getContext())); in emitMaskedAtomicCmpXchgIntrinsic()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1245 unsigned AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicBinaryPartword() local
1307 BuildMI(BB, DL, TII->get(ABI.GetPtrAndOp()), AlignedAddr) in emitAtomicBinaryPartword()
1346 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0); in emitAtomicBinaryPartword()
1370 .addReg(StoreVal).addReg(AlignedAddr).addImm(0); in emitAtomicBinaryPartword()
1500 unsigned AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicCmpSwapPartword() local
1570 BuildMI(BB, DL, TII->get(ArePtrs64bit ? Mips::AND64 : Mips::AND), AlignedAddr) in emitAtomicCmpSwapPartword()
1601 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0); in emitAtomicCmpSwapPartword()
1618 .addReg(StoreVal).addReg(AlignedAddr).addImm(0); in emitAtomicCmpSwapPartword()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1664 Register AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicBinaryPartword() local
1783 BuildMI(BB, DL, TII->get(ABI.GetPtrAndOp()), AlignedAddr) in emitAtomicBinaryPartword()
1810 .addReg(AlignedAddr) in emitAtomicBinaryPartword()
1913 Register AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicCmpSwapPartword() local
1970 BuildMI(BB, DL, TII->get(ArePtrs64bit ? Mips::AND64 : Mips::AND), AlignedAddr) in emitAtomicCmpSwapPartword()
2002 .addReg(AlignedAddr) in emitAtomicCmpSwapPartword()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1668 Register AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicBinaryPartword() local
1787 BuildMI(BB, DL, TII->get(ABI.GetPtrAndOp()), AlignedAddr) in emitAtomicBinaryPartword()
1814 .addReg(AlignedAddr) in emitAtomicBinaryPartword()
1917 Register AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicCmpSwapPartword() local
1974 BuildMI(BB, DL, TII->get(ArePtrs64bit ? Mips::AND64 : Mips::AND), AlignedAddr) in emitAtomicCmpSwapPartword()
2006 .addReg(AlignedAddr) in emitAtomicCmpSwapPartword()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetLowering.h1732 Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
1742 IRBuilder<> &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/
DTargetLowering.h2015 Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
2050 IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp3233 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_LOAD_OP() local
3262 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
3337 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_CMP_SWAP() local
3353 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp3852 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_LOAD_OP() local
3881 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
3968 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_CMP_SWAP() local
3984 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp4207 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_LOAD_OP() local
4236 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
4323 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_CMP_SWAP() local
4339 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()