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Searched refs:IsSignallingNaN (Results 1 – 7 of 7) sorted by relevance

/external/vixl/src/
Dutils-vixl.cc300 if (IsSignallingNaN(value)) { in FPToFloat()
345 if (IsSignallingNaN(value)) { in FPToFloat()
408 if (IsSignallingNaN(value)) { in FPToDouble()
462 if (IsSignallingNaN(value)) { in FPToFloat16()
517 if (IsSignallingNaN(value)) { in FPToFloat16()
Dutils-vixl.h444 inline bool IsSignallingNaN(double num) { in IsSignallingNaN() function
454 inline bool IsSignallingNaN(float num) { in IsSignallingNaN() function
464 inline bool IsSignallingNaN(Float16 num) { in IsSignallingNaN() function
472 return IsNaN(num) && !IsSignallingNaN(num); in IsQuietNaN()
/external/vixl/test/aarch64/
Dtest-assembler-fp-aarch64.cc913 VIXL_ASSERT(IsSignallingNaN(sig1)); in TEST()
914 VIXL_ASSERT(IsSignallingNaN(sig2)); in TEST()
915 VIXL_ASSERT(IsSignallingNaN(siga)); in TEST()
1125 VIXL_ASSERT(IsSignallingNaN(sig1)); in TEST()
1126 VIXL_ASSERT(IsSignallingNaN(sig2)); in TEST()
1127 VIXL_ASSERT(IsSignallingNaN(siga)); in TEST()
1534 VIXL_ASSERT(IsSignallingNaN(snan)); in TEST()
1638 VIXL_ASSERT(IsSignallingNaN(snan)); in TEST()
4377 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST()
4453 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST()
[all …]
Dtest-assembler-sve-aarch64.cc17224 VIXL_ASSERT(IsSignallingNaN(sa)); in TEST_SVE()
17225 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST_SVE()
17226 VIXL_ASSERT(IsSignallingNaN(sm)); in TEST_SVE()
17380 VIXL_ASSERT(IsSignallingNaN(sa)); in TEST_SVE()
17381 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST_SVE()
17382 VIXL_ASSERT(IsSignallingNaN(sm)); in TEST_SVE()
17536 VIXL_ASSERT(IsSignallingNaN(sa)); in TEST_SVE()
17537 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST_SVE()
17538 VIXL_ASSERT(IsSignallingNaN(sm)); in TEST_SVE()
Dtest-assembler-neon-aarch64.cc10629 if (IsSignallingNaN(n)) { in MinMaxHelper()
10632 } else if (IsSignallingNaN(m)) { in MinMaxHelper()
10673 VIXL_ASSERT(IsSignallingNaN(snan)); in TEST()
/external/vixl/src/aarch64/
Dsimulator-aarch64.h5387 if (IsSignallingNaN(op)) {
5395 if (IsSignallingNaN(op1)) {
5397 } else if (IsSignallingNaN(op2)) {
5412 if (IsSignallingNaN(op1)) {
5414 } else if (IsSignallingNaN(op2)) {
5416 } else if (IsSignallingNaN(op3)) {
Dsimulator-aarch64.cc655 VIXL_ASSERT(IsSignallingNaN(RawbitsToDouble(nan_bits & kDRegMask))); in ResetVRegisters()
656 VIXL_ASSERT(IsSignallingNaN(RawbitsToFloat(nan_bits & kSRegMask))); in ResetVRegisters()
1203 if (IsSignallingNaN(val0) || IsSignallingNaN(val1) || in FPCompare()