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Searched refs:MachineSchedulerID (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetMachine.cpp525 insertPass(&MachineSchedulerID, &SIFixControlFlowLiveIntervalsID); in addPreRegAlloc()
536 insertPass(&MachineSchedulerID, &SILoadStoreOptimizerID); in addPreRegAlloc()
537 insertPass(&MachineSchedulerID, &RegisterCoalescerID); in addPreRegAlloc()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DPasses.h119 extern char &MachineSchedulerID;
/external/llvm/include/llvm/CodeGen/
DPasses.h105 extern char &MachineSchedulerID;
/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/
DPasses.h138 extern char &MachineSchedulerID;
/external/llvm/lib/Target/NVPTX/
DNVPTXTargetMachine.cpp327 if (addPass(&MachineSchedulerID)) in addOptimizedRegAlloc()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/
DAMDGPUTargetMachine.cpp1252 insertPass(&MachineSchedulerID, &SIWholeQuadModeID); in addOptimizedRegAlloc()
1253 insertPass(&MachineSchedulerID, &SIPreAllocateWWMRegsID); in addOptimizedRegAlloc()
1256 insertPass(&MachineSchedulerID, &SIOptimizeExecMaskingPreRAID); in addOptimizedRegAlloc()
1264 insertPass(&MachineSchedulerID, &SIFormMemoryClausesID); in addOptimizedRegAlloc()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXTargetMachine.cpp349 if (addPass(&MachineSchedulerID)) in addOptimizedRegAlloc()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/NVPTX/
DNVPTXTargetMachine.cpp406 if (addPass(&MachineSchedulerID)) in addOptimizedRegAlloc()
/external/llvm/lib/Target/PowerPC/
DPPCTargetMachine.cpp402 insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID, in addPreRegAlloc()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCTargetMachine.cpp488 insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID, in addPreRegAlloc()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUTargetMachine.cpp936 insertPass(&MachineSchedulerID, &SIOptimizeExecMaskingPreRAID); in addOptimizedRegAlloc()
939 insertPass(&MachineSchedulerID, &SIFormMemoryClausesID); in addOptimizedRegAlloc()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/
DPPCTargetMachine.cpp537 insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID, in addPreRegAlloc()
/external/llvm/lib/CodeGen/
DTargetPassConfig.cpp830 addPass(&MachineSchedulerID); in addOptimizedRegAlloc()
DMachineScheduler.cpp156 char &llvm::MachineSchedulerID = MachineScheduler::ID; member in llvm
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetPassConfig.cpp1170 addPass(&MachineSchedulerID); in addOptimizedRegAlloc()
DMachineScheduler.cpp198 char &llvm::MachineSchedulerID = MachineScheduler::ID; member in llvm
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/
DTargetPassConfig.cpp1471 addPass(&MachineSchedulerID); in addOptimizedRegAlloc()
DMachineScheduler.cpp218 char &llvm::MachineSchedulerID = MachineScheduler::ID; member in llvm