Searched refs:PCI_ROM_ADDRESS (Results 1 – 13 of 13) sorted by relevance
/external/flashrom/ |
D | it8212.c | 59 pci_write_long(data->dev, PCI_ROM_ADDRESS, data->decode_access); in it8212_shutdown() 75 struct pci_dev *dev = pcidev_init(cfg, devs_it8212, PCI_ROM_ADDRESS); in it8212_init() 80 uint32_t io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; in it8212_init() 97 data->decode_access = pci_read_long(dev, PCI_ROM_ADDRESS); in it8212_init() 98 pci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01); in it8212_init()
|
D | atavia.c | 161 dev = pcidev_init(cfg, ata_via, PCI_ROM_ADDRESS); /* Actually no BAR setup needed at all. */ in atavia_init() 166 pci_write_long(dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK); in atavia_init() 168 uint32_t base = pci_read_long(dev, PCI_ROM_ADDRESS); in atavia_init()
|
D | asm106x.c | 136 pci = pcidev_init(cfg, asm106x_devs, PCI_ROM_ADDRESS); in asm106x_init()
|
D | pcidev.c | 63 case PCI_ROM_ADDRESS: in pcidev_readbar()
|
/external/coreboot/payloads/libpayload/include/pci/ |
D | pci.h | 65 #define PCI_ROM_ADDRESS 0x30 macro
|
/external/coreboot/src/device/ |
D | pci_rom.c | 70 rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS); in pci_rom_probe() 79 pci_write_config32(dev, PCI_ROM_ADDRESS, in pci_rom_probe()
|
D | pci_device.c | 545 pci_get_rom_resource(dev, PCI_ROM_ADDRESS); in pci_dev_read_resources()
|
/external/pciutils/lib/ |
D | generic.c | 199 reg = PCI_ROM_ADDRESS; in pci_generic_fill_info()
|
D | emulated.c | 143 case PCI_ROM_ADDRESS: in pci_emulated_read()
|
D | header.h | 93 #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ macro
|
/external/coreboot/src/include/device/ |
D | pci_def.h | 89 #define PCI_ROM_ADDRESS 0x30 macro
|
/external/kernel-headers/original/uapi/linux/ |
D | pci_regs.h | 118 #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ macro
|
/external/pciutils/ |
D | lspci.c | 541 show_rom(d, PCI_ROM_ADDRESS); in show_htype0()
|