Searched refs:PLL_BASE_ENABLE (Results 1 – 4 of 4) sorted by relevance
218 write32(base, dividers | PLL_BASE_ENABLE); in init_pll()450 setbits32(&clk_rst->pllm_base, PLL_BASE_ENABLE); in clock_sdram()
277 write32(pll_reg->base_reg, dividers | PLL_BASE_ENABLE); in init_pll()543 setbits32(CLK_RST_REG(pllm_base), PLL_BASE_ENABLE); in clock_sdram()
336 #define PLL_BASE_ENABLE (1U << 30) macro
366 #define PLL_BASE_ENABLE (1U << 30) macro