Searched refs:RevOpcode (Results 1 – 4 of 4) sorted by relevance
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 5824 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 5836 Y = MIRBuilder.buildInstr(RevOpcode, {Ty}, {X, Y, One}).getReg(0); in lowerFunnelShiftWithInverse() 5839 X = MIRBuilder.buildInstr(RevOpcode, {Ty}, {X, Y, One}).getReg(0); in lowerFunnelShiftWithInverse() 5846 MIRBuilder.buildInstr(RevOpcode, {Dst}, {X, Y, Z}); in lowerFunnelShiftWithInverse() 5920 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift() local 5923 if (LI.getAction({RevOpcode, {Ty, ShTy}}).Action == Lower) in lowerFunnelShift()
|
/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 2154 constexpr IValueT RevOpcode = B26 | B25 | B23 | B21 | B20 | B19 | B18 | B17 | in rev() local 2156 emitRdRm(Cond, RevOpcode, OpRd, OpRm, RevName); in rev()
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 7539 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() local 7541 isOperationLegalOrCustom(RevOpcode, VT) && isPowerOf2_32(BW)) { in expandFunnelShift() 7552 Y = DAG.getNode(RevOpcode, DL, VT, X, Y, One); in expandFunnelShift() 7555 X = DAG.getNode(RevOpcode, DL, VT, X, Y, One); in expandFunnelShift() 7560 return DAG.getNode(RevOpcode, DL, VT, X, Y, Z); in expandFunnelShift()
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 10237 unsigned RevOpcode = NumActiveLanes == 16 ? ARMISD::VREV16 : ARMISD::VREV32; in LowerVecReduce() local 10238 SDValue Rev = DAG.getNode(RevOpcode, dl, VT, Op0); in LowerVecReduce()
|