Searched refs:VECTOR_REVERSE (Results 1 – 10 of 10) sorted by relevance
| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 577 VECTOR_REVERSE, enumerator
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 305 case ISD::VECTOR_REVERSE: return "vector_reverse"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 994 case ISD::VECTOR_REVERSE: in SplitVectorResult()
2751 Lo = DAG.getNode(ISD::VECTOR_REVERSE, DL, InHi.getValueType(), InHi); in SplitVecRes_VECTOR_REVERSE()
2752 Hi = DAG.getNode(ISD::VECTOR_REVERSE, DL, InLo.getValueType(), InLo); in SplitVecRes_VECTOR_REVERSE()
3934 case ISD::VECTOR_REVERSE: in WidenVectorResult()
5630 SDValue ReverseVal = DAG.getNode(ISD::VECTOR_REVERSE, dl, WidenVT, OpValue); in WidenVecRes_VECTOR_REVERSE()
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| D | LegalizeIntegerTypes.cpp | 112 case ISD::VECTOR_REVERSE: in PromoteIntegerResult()
5407 return DAG.getNode(ISD::VECTOR_REVERSE, dl, OutVT, V0); in PromoteIntRes_VECTOR_REVERSE()
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| D | SelectionDAGBuilder.cpp | 11543 setValue(&I, DAG.getNode(ISD::VECTOR_REVERSE, DL, VT, V)); in visitVectorReverse()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 586 setOperationAction(ISD::VECTOR_REVERSE, VT, Custom); in RISCVTargetLowering()
669 setOperationAction({ISD::STEP_VECTOR, ISD::VECTOR_REVERSE}, VT, Custom); in RISCVTargetLowering()
758 setOperationAction({ISD::VECTOR_REVERSE, ISD::VECTOR_SPLICE}, VT, Custom); in RISCVTargetLowering()
4051 case ISD::VECTOR_REVERSE: in LowerOperation()
6474 SDValue Op2 = DAG.getNode(ISD::VECTOR_REVERSE, DL, WidenVT, Op1); in lowerVECTOR_REVERSE()
6498 Lo = DAG.getNode(ISD::VECTOR_REVERSE, DL, LoVT, Lo); in lowerVECTOR_REVERSE()
6499 Hi = DAG.getNode(ISD::VECTOR_REVERSE, DL, HiVT, Hi); in lowerVECTOR_REVERSE()
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| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 701 def vector_reverse : SDNode<"ISD::VECTOR_REVERSE", SDTVecReverse>;
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5012 return DAG.getNode(ISD::VECTOR_REVERSE, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
9216 Pred = DAG.getNode(ISD::VECTOR_REVERSE, DL, PredVT, Pred); in LowerVECTOR_SPLICE()
23807 Op = DAG.getNode(ISD::VECTOR_REVERSE, DL, ContainerVT, Op1); in LowerFixedLengthVECTOR_SHUFFLEToSVE()
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| /external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenFastISel.inc | 6176 // FastEmit functions for ISD::VECTOR_REVERSE.
6429 case ISD::VECTOR_REVERSE: return fastEmit_ISD_VECTOR_REVERSE_r(VT, RetVT, Op0);
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| D | AArch64GenDAGISel.inc | 190300 62|128,1, TARGET_VAL(ISD::VECTOR_REVERSE),
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